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1 XMUT303 Analogue Electronics Mid-Term Test Revision Questions (Answer) A. Operational Amplifier 1. An engineer in an electronic manufacturing company implements an inverting amplifier using an op amp, as shown in the figure below, but finds that the circuit picks up interference, presumably due to a ground loop. Figure 1: Inverting amplifier circuit and its circuit model for analysis a. Providing an expression for the transfer function equation of the ideal inverting amplifier circuit given above, proof that the transfer function equation of practical inverting amplifier with a finite open-loop gain () is as given below. [4 marks] Answer The transfer function of the ideal inverting amplifier is: =โˆ’( 2 1 ) The transfer function of the practical inverting amplifier with a finite open-loop gain is determined as follows.
Transcript

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XMUT303 Analogue Electronics

Mid-Term Test Revision Questions (Answer)

A. Operational Amplifier

1. An engineer in an electronic manufacturing company implements an inverting amplifier using an op amp, as shown in the figure below, but finds that the circuit picks up interference, presumably due to a ground loop.

Figure 1: Inverting amplifier circuit and its circuit model for analysis

a. Providing an expression for the transfer function equation of the ideal inverting amplifier circuit given above, proof that the transfer function equation of practical inverting amplifier with a finite open-loop gain (๐‘Ž) is as given below. [4 marks]

Answer

The transfer function of the ideal inverting amplifier is:

๐‘ฃ๐‘œ = โˆ’ (๐‘…2

๐‘…1) ๐‘ฃ๐‘–

The transfer function of the practical inverting amplifier with a finite open-loop gain is determined as follows.

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The voltage at the inverting pin of inverting amplifier is:

๐‘ฃ๐‘ = (๐‘…2

๐‘…1 + ๐‘…2) ๐‘ฃ๐ผ + (

๐‘…1

๐‘…1 + ๐‘…2) ๐‘ฃ๐‘‚

Or

๐‘ฃ๐‘ = (1

1 +๐‘…1๐‘…2

) ๐‘ฃ๐ผ + (1

1 +๐‘…2๐‘…1

) ๐‘ฃ๐‘‚ (1)

The voltage at the non-inverting pin of inverting amplifier is:

๐‘ฃ๐‘ƒ = 0

The output voltage of the inverting amplifier is determined from:

๐‘ฃ๐‘‚ = ๐‘Ž(๐‘ฃ๐‘ƒ โˆ’ ๐‘ฃ๐‘) (2)

Combining equation (1) and (2) will give:

๐‘ฃ๐‘‚ = ๐‘Ž [โˆ’ (1

1 +๐‘…1๐‘…2

) ๐‘ฃ๐ผ โˆ’ (1

1 +๐‘…2๐‘…1

) ๐‘ฃ๐‘‚]

Rearrange the equation given above

[1 + (๐‘Ž

1 +๐‘…2๐‘…1

)] ๐‘ฃ๐‘‚ = โˆ’ (๐‘Ž

1 +๐‘…1๐‘…2

) ๐‘ฃ๐ผ

The transfer function of the practical inverting amplifier is:

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๐‘ฃ๐‘‚

๐‘ฃ๐ผ=

(๐‘Ž

1 +๐‘…1๐‘…2

)

1 + (๐‘Ž

1 +๐‘…2๐‘…1

)

Simplify the equation above becomes:

๐‘ฃ๐‘‚

๐‘ฃ๐ผ= โˆ’ (

๐‘…2

๐‘…1) [

1

1 + (1๐‘Ž

) (๐‘…1 + ๐‘…2

๐‘…1)

]

b. Calculate the output voltage of the circuit of ideal inverting amplifier and practical inverting amplifier circuit with a finite open-loop gain, given signal at the input of the amplifier is 2 Volts

and the values of the resistors are ๐‘…1 = 2 k, ๐‘…2 = 12 k, and ๐‘Ž = 106 V/V. [4 marks]

Answer

For given values of the components in the circuit, the output voltage of ideal inverting amplifier is:

๐‘ฃ๐‘œ = โˆ’ (๐‘…2

๐‘…1) ๐‘ฃ๐‘– = โˆ’ (

12 ร— 103

2 ร— 103) ร— 2 = โˆ’12 V

The output voltage of practical inverting amplifier with a finite open-loop gain is:

๐‘ฃ๐‘‚ = โˆ’ (๐‘…2

๐‘…1) [

1

1 + (1๐‘Ž

) (๐‘…1 + ๐‘…2

๐‘…1)

] ๐‘ฃ๐ผ

= โˆ’ (12 ร— 103

2 ร— 103) [

1

1 + (1

106) (2 ร— 103 + 12 ร— 103

2 ร— 103 )] ร— 2 = โˆ’11.99 V

c. Compare the performance of the ideal and practical inverting amplifier circuit with a finite open-loop gain as in part (b). With the aid of diagrams, suggest two ways that the engineer could do to reduce the noise level on the output. [2 marks]

Answer

Comparing the ideal inverting amplifier with the practical inverting amplifier with a finite open loop gain. The output voltage of ideal inverting amplifier is -12 V whereas the output voltage of practical inverting amplifier with a finite open loop gain is -11.99 V. The output voltage is slightly less in the practical inverting amplifier with a finite open-loop gain compared with ideal inverting amplifier.

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The solution to reduce the noise level at the output of the amplifier could be by e.g. using differential input amplifier, using twisted pair cable, or adding ferrite-bead choke.

2. Consider the difference amplifier shown in the figure below.

Figure 2: Difference amplifier circuit.

a. State an equation that best explains the output voltage, ๐‘ฃ๐‘œ, expressed in terms of the input voltages, ๐‘ฃ1 and ๐‘ฃ2 of the circuit given above. [2 marks]

Answer

The output voltage of the given difference amplifier circuit is:

๐‘ฃ๐‘œ = โˆ’ (๐‘…2

๐‘…1) ๐‘ฃ1 + [

(๐‘…1 + ๐‘…2)

(๐‘…3 + ๐‘…4)(

๐‘…4

๐‘…1)] ๐‘ฃ2

b. What is the common-mode gain (๐ด๐ถ๐‘€), differential-mode gain (๐ด๐ท๐‘€) and common-mode rejection ratio (CMRR). [3 marks]

Answer

๐ด๐ถ๐‘€ is gain of the difference amplifier as the average of its two input signals.

๐ด๐ท๐‘€ is gain of the difference amplifier as the difference of its two input signals.

CMRR is the ability of the differential amplifier to reject a common mode signal.

c. Calculate the common-mode gain, ๐ด๐ถ๐‘€ (dB), the differential-mode gain, ๐ด๐ท๐‘€ (dB), and the common-mode rejection ratio, CMRR (dB) for the given circuit. Knowing that ๐‘…1 = 1 k, ๐‘…2 =10 k and component mismatch, = 0.01 [10 marks]

5

Figure 3: Resistor mismatch in the difference amplifier circuit.

Answer

Common mode gain (๐ด๐ถ๐‘€):

๐ด๐ถ๐‘€ =๐‘…2

(๐‘…1 + ๐‘…2)ร— ๐œ– = (

10k

1k + 10k) ร— 0.01 = 0.00909

Differential mode gain (๐ด๐ท๐‘€):

๐ด๐ท๐‘€ =๐‘…2

๐‘…1[1 โˆ’

(๐‘…1 + 2๐‘…2)

(๐‘…1 + ๐‘…2)ร—

๐œ–

2] =

10๐‘˜

1๐‘˜[1 โˆ’

(1k + 2(10k))

(1k + 10k)ร—

0.01

2] = 9.9

Common Mode Rejection Ratio (CMRR):

๐ถ๐‘€๐‘…๐‘… = 20 log |๐ด๐ท๐‘€

๐ด๐ถ๐‘€| = 20 log |

(1 +๐‘…2๐‘…1

)

๐œ–| = 20 log |

1 + 10k/1k

0.01| = 60.8 dB

3. Considering the nulling circuit for an inverting amplifier shown in the figure as given below, the

resistors ๐‘…1 = 1k and ๐‘…2 = 22k and supply voltages of ๐‘‰๐ถ๐ถ = +15 V and ๐‘‰๐ธ๐ธ = -15 V.

The op amp used is an LM324 with its parasitic parameters from the datasheet are as follows:

Nominal input offset voltage, ๐‘‰๐‘‚๐‘† โ‰ค 3 mV.

Input bias current, ๐ผ๐ต โ‰ค 100 nA.

Input offset current, ๐ผ๐‘‚๐‘† โ‰ค 30 nA.

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Figure 4: Nulling circuit for an inverting amplifier

a. Describe nulling circuit. [2 marks]

Answer

Nulling is a circuit arrangement for eliminating imperfections that existed in the circuit such as biasing and offsetting requirements of the components and/or the circuits.

b. Describe three types of nulling circuit in practice. [3 marks]

Answer

Using external components and circuit, through built-in feature of the electronic devices (e.g. adjusting the nulling pin of the op amp), or designing at circuit level that already taking into account biasing and offsetting requirements.

c. The resistors ๐‘…๐ด, ๐‘…๐ต, ๐‘…๐ถ, and ๐‘…๐‘ƒ are included in the circuit to reduce the effects of these parasitic parameters. Give appropriate values for these resistors. Show your working and explain your reasoning. [15 marks]

Answer

The value of resistor ๐‘…๐‘ƒ is found from:

๐‘…๐‘ƒ = ๐‘…1//๐‘…2 =(22k)(1k)

22k + 1k= 956.5 ฮฉ โ‰ˆ 820ฮฉ (using E12 standard)

Since ๐‘…๐‘ƒ + ๐‘…๐ด = 956.5 , the value of resistor ๐‘…๐ด is found from:

๐‘…๐ด = 956.5 โˆ’ ๐‘…๐‘ƒ โ‰ˆ 120 ฮฉ

Note that:

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๐‘…๐‘ƒ + ๐‘…๐ด > ๐‘…1//๐‘…2

But, the value of ๐‘‰๐‘›๐‘ข๐‘™๐‘™ is found from:

๐‘‰๐‘›๐‘ข๐‘™๐‘™ = ๐‘‰๐‘‚๐‘† + ๐ผ๐‘‚๐‘† ร— (๐‘…๐‘ƒ + ๐‘…๐ด)

= 3 mV + 30 nA ร— (820 + 120) = 3.03 mV

Say that we use 5 mV to be safe.

ยฑ๐‘‰๐‘›๐‘ข๐‘™๐‘™

ยฑ๐‘‰๐ถ๐ถ=

๐‘…๐ด

๐‘…๐ด + ๐‘…๐ตโ‰ˆ

๐‘…๐ด

๐‘…๐ต

Rearranging and entering values into the equation, the value of resistor ๐‘…๐ต is:

๐‘…๐ต = (ยฑ๐‘‰๐ถ๐ถ

ยฑ๐‘‰๐‘›๐‘ข๐‘™๐‘™) ๐‘…๐ด

= (ยฑ15 V

ยฑ5 mV) ร— 120ฮฉ = 360 kฮฉ

Then the value of resistor ๐‘…๐ถ is found from (note that ๐‘…๐ถ is a variable resistor):

๐‘…๐ถ =๐‘…๐ต

10โ‰ˆ 10 โˆ’ 50 kฮฉ

4. You are given the following two-op amp instrumentation circuit in the figure below.

Figure 5: Two-op amp instrumentation amplifier circuit

a. Why instrumentation amplifiers are commonly manufactured as monolithic integrated circuits? [2 marks]

Answer

Instrumentation amplifiers are typically packaged as monolithic integrated circuits, to ensure

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that they have high common mode rejection ratio.

b. If you have to design an op amp based amplifier in cascading arrangement, what circuit feature usually you have at the output stage? Give two reasons for your answer. [2 marks]

Answer

The output stage of a multistage amplifier usually employs a push-pull amplifier. It is to ensure sufficient coverage of the signal bandwidth and adequate driving of the load.

c. State an expression for the gain, ๐‘ฃ๐‘œ

๐‘ฃ2โˆ’๐‘ฃ1, for the circuit shown in the circuit above.

[3 marks] Answer

The expression for the gain of the given instrumentation amplifier circuit is:

๐‘ฃ๐‘œ

๐‘ฃ2 โˆ’ ๐‘ฃ1= 1 +

๐‘…2

๐‘…1+ 2

๐‘…2

๐‘…๐บ

d. Calculate the minimum gain of the circuit shown above if ๐‘…1 = 1 k and ๐‘…2 = 10 k. [4 marks]

Answer

Providing Rg is typically considerably bigger than R2, the minimum gain of the instrumentation amplifier circuit is 11 times.

Gain(min) โ‰ˆ 1 +๐‘…2

๐‘…1= 1 +

10k

1k= 11

B. Op Amp Analysis

5. Given in the figure below a circuit diagram of op amp loaded with a resistive load and an imperfect voltage source.

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Figure 6: circuit diagram of loading of an op amp

a. Describe the difference between op amp with FET input stages with those with BJT transistors. [2 marks]

Answer

Compared to op amps with FET input stages, op amps with BJT input stages have higher bias current but lower offset voltage.

b. The amplifier above has ๐‘…๐‘– = 100k , ๐ด๐‘œ๐‘ = 100 V/V, and ๐‘…๐‘œ = 1 and is driven by a source

with ๐‘…๐‘  = 25k and drives a load ๐‘…๐‘™ = 3 . Calculate the overall gain as well as the amount of input and output loading. [10 marks]

Answer

By using the equation given in (a), we obtain the overall gain of the amplifier:

๐‘‰๐‘‚

๐‘‰๐‘†=

๐‘…๐‘–

๐‘…๐‘  + ๐‘…๐‘–๐ด๐‘œ๐‘

๐‘…๐‘™

๐‘…๐‘œ + ๐‘…๐‘™

As a result, the overall gain for the first case is

๐‘‰๐‘‚

๐‘‰๐‘†= (

100k

25k + 100k) ร— 100 ร— (

3

1 + 3)

= 0.8 ร— 100 ร— 0.75 = 60

This is less than 100 V/V because of loading.

6. Given in the figure below is a frequency response of an open loop voltage amplifier.

10

Figure 7: Frequency response plots of the amplifier

a. Estimate the phase margin and gain margin of the amplifier above. [10 marks]

Answer

The phase margin in the frequency response of an op amp is given as:

๐œ™๐‘š = 180ยฐ + โˆข๐‘‡(๐‘—๐‘“๐‘ฅ)

We have the phase margin of the op amp circuit above (at f = 2 x 106 Hz) as:

๐œ™๐‘š = 180ยฐ โˆ’ 205ยฐ = โˆ’25ยฐ

The gain margin in the frequency response of an op amp (at f = 107 Hz) is given as:

๐ด๐‘š = ๐ดโˆ’180 = โˆ’20

We have the gain margin of the op amp circuit above as -20 dB

b. With your estimation on the phase and gain margin, is the amplifier stable or it is not stable?

[2 marks]

Answer Based on the estimation of the phase margin and gain margin the amplifier is not stable, as

at 180 its gain and phase are already in the negative zone.

c. If you have to redesign the above amplifier what do you do to make the amplifier to be

stable? [2 marks]

Answer

Form a closed loop or feedback circuit with a considerable gain or, add a controller to

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compensate for introducing extra gain or phase margins to the amplifier.

7. For a given op amp circuit diagram shown in the figure below.

Figure 8: Circuit for output error of an op amp due to bias current

a. What are bias current and offset current in an op amp? [2 marks]

Answer

Bias current is the average of the currents in the input pins of the op amp and offset current is the difference between the currents at the input pins of the op amp.

b. Let ๐‘…1 = 22 k and ๐‘…2 = 2.2 M, and let the op amp ratings be ๐ผ๐ต = 80 nA and ๐ผ๐‘‚๐‘† = 20 nA. Calculate the output error of the amplifier given above due to input bias current. [10 marks]

Answer The DC noise gain of the op amp is 1 + R2/R1 = 101 V/V

Moreover, (๐‘…2//๐‘…1) 22 k, with ๐‘…๐‘ = 0, we have:

๐ธ๐‘œ = 101 ร— (๐‘…2//๐‘…1)๐ผ๐‘

โ‰ˆ 101 ร— (๐‘…2//๐‘…1)๐ผ๐ต

โ‰ˆ 101 ร— 22 ร— 103 ร— 80 ร— 10โˆ’9 โ‰ˆ 175 mV

As a result the output error is calculated to be 175 mV .

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C. Op Amp based Circuits I

8. Given in the figure below is a summing amplifier.

Figure 9: Summing amplifier circuit

a. Describe the summing amplifier. [2 marks]

Answer

Summing amplifier is a type operational amplifier circuit which can be used to sum signals. The sum of the input signal is amplified by a certain factor and made available at the output. Any number of input signal can be summed using an op amp. The circuit shown above is a three input summing amplifier in the inverting mode.

b. Describe its operation. [2 marks]

Answer

In the summing amplifier circuit, the input signals ๐‘‰1, ๐‘‰2, and ๐‘‰3 are applied to the inverting input of the op amp through input resistors ๐‘…1, ๐‘…2 and ๐‘…3 respectively.

Any number of input signals can be applied to the inverting input in the above manner.

Non-inverting input of the op amp is grounded to GND. In this circuit, ๐‘…๐‘“ is the feedback

resistor whereas ๐‘…๐‘œ is the output resistor.

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c. Derive its transfer function. [8 marks]

Answer

By applying Kirchhoffโ€™s current law at summing junction node we get:

๐ผ1 + ๐ผ2 + ๐ผ3 = ๐ผ๐‘“ + ๐ผ๐‘๐‘–๐‘›โˆ’

Since the input resistance of an ideal op amp is close to infinity and has infinite gain. We can neglect the current that flows to the inverting pin of the op amp (๐ผ๐‘๐‘–๐‘›โˆ’) & voltage at the

summing junction (๐‘‰๐‘ ), therefore:

๐ผ1 + ๐ผ2 + ๐ผ3 = ๐ผ๐‘“ (1)

Equation (1) can be rewritten as:

(๐‘‰1

๐‘…1) + (

๐‘‰2

๐‘…2) + (

๐‘‰3

๐‘…3) =

๐‘‰๐‘  โˆ’ ๐‘‰๐‘œ

๐‘…๐‘“

Neglecting ๐‘‰๐‘ , we get:

(๐‘‰1

๐‘…1) + (

๐‘‰2

๐‘…2) + (

๐‘‰3

๐‘…3) = โˆ’

๐‘‰๐‘œ

๐‘…๐‘“

Rearrange the equation:

๐‘‰๐‘œ = โˆ’๐‘…๐‘“ [(๐‘‰1

๐‘…1) + (

๐‘‰2

๐‘…2) + (

๐‘‰3

๐‘…3)]

Also,

๐‘‰๐‘œ = โˆ’ [(๐‘…๐‘“

๐‘…1) ๐‘‰1 + (

๐‘…๐‘“

๐‘…2) ๐‘‰2 + (

๐‘…๐‘“

๐‘…3) ๐‘‰3] (2)

If resistor ๐‘…1, ๐‘…2 and ๐‘…3 has same value i.e. ๐‘…1 = ๐‘…2 = ๐‘…3 = ๐‘…, then equation (2) can be written as:

๐‘‰๐‘œ = โˆ’ (๐‘…๐‘“

๐‘…) (๐‘‰1 + ๐‘‰2 + ๐‘‰3) (3)

If the values of ๐‘…๐‘“ and ๐‘… are made equal, then the equation becomes:

๐‘‰๐‘œ = โˆ’(๐‘‰1 + ๐‘‰2 + ๐‘‰3)

d. Describe two applications of summing amplifier. [4 marks]

Answer

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Two applications of summing amplifier are: averaging circuit and scaling amplifier.

Averaging Circuit :

An averaging circuit can be made from the summing amplifier circuit by making the all input resistor equal in value i.e.

๐‘…1 = ๐‘…2 = ๐‘…3 = ๐‘…

and the gain must be selected such that if there are m inputs, then

๐‘…๐‘“

๐‘… =

1

๐‘š

Scaling amplifier :

In a scaling amplifier each input will be multiplied by a different factor and then summed together.

Scaling amplifier is also called a weighted amplifier.

In this case different values are chosen for ๐‘…1, ๐‘…2 and ๐‘…3. The governing equation is:

๐‘‰๐‘œ = โˆ’ [(๐‘…๐‘“

๐‘…1) ๐‘‰1 + (

๐‘…๐‘“

๐‘…2) ๐‘‰2 + (

๐‘…๐‘“

๐‘…3) ๐‘‰3]

9. Given in the figure below is a difference amplifier circuit.

Figure 10: Difference amplifier circuit

a. Describe the function of the difference amplifier. [2 marks]

Answer

15

Differential amplifiers amplify the difference between two voltages making this type of operational amplifier circuit a subtractor unlike a summing amplifier which adds or sums together the input voltages.

b. Derive its transfer function equation. [8 marks]

Answer By connecting each input in turn to 0 V ground we can use superposition to solve for the output voltage ๐‘‰๐‘œ๐‘ข๐‘ก. Then the transfer function for a differential amplifier circuit is given as:

๐ผ1 =๐‘‰1 โˆ’ ๐‘‰๐‘Ž

๐‘…1 ๐ผ2 =

๐‘‰2 โˆ’ ๐‘‰๐‘

๐‘…2 ๐ผ๐‘“ =

๐‘‰๐‘Ž โˆ’ ๐‘‰๐‘œ๐‘ข๐‘ก

๐‘…3

At summing point, ๐‘‰๐‘Ž = ๐‘‰๐‘ and

๐‘‰๐‘ = ๐‘‰2 (๐‘…4

๐‘…2 + ๐‘…4)

If ๐‘‰2 = 0, then

๐‘‰๐‘œ๐‘ข๐‘ก(๐‘Ž) = โˆ’๐‘‰1 (๐‘…3

๐‘…1)

If ๐‘‰1 = 0, then

๐‘‰๐‘œ๐‘ข๐‘ก(๐‘) = ๐‘‰2 (๐‘…4

๐‘…2 + ๐‘…4) (

๐‘…1 + ๐‘…3

๐‘…1)

But,

๐‘‰๐‘œ๐‘ข๐‘ก = โˆ’๐‘‰๐‘œ๐‘ข๐‘ก(๐‘Ž) + ๐‘‰๐‘œ๐‘ข๐‘ก(๐‘)

Finally

๐‘‰๐‘œ๐‘ข๐‘ก = โˆ’๐‘‰1 (๐‘…3

๐‘…1) + ๐‘‰2 (

๐‘…4

๐‘…2 + ๐‘…4) (

๐‘…1 + ๐‘…3

๐‘…1)

When resistors, ๐‘…1 = ๐‘…2 and ๐‘…3 = ๐‘…4 the above transfer function for the differential amplifier can be simplified to the following expression:

๐‘‰๐‘œ๐‘ข๐‘ก =๐‘…3

๐‘…1

(๐‘‰2 โˆ’ ๐‘‰1)

c. Describe two of its application in practice. [4 marks]

Answer Two applications of the difference amplifier in practice: Wheatstone bridge differential amplifier and light activated differential amplifier. Wheatstone Bridge Differential Amplifier

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The standard Differential Amplifier circuit now becomes a differential voltage comparator by โ€œcomparingโ€ one input voltage to the other. By connecting one input to a fixed voltage reference set up on one leg of the resistive bridge network and the other to either a โ€œThermistorโ€ or a โ€œLight Dependant Resistorโ€, the amplifier circuit can be used to detect either low or high levels of temperature or light. In this case the output voltage becomes a linear function of the changes in the active leg of the resistive bridge.

Light Activated Differential Amplifier

The circuit above acts as a light-activated switch which turns the output relay either โ€œONโ€ or โ€œOFFโ€ as the light level detected by the LDR resistor exceeds or falls below some pre-set value. A fixed voltage reference is applied to the non-inverting input terminal of the op-amp via the ๐‘…1 โˆ’ ๐‘…2 voltage divider network.

10. For a commonly found example of an instrumentation amplifier as shown in the figure below:

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Figure 11: Instrumentation amplifier circuit

a. Describe the function of the instrumentation amplifier. [2 marks]

Answer Functions of instrumentation amplifier are:

Instrumentation amplifiers (in-amps) are very high gain differential amplifiers which have a high input impedance and a single ended output. Instrumentation amplifiers are mainly used to amplify very small differential signals from strain gauges, thermocouples or current sensing devices in motor control systems.

Unlike standard operational amplifiers in which their closed-loop gain is determined by an external resistive feedback connected between their output terminal and one input terminal, either positive or negative.

Instrumentation amplifiers have an internal feedback resistor that is effectively isolated from its input terminals as the input signal is applied across two differential inputs, ๐‘‰1 and ๐‘‰2.

The instrumentation amplifier also has a very good common mode rejection ratio, CMRR (zero output when ๐‘‰1 = ๐‘‰2) well in excess of 100 dB at DC.

b. Describe its operation. [4 marks]

Answer In a given instrumentation amplifier circuit, the two non-inverting amplifiers form a differential input stage acting as buffer amplifiers with a gain of 1 + 2๐‘…2/๐‘…1 for differential input signals and unity gain for common mode input signals.

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Since amplifiers ๐‘‚๐ด1 and ๐‘‚๐ด2 are closed loop negative feedback amplifiers, we can expect the voltage at ๐‘‰๐‘‚1 to be equal to the input voltage ๐‘‰1. Likewise, the voltage at ๐‘‰๐‘‚2 to be equal to the value at ๐‘‰2. As the op-amps take no current at their input terminals (virtual earth), the same current must flow through the three resistors network of ๐‘…2, ๐‘…1 and ๐‘…2 connected across the op-amp outputs. This means then that the voltage on the upper end of ๐‘…1 will be equal to ๐‘‰1 and the voltage at the lower end of ๐‘…1 to be equal to ๐‘‰2. This produces a voltage drop across resistor ๐‘…1 which is equal to the voltage difference between inputs ๐‘‰1 and ๐‘‰2, the differential input voltage. Because the voltage at the summing junction of each amplifier, ๐‘‰๐‘‚1 and ๐‘‰๐‘‚2 is equal to the voltage applied to its positive inputs. However, if a common-mode voltage is applied to the amplifiers inputs, the voltages on each side of ๐‘…1 will be equal, and no current will flow through this resistor. Since no current flows through ๐‘…1 (nor, therefore, through both ๐‘…2 resistors, amplifiers ๐ด1 and ๐ด2 will operate as unity-gain followers (buffers). Since the input voltage at the outputs of amplifiers ๐ด1 and ๐ด2 appears differentially across the three resistors network, the differential gain of the circuit can be varied by just changing the value of ๐‘…1. The voltage output from the differential op-amp ๐ด3 acting as a subtractor, is simply the difference between its two inputs ( ๐‘‰2 โˆ’ ๐‘‰1) and which is amplified by the gain of ๐ด3 which may be one, unity, (assuming that ๐‘…3 = ๐‘…4).

c. State its transfer function equation. [ 2 marks]

Answer Transfer function equation of the instrumentation amplifier is based on a general expression for overall voltage gain of the instrumentation amplifier circuit as:

๐‘‰๐‘œ๐‘ข๐‘ก = (๐‘‰2 โˆ’ ๐‘‰1) (1 +2๐‘…2

๐‘…1) (

๐‘…4

๐‘…3)

D. Op Amp based Circuits II

11. Consider the comparator circuit shown in the figure below, whose output saturates at ยฑ13 V.

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Figure 12: Voltage comparator circuit

a. Calculate values for ๐‘…1 and ๐‘…2 to give a hysteresis of 0.5 V. [5 marks]

Answer

Hysteresis of the voltage comparator circuit is found from:

โˆ†๐‘‰๐‘ก = ๐‘‰๐‘‡๐ป โˆ’ ๐‘‰๐‘‡๐ฟ

The hysteresis of the circuit above is given as

โˆ†๐‘‰๐‘‡ = (๐‘…1

๐‘…1 + ๐‘…2) ร— (๐‘‰๐‘‚๐ป โˆ’ ๐‘‰๐‘‚๐ฟ)

=1

1 +๐‘…2๐‘…1

(13 โˆ’ (โˆ’13)) = 0.5

As a result, ๐‘…2 = 51๐‘…1. Pick ๐‘…1 to be equal to 1 k, as a result ๐‘…2 is 51 k.

b. Sketch the voltage transfer curve of the comparator assuming hysteresis of 0.5 V. [5 marks]

Answer

Shown below is a hysteresis waveform plot of the comparator circuit with the low threshold (๐‘‰๐‘‡๐ฟ) and high threshold (๐‘‰๐‘‡๐ป) voltages and low output (๐‘‰๐‘‚๐ฟ) and high output (๐‘‰๐‘‚๐ป) voltages as indicated on the diagram.

โˆ†๐‘‰๐‘ก = ๐‘‰๐‘‡๐ป โˆ’ ๐‘‰๐‘‡๐ฟ = 0.5

So, the threshold voltages of the comparator circuit are:

๐‘‰๐‘‡๐ป = 0.25 V and ๐‘‰๐‘‡๐ฟ = โˆ’0.25 V

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c. Sketch the expected output waveform, ๐‘‰๐‘œ against time when ๐‘‰๐‘– is a peak-to-peak voltage, 100 Hz ac-coupled triangle wave. Include the input waveform in your plot, as well as coordinates to clearly identify when transitions occur in the output waveform. [5 marks]

Answer

The expected output waveform of the comparator circuit against time when the input voltage is ac-coupled triangle wave is illustrated below:

12. Given in the figure below is a Wien-Bridge oscillator circuit.

Figure 13: Wien-Bridge oscillator circuit

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a. Describe the effect of reducing resistance of the Wien-Bridge oscillator on its frequency. [2 marks]

Answer

In a Wien-Bridge oscillator, if the resistances in the positive feedback circuit are decreased, the frequency increases.

b. Calculate the resonant frequency and gain of the circuit given above. [10 marks]

Answer

The transfer function of the Wien-Bridge oscillator is given as:

๐‘‰๐‘œ

๐‘‰๐‘–=

๐‘—๐œ”๐ถ1๐‘…2

1 + ๐‘—๐œ”(๐ถ1๐‘…2 + ๐ถ2๐‘…2 + ๐ถ1๐‘…1) โˆ’ ๐œ”2(๐ถ1๐ถ2๐‘…1๐‘…2)

The condition for zero phase shift is given as:

๐œ”2 =1

๐ถ1๐ถ2๐‘…1๐‘…2

Equating ๐‘…1 to ๐‘…2 to be equal to 10 k and ๐ถ1 to ๐ถ2 to be equal to 10 nF, this results in the resonance frequency of the oscillator,

๐‘“๐‘Ÿ =1

2๐œ‹โˆš๐ถ1๐ถ2๐‘…1๐‘…2

=1

2๐œ‹โˆš10 ร— 10โˆ’9 ร— 10 ร— 10โˆ’9 ร— 10 ร— 103 ร— 10 ร— 103= 1.59 ร— 103

Finally, the transfer function becomes:

๐‘‰๐‘œ

๐‘‰๐‘–=

๐ถ1๐‘…2

๐ถ1๐‘…2 + ๐ถ2๐‘…2 + ๐ถ1๐‘…1

At resonance frequency, the gain of the oscillator is:

๐‘‰๐‘œ

๐‘‰๐‘–=

1

3= 0.33

c. Describe two applications of the oscillator given above. [2 marks]

Answer Wien-Bridge oscillator is used in function generator producing reference signals and providing timing feature for digital transmission application.

22

13. Given in the figures below are an RC filter circuit and the Bode plot of the RC filter circuit with the output of the filter circuit is taken across capacitor ๐ถ2. Selected values from the Bode plot from the circuit measurements in the lab are also listed in the table below.

Figure 14: RC filter circuit.

Figure 15: Bode plot. Solid curve is gain (left axis); dashed curve is phase (right axis)

Frequency (Hz) Gain (dB) Phase (degree)

9.5 -4.5 45

15 -3 32

109 -1.5 0

910 -3 -38

1.1 k -3.6 -45

1.4 k -4.5 -53

Table 1: Gain and phase values at specific frequencies for the RC filter circuit.

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a. Calculate the cut-off frequency of the filter circuit above. [10 marks]

Answer

The band-pass filter circuit as given above can be treated as two stages filter that consists of high-pass and low-pass filters.

Upper cut-off frequency of the filter stage:

๐‘“๐ป =1

2๐œ‹๐ถ2๐‘…2=

1

2๐œ‹ ร— 50 ร— 10โˆ’9 ร— 2 ร— 103= 1.592 ร— 103 Hz

Lower cut-off frequency of the filter stage:

๐‘“๐ฟ =1

2๐œ‹๐ถ1๐‘…1=

1

2๐œ‹ ร— 10 ร— 10โˆ’6 ร— 1.4 ร— 103= 11.37 Hz

As a result, the upper and lower cut-off frequencies of the band-pass filter are 1.592 kHz and 11.37 Hz respectively.

b. From the table and graph, find the high-pass cut-off frequency for this filter is. [2 marks]

Answer

The cut-off frequency of the filter circuit is approximately 9.5 Hz from the table and graph.

c. Explain the difference between the calculated and the measured values. [2 marks]

Answer

The differences are due to tolerances of the components used in the filter circuit and also due to errors of testing instruments used in measuring the variables.

14. For a given low-pass Sallen-Key active filter shown in the figure below.

Figure 16: Sallen-Key based low-pass filter circuit

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a. For an active filter used for attenuating signal application, which of the standardized filter design e.g. Butterworth, Bessel, and Chebyshev will be best to realize a stop band filter. Give a reason for your answer. [2 marks]

Answer

For a given active filter, the order for the best design of signal attenuation application is the Chebyshev Type II. The reason is Chebyshev response filter has the sharpest roll-off slope compared with other standard filters. The stop band response can be realized more precisely with this type of filter with narrower cut-off frequency of the filter. Furthermore, the ripples that exist in the stop band (e.g. due to type II Chebyshev response filter) could be useful for maximizing signal attenuation.

b. Compare passive and active filters. Give an advantage for each and state applications were each type of filter are particularly well suited. [5 marks]

Answer

Comparison between passive and active filters:

Advantage:

Passive filter: more precise design outcome and cost effective.

Active filter: design flexibilities and application beyond conventional usages.

Application:

Passive filter: application that requires more precise result

Active filter: application that requires advanced signal treatment e.g. amplification, conversion, rectification, etc.

c. Calculate the cut-off frequency and ๐‘„-factor for the low-pass Sallen-Key filter shown in figure given above, where ๐‘…1 = 1600 ฮฉ, ๐‘…2 = 400 ฮฉ, ๐ถ1 = 40 nF, and ๐ถ2 = 10 nF. [10 marks]

Answer

Cut-off frequency of the low-pass Sallen-Key filter:

๐‘“๐‘ =1

โˆš๐‘…1๐‘…2๐ถ1๐ถ2

=1

โˆš1600 ร— 400 ร— 40 ร— 10โˆ’9 ร— 10 ร— 10โˆ’9

= 62,500 rad/sec = 9,947Hz

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๐‘„-factor of the low-pass Sallen-Key filter:

๐‘„ =1

๐‘…1 + ๐‘…2โˆš๐‘…1๐‘…2

๐ถ1

๐ถ2

=1

1600 + 400โˆš1600 ร— 400 ร—

40 ร— 10โˆ’9

10 ร— 10โˆ’9

= 0.8

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SELECTIVE FORMULAE IN ANALOGUE ELECTRONICS

Operational Amplifier:

๐ด๐ท๐‘€ =๐‘…2

๐‘…1[1 โˆ’

โˆˆ (๐‘…1+2๐‘…2)

2(๐‘…1+๐‘…2)] and ๐ด๐ถ๐‘€ =

๐‘…2 โˆˆ

(๐‘…1 + ๐‘…2)

๐ถ๐‘€๐‘…๐‘… = 20 log |๐ด๐ท๐‘€

๐ด๐ถ๐‘€|

Inverting Amplifier:

๐‘‰๐‘œ๐‘ข๐‘ก = โˆ’ (๐‘…2

๐‘…1) ๐‘‰๐‘–๐‘›

Non-Inverting Amplifier:

๐‘‰๐‘œ๐‘ข๐‘ก = (1 +๐‘…2

๐‘…1) ๐‘‰๐‘–๐‘›

Summing Amplifier:

๐‘‰๐‘œ๐‘ข๐‘ก = (๐‘…๐‘“

๐‘…1๐‘‰1 +

๐‘…๐‘“

๐‘…2๐‘‰2 +

๐‘…๐‘“

๐‘…3๐‘‰3 + โ‹ฏ )

Comparator:

โˆ†๐‘‰๐‘ก = ๐‘‰๐‘‡๐ป โˆ’ ๐‘‰๐‘‡๐ฟ

โˆ†๐‘‰๐‘‡ = (๐‘…1

๐‘…1 + ๐‘…2) ร— (๐‘‰๐‘‚๐ป โˆ’ ๐‘‰๐‘‚๐ฟ)

Oscillator (Wien-Bridge):

๐‘‰๐‘œ

๐‘‰๐‘–=

๐‘—๐œ”๐ถ1๐‘…2

1 + ๐‘—๐œ”(๐ถ1๐‘…2 + ๐ถ2๐‘…2 + ๐ถ1๐‘…1) โˆ’ ๐œ”2(๐ถ1๐ถ2๐‘…1๐‘…2)

๐œ”2 =1

๐ถ1๐ถ2๐‘…1๐‘…2

Low/High Pass Filter:

๐น๐‘ =1

๐œ”๐‘…๐ถ

Sallen-Key Filter:

๐œ”0 =1

โˆš๐‘…1๐‘…2๐ถ1๐ถ2

and ๐‘„ =1

๐‘…1+๐‘…2โˆš๐‘…1๐‘…2

๐ถ1

๐ถ2


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