Abstract— A modulation-based soft-switching scheme is outlined for a high-frequency-link (HFL) inverter, which comprises a front-end HF isolated dc/ac converter followed by an ac/dc converter and an ac/ac converter. The proposed zero-voltage and zero-current switching (ZVZCS) scheme provides loss mitigation for all three legs of the ac/ac converter. Because the output of the ac/dc converter is pulsating-dc in nature, it retains the multi-phase encoded information generated by the dc/ac converter’s sinusoidal modulation. Although the inverter only needs a two-phase HF transformer to generate a three-phase output, a third phase is used to yield higher fault-tolerance. That is, in case of a fault in one of the phases of the HF transformer, two other phases can carry on nominal operation. The results are verified using simulation and experiments on a 2 kW, 40 V/208 V three-phase inverter.
I. INTRODUCTION Recent work by our group [1]-[6] and researchers world-
wide [7]-[13] on HFL inverters for photovoltaic, wind, fuel-cell, storage, and electrical-vehicular energy systems have clearly demonstrated the potential of these power-conversion systems with regard to a) power density, b) cost, c) efficiency, d) fault tolerance, and e) reliability. Among the HFL inverters, which significantly reduce the size of the galvanic-isolation transformer due to HF operation, those with pulsating-dc links (e.g. see Fig. 1) eliminate the need for bulky dc-link filters in contrast to the HFL fixed-dc-link inverters [1], [2], [6]. There are two approaches to implementing HFL inverters with pulsating-dc links: cycloconverter-type-HFL (CHFL) and rectifier-type-HFL (RHFL) inverters [4]. One of the challenges of the HFL inverters is that, with increasing switching frequency, the switching loss significantly increases. In addition, the designer must deal with the total harmonic distortion (THD) due to the absence of the dc-link filters.
Earlier references [14], [15] have demonstrated (for single-phase RHFL and CHFL inverters) how one can achieve loss mitigation of the secondary-side ac/ac converter when the primary-side HF dc/ac converter is sinusoidally-modulated. Nevertheless, this approach is not directly applicable to a three-phase-output RHFL/CHFL inverter. Towards that end, recently, a novel hybrid-modulation
scheme has been proposed [6], for the ac/ac converter of the three-phase RHFL inverter shown in Fig. 1, which reduces the switching loss of that stage by up to 66%.
In this paper, a new primary-side-assisted switching scheme is described, which mitigates the switching loss of the ac/ac converter of a three-phase RHFL inverter. Essentially the ac/ac converter only flips the pulses already generated at the pulsating-dc-link output of the ac/dc converter shown in Fig. 1 based on a unique modulation of the primary-side HF dc/ac converter. We note that, the primary-side-assisted ZVZCS of the ac/ac converter is realized without using any auxiliary circuit. This ZVZCS scheme is expected to have a profound impact on the efficiency, cost, power density, and reliability of the overall HFL inverter.
The ZVZCS scheme can be implemented nominally using only two primary-side phases. However, an additional phase is incorporated to enhance the fault tolerance [16] of the primary-side dc/ac converter and hence the overall RHFL inverter. That is, even if one of the primary-side phases is lost, the other two phases can seamlessly carry on. It should be noted, however, that during the fault singularity, when only one primary-side phase is active, the operation of the ac/ac converter follows a switching scheme, which is different from the ZVZCS scheme. This is because the main goal during fault condition is to stabilize the inverter.
Yet another feature of the RHFL inverter is the generation of a 5-level modulating waveform at the output of the overall inverter. This is achieved by combining pulse-width and pulse-placement modulations for switching the primary-side dc/ac converter. The higher commutation frequency of the 5-level inverter output waveform reduces the size of the output filter and is achieved without increasing the switching frequency of the dc/ac converter thereby limiting its switching losses.
Section II outlines the mechanism and operation of the primary-side-assisted ZVZCS scheme and generation of the switching patterns for the dc/ac and ac/ac converters. Section III provides the results of the RHFL inverter. Finally, Section IV draws some relevant conclusions.
Fig. 1: Schematic of the pulsating-dc-link-based isolated three-phase HFL inverter.
II. PRIMARY-SIDE-ASSISTED SOFT-SWITCHING SCHEME FOR THE AC/AC CONVERTER
Fig. 2 shows the schematic for generating the switching pattern for the dc/ac converter (in Fig. 1). In order to achieve the soft switching of the ac/ac converter, information of all the three primary phases must be represented in the pulsating-dc-link voltage, which appears at the output of the ac/dc converter. Subsequently, the pulsating-dc-link-voltage waveform (with sinusoidally-encoded information) is used to generate a three-phase sinusoidal voltage at the output of the inverter by suitably modulating the ac/ac converter. As shown in Fig. 2, one phase of the dc/ac converter must contain two sets of pulses of maximum reference value, which are the desired output voltages (they are denoted as Refs. A, B, and C).
Fig. 2: Diagram of signal generation for dc/ac converter shown in Fig. 1.
Fig. 3 illustrates the resulting key waveforms of the dc/ac converter when the absolute value of Ref A is the maximum. This implies that, the pulsating-dc-link voltage is the sum of the voltages of the phase A and that of the other two phases. Hence, the required three output phases can be extracted from the pulsating-dc-link voltage without any switching loss of the ac/ac converter.
Figs. 4 and 3(e) outline that, even though two legs of the ac/ac converter operate at a HF, they turn off and turn on under fully soft-switching condition. However, one leg of
Fig. 3: Key waveforms of the converter when reference A (Ref A) is maximum. a) Comparator of the maximum reference. b) Comparator of Ref B. c) Comparator of Ref C. d) Primary voltages and e) resulting pulsating-dc-link voltage.
the ac/ac converter operates under hard-switching condition when hybrid modulation [6] is using as switching pattern.
Fig. 5 demonstrates how all three output phases are extracted from the pulsating-dc-link waveform of the inverter. Figs. 5(a) and 5(b), respectively, show the reference values of the desired output phase voltages and their absolute values. Fig. 5(c) shows the absolute values of the phase-to-phase references (for the inverter output) and their corresponding output phase-to-phase voltages. The arrows shown in Fig. 5(d) are the result of subtraction of two consecutive pulses on the pulsating-dc link. Therefore, and as shown in Fig. 5, all portions of the desired phase-to-phase voltages are generated based on information encoded in the pulsating-dc link. Each dc-link pulse contains
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Fig. 4: Illustration of the mechanism for signal generation for the ac/ac converter shown in Fig. 1.
Fig. 5: Generation of output phase-to-phase voltages based on information on dc-link.
information of two phases, which can be calculated using (1)-(3): ��� � ��� � �� �� � ��� � �� �� �
��� � ������ �� � ��� � ���� ��� � � ��� � (1)
� !"��� � ���� ��� � # �$ ��% ���
�" & �� � & �
�'� � ���� � �� �� � ��� � �� �(�
� ���� � ������ �� � ��� � ���� ��� � � )�� � (2)
� !"��� � *��� +�� � # �$ � ,�
" -*� % ����" & �� � & �
��' � ��� � �� �� � �.' � �� �( �
���� � ���� ��� � � ��� � � ��� � ���� ��� � � )�
� � (3)
� !"��� � ���� ��� � # �$ � ��" �� % ���
�" & �� � & �
where f is the inverter output frequency and N is transformer turn ratio. As a result, the amplitudes of the output phase-to-phase voltages equal �!"/����� � times the amplitude of the input phase reference. It should be noted that, without using the absolute values of the phase references, the modulation index would be half of the amplitude.
III. RESULTS OF THE SOFT-SWITCHING SCHEME Experimental results for the modulation-based ZVZCS
scheme are obtained using an experimental inverter prototype. Specifications of the inverter are as follows: nominal input voltage (Vin): 40 V, nominal output voltage: 208 V phase-to-phase (RMS), switching frequency of the dc/ac converter: 25 kHz, output power: � 2 kW, and output filter inductor and capacitor values: 2 mH and 1 μF, respectively. Also, due to frequency doubling at the ac/dc -converter stage, the frequency of the ac/ac-converter’s output is 50 kHz.
As explained in Section II and as shown in Figs. 6 and 7, the pulsating-dc-link voltage obtained using the new modulation scheme has 3 levels.
Fig. 6: a) Output phase-to-phase voltage of the RHFL inverter obtained using hybrid modulation [6]. b) Zoomed view of the same waveform and c)dc-link voltage. CH1 and CH2: 100V/div.
(c)
Fig. 7: Output voltage phases to phase of the new ZVZCS modulation scheme. a) 60Hz, b and c) enlarged view of output voltage.
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In contrast, the hybrid-modulation scheme [6] yields a 2-level pulsating-dc-link voltage. In addition, it can be seen that the output voltage of the ZVZCS technique has 5-level pulses in 120 degree and 3-level pulses in 240 degree of a switching period. However, hybrid modulation only has two-level pulses on its outputs. As shown in Fig. 6(d), there are some glitches in the pulsating-dc-link voltage obtained using the hybrid modulation. This is discussed in [6]. However, these glitches do not exist in the pulsating-dc-link voltage obtained using the new modulation scheme.
Fig. 8 shows the secondary-side winding voltages of the HF transformer. One can deduct from these voltage waveforms how the placements of the primary-side voltage pulses (generated by the dc/ac converter) should be achieved to yield a suitable multilevel pulsating-dc-link voltage that can be used to switch the ac/ac converter under ZVZCS.
Fig. 9 shows the drain-to-source voltage, current, and gate pulse of an ac/ac-converter switch. It shows that, when the switch turns on, its drain-to-source voltage is zero while current through it is zero before turn-off. Thus, the switch of the ac/ac converter operates under ZVZCS condition.
Fig. 10 demonstrates THD of the inverter output voltage with varying output power. It is observed that, even though the inverter does not have any dc-link filter, the output THD is low due to multilevel modulation. The latter is realized by adjusting the relative placements of the pulses created by the primary-side dc/ac converters. Multilevel modulation also yields higher (ac/ac-converter) output commutation frequency without increasing the switching frequency of the dc/ac converters.
Fig. 8: Voltage waveforms obtained using the new modulation scheme.(top trace) Pulsating-dc-link voltage. (bottom 3 traces) Secondary-sidevoltages of the HF transformers corresponding to phases a, b, and c. CH1, CH3, CH4: 100 V/div and Ch3: 250 V/div.
Fig. 9: Drain-to-source voltage (CH2), current (CH3), and gate pulse (CH1) of an ac/ac-converter switch. CH1: 25V/div, CH2: 250V/div, and CH3: 1A/div.
Fig. 10: THD of the inverter output voltage versus output power (W).
IV. FAULT-TOLERANT SCHEME Another capability of the new overall modulation scheme is the fault-tolerant operation. If one of the phases of the HF dc/ac converter is lost, the inverter output needs to be stabilized quickly by switching over to the redundant phase. As such, in this section, the effectiveness of the fault-tolerant scheme under two different fault conditions is investigated. These conditions affect the magnitude of the output voltage drop in the absence of one of the two primary-side phases needed for implementing the nominal modulation scheme described in Section II. A phase outage leads to distortion and reduction of the pulsating-dc-link voltage and the inverter output. Depending on the time (and hence phase angle) at which the fault onsets, the voltage drop in each output phase
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Fig. 11: Voltage drop due to a fault occurring at 1/3rd o(sec). Traces from top (a) to bottom (e) are as followindicating the onset of failure of one of the dc/ac convvoltage.
Fig.12: Voltage drop due to a fault occurring at 1/4th and horizontal coordinates represent voltage (V) and ac/ac converter vAB. (b) Inverter output voltage. (c) Sig(d) PWM references. (e) Pulsating-dc-link voltage. varies. For instance, if the fault happens b180º, the line-to-line voltage vAB does notvoltage drop; however, this is not the case phase-to-phase voltages. This is because in t
of the line cycle. For all of the plots, vertical and horizontal coordinatesws. (a) Phase-to-phase bipolar output of the ac/ac converter vAB. (b) Inv
verter phases and the onset of fault-tolerant-control action. (d) PWM re
of the line cycle in the full bridge generating pulse for the highest phatime (sec). Traces from top (a) to bottom (e) are as follows. (a) Phasegnal indicating the onset of failure of one of the dc/ac converter phases
etween 120º and t experience any for the other two this specific time
interval, vAB is generated by a seqwhile the other phase-to-phase voltpulses, experiencing a voltage drop
s represent voltage (V) and time verter output voltage. (c) Signal eferences. (e) Pulsating-dc-link
ase. For all of the plots, vertical e-to-phase bipolar output of the s and the clearance of the fault.
quence of bipolar pulses tages consist of unipolar of 50 V.
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On the other hand, depending on the magnitude of the PWM reference used by the lost dc/ac converter compared with the other two phases, the voltage drop at a certain angle may vary. Specifically, at the onset of a fault, if the lost dc/ac converter is the one that provides the voltage pulse for the highest phase, the voltage drop will be highest.
Simulation has been done using MATLAB to verify the sustainability and robustness of the proposed fault-tolerant scheme under two different fault conditions. Fig. 11 shows the effect of a fault onset at 120º. It shows, as evident in the enlarged view of Fig. 11, no voltage drop in vAB but a slight reduction in the voltage ripple due to reduction of the area of bipolar pulses.
Fig. 12, however, shows a voltage drop of about 100 V in the post-fault condition. This is due to a reduction in the area under the unipolar pulses. The significant drop in the inverter output voltage is also attributed to the loss of the dc/ac converter that was supporting the phase with the highest output voltage before the onset of the fault.
CONCLUSION A novel loss-mitigating switching scheme has been proposed for a multi-stage RHFL inverter, which comprises a primary-side dc/ac converter followed by a HF transformer, an ac/dc converter, and an ac/ac converter. The new switching scheme mitigates the switching loss of the ac/ac converter without using any auxiliary circuit. All of the switches of the ac/ac converter switch under ZVZCS condition. A modulation index of !"/� has been achieved using absolute values of the primary-side-voltage references. Further, the outlined switching scheme achieves a low output THD even in the absence of a dc-link capacitor and relatively small output filters. Finally, the outlined switching scheme has been designed in such a way so that if a fault occurs in one of the primary-side phases (fed by a dc/ac inverter) the inverter continues to operate in a stable manner. This is achieved by quickly switching over to the redundant phase.
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