ARTICLE IN PRESS

Microelectronics Journal 40 (2009) 1779–1787

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Microelectronics Journal

0026-26

doi:10.1

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journal homepage: www.elsevier.com/locate/mejo

Low-noise low-power CMOS preamplifier for multisite extracellular neuronalrecordings

Emanuele Bottino a, Paolo Massobrio b, Sergio Martinoia b,c, Giacomo Pruzzo c, Maurizio Valle d,�

a Austriamicrosystems AG, Unterpremstatten 8141, Austriab Neuroengineering and Bio-nanoTechnology Group, Department of Biophysical and Electronic Engineering, University of Genova, Via Opera Pia 11a, 16145 Genova, Italyc Neuroscience and Brain Technology Department, Italian Institute of Technology, Via Morego 30, 16163 Genova, Italyd Microelectronics Group, Department of Biophysical and Electronic Engineering, University of Genova, Via Opera Pia 11a, 16145 Genova, Italy

a r t i c l e i n f o

Article history:

Received 8 May 2009

Received in revised form

9 October 2009

Accepted 14 October 2009

Keywords:

Neuro-electronic interface

Spontaneous electrophysiological activity

recording

Integrated low-noise preamplifier

Micro-electrode arrays

Integrated high value resistance

Standard CMOS technology

92/$ - see front matter & 2009 Elsevier Ltd. A

016/j.mejo.2009.10.003

esponding author. Tel.: +39 0103532775; fax

ail address: maurizio.valle@unige.it (M. Valle)

a b s t r a c t

This paper reports the design and the experimental results of a fully integrated, low-noise, low-power

standard CMOS preamplifier circuit used to record the extracellular electrophysiological activity of in

vitro biological neuronal cultures. Our goal is to use the preamplifier in a fully integrated, multi-channel,

bi-directional neuro-electronic interface.

Among others, two main requirements must be addressed when designing such kind of integrated

recording systems: noise performance and very low frequency disturbance rejection. These two

requirements need to be satisfied together with a small silicon area design, to be able to integrate a large

number of recording channels (i.e. up to thousands) onto a single die. A prototype preamplifier circuit

has been designed and implemented; in this paper we report the experimental results.

While satisfying the above requirements, our circuit offers state-of-the-art smallest area occupation

(0.13 mm2) and consumes 4.5mW. Sub-threshold-biased lateral pnp transistors, used to implement very

high resistance value integrated resistors, have been characterized to determine the resistance spread.

The fabricated prototype, coupled with a commercial Micro-Electrode Array (MEA), has been

successfully employed to record the extracellular electrophysiological spontaneous activity, both of

muscular cardiac cells (cardiomyocytes) and of spinal cord neurons from murines.

& 2009 Elsevier Ltd. All rights reserved.

1. Introduction

Multisite recording systems are becoming a standard tool inneuroscience research both for in vitro and in vivo studies.Advances related to integrated bi-directional interfaces betweenneurons and micro-transducer arrays appear as key stages forfurther development of miniaturized and intelligent neuro-electronic interface systems. Neuroengineering, a recently intro-duced growing field of research, is focused also on the develop-ment of such innovative experimental tools with far-reachingimplications for the future development of brain-machine inter-faces (BMIs) and neural prosthesis [1–4].

Bi-directional communication, real-time interaction, closed-loop systems encompassing artificial devices and biologicalneurons are some of the new issues under investigation [5]. Suchnew devices could provide a common framework of studies, inwhich biological and artificial systems are put in close contact andwhere a direct communication is enhanced and optimized.

ll rights reserved.

: +39 0103532777.

.

To accomplish the previous goals, an efficient and reliable bio-artificial interface in which the biological neurons activity ismeasured in real-time with sufficient spatial and temporalresolutions is required. As reported by Buzsaki [6], large-scalerecordings (i.e. up to thousands of measuring sites), from neuronalensembles, need the implementation of a sophisticated neuro-electronic interface and ask for advanced real-time signal proces-sing techniques.

Many different approaches have been proposed so far, some ofthem regarding only single stages of the interface, some otherscomprising an entire module or even the whole system (see forinstance Refs. [7–13]). In this work, we present design, imple-mentation and test of a new low-power low-noise (LPLN)integrated preamplifier that can be combined to standard micro-electrode arrays (MEAs) or integrated with silicon-based micro-transducer arrays. From a system-level point of view, the proposedand tested system can be subdivided in four main modules (Fig. 1):

�

The micro-transducer chip: it is constituted by microelectrodesarranged in a 2D array structure placed on top of the front-endelectronics by means of proper connections (i.e., springcontacts).

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Fig. 1. Neuro-electronic interface concept scheme; dark gray and light gray lines

represent the recording signal path and the stimulating signal path, respectively.

Black arrows indicate control signals.

E. Bottino et al. / Microelectronics Journal 40 (2009) 1779–17871780

�

The recording interface module (RIM) is dedicated to acquireand record the electrophysiological neural activity, i.e. theextracellular potential at each recording site (i.e. microelec-trode). � The stimulating interface module (SIM) provides proper

stimuli (i.e. currents or voltages) at the desired location withinthe biological tissue or culture.

� The signal processing and control module (SPCM) provides

digital data processing capabilities as well as synchronizationand control signals to RIM and SIM modules.

More specifically, this paper deals with the design, implemen-tation and measurement results of a fully integrated standardCMOS preamplifier circuit. Experimental measurements havebeen performed and spontaneous electrophysiological activity ofboth cardiac and neural cells is reported. The pre-amplifierprovides a mid-band gain of about 40 dB and embeds a band-pass filter frequency response, rejecting both very low and higherthan 2.6 kHz signal frequency components. The measured in-bandinput-referred noise is 5.66mVrms, while size and power con-sumption values are among the lowest among those reported inliterature; 0.13 mm2 and 4.5mW, respectively.

Section 2 describes the methodology we employed to char-acterize the neural activity signals to define the preamplifierspecifications. Section 3 presents the recording module of ourneuro-electronic interface where the preamplifier is inserted. Thepreamplifier itself is discussed in detail in Section 4. Finally,measurement results are shown in Section 5.

Fig. 2. Spontaneous activity recorded by extracellular microelectrodes. The

recorded signal is a mix of spikes and bursts, as highlighted by the insets.

2. Electrophysiological signal characterization

Dissociated cardiac and neuronal cultures were obtained fromcardiac cells and spinal neurons of embryonic rats, at gestationalday 16–18 (E16–18). Cells were then plated on 60-channel MEAs,precoated with adhesion-promoting molecules (poly-D-lysineand laminin), maintained in culture dishes, each containing 1 mlof nutrient medium (i.e. serum-free Neurobasal mediumsupplemented with B27 and Glutamax-I) and placed in ahumidified incubator having an atmosphere of 5% CO2 and 95%O2 at 37 1C [14].

The cardiac cells (i.e. cardiomyocytes) activity was recordedafter few days in cultures, while for neuronal cultures, thenetwork electrophysiological activity was recorded starting fromthe second week in culture, to allow the maturation of synapticconnections among the cells of the network [15].

To determine the signal amplitude range, noise floor andbandwidth, the analysis had to be performed both in time and infrequency domains. So, the recorded time–domain activity wastranslated into frequency–domain power spectral density (PSD)using a proper Fourier-transform algorithm. Depending on thekind of signals (i.e. their waveform) and on the kind of features tobe highlighted, a proper selection of the algorithm parameters,

such as windowing shape and duration, replica length andoverlapping was needed as well [16].

We carried out several measurements at different environ-mental conditions (i.e. culture age, electrical and chemical stimulibefore recording) and varying the sampling frequency, as well asthe recording time. We observed that spikes occurrence frequencywas dependent on stimuli (both electrical and chemical), whereastheir minimum amplitude was about independent on recordingconditions. As we were interested in worst-case conditions, wefocused on signals deriving from spontaneous activity (i.e. neitherchemical nor electrical stimuli were applied).

A typical neuronal electrophysiological signal recorded by aMEA with a commercial amplifying system (Multi ChannelSystems (MCS), Reutlingen, Germany) is depicted in Fig. 2. The20 s stream is composed by a mix of spiking and bursting activity:spikes correspond to the intracellular action potentials. They aresignals with short time duration (about 2 ms) with a negativepeak of about 40–100mV followed by a positive overshoot ofabout 20–40mV (right-inset of Fig. 2). Bursts are a peculiar featureof isolated systems (i.e. systems that do not have external input oroutput); they consist of a dense series of spikes appearing at thelevel of a single channel (left-inset of Fig. 2) followed by silentperiods. Moreover, from the analysis of the stream of Fig. 2,another important feature arises. In fact a noise component is alsopresent. It mainly derives from two sources: a backgroundbiological noise due to the activity of neighboring neurons [17]and the thermal noise due to the high-impedance values of themetal electrodes. Such noise is characterized by a root-mean-square value of Vrms=3.95mV, and a maximum peak-to-peakamplitude of Vpeak=16mV.

When considering a fully integrated system, which takesadvantage of on-chip wirings and connections, the electromagne-tically coupled noise source values can be significantly lower. Forexample, a noise component (smaller of the one above) wouldresult in a value between 10 and 15mVrms. The 10mVrms limit hasbeen assumed.

The signal in Fig. 2 has an average value of about 4.4mV: this isdue to a slow time-varying random drift in the physiologicalsolution bias potential. It has been considered as a low-frequencydrift on the DC component whose maximum reported amplitudewas 100 mVpp [18]. Due to the DC drift, the signal cannot bedirectly coupled to the LNLP preamplifier input to avoid outputvoltage saturation. In all the recordings, we performed (whoseminimum and maximum duration was 1 min and 10 min,respectively), the DC drift potential values were always less than

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Fig. 3. Time and frequency domain analysis of neuron spontaneous electrophy-

siological activity. (a) An extra-cellular action potential followed by a resting-

potential; noise activity is also visible. (b) Signal PSD estimation.

Fig. 4. RIM principle scheme. A MEA provided with n micro-electrodes interfaces a

neuron culture with the preamplifiers. Filtered signals are subsequently sampled

and multiplexed over time.

E. Bottino et al. / Microelectronics Journal 40 (2009) 1779–1787 1781

10mV. Thus, the assumption we made about the drift (i.e. toconsider it as a DC component) seems to be reasonable.

To determine the extracellular potential signal bandwidth,shorter sections (i.e. some tens of milliseconds) of the recordingswere considered and PSD estimations were performed throughthe use of Welch’s method [16].

In Fig. 3a, a representative extracellular potential signal portionused for the PSD estimation is shown: it has a duration t of 50 msand has been sampled at the frequency fs=10 kHz. The choice of t

and fs is due also to considerations about specific signal featureswhich maximize the spectral resolution [12]. The extracellularaction potential DC component has been numerically cancelled. ThePSD signal estimation is depicted in Fig. 3b. We defined the signalband width as the frequency band where 90% of the signal powerlies; in this case the signal bandwidth is 10–2000 Hz.

Signal bandwidth evaluation consistency was checked byperforming many recordings and sampling of extracellularpotential signals up to fs=50 kHz to investigate the signalspectrum up to 25 kHz. In all these cases, the PSD signal shapeis qualitatively similar to the one reported in Fig. 3b.

3. The recording interface module

The RIM is constituted by two main parts: the MEA and thefront-end electronics (Fig. 4).

The first one consists of a commercial MEA (MEA 1060, MCS) of60 planar TiN/SiN microelectrodes (30mm diameter, 200mmspaced); this value represents a good trade-off between spatialresolution and microelectrode impedance value (about 100 kO at1 kHz). Each microelectrode implements a single recordingchannel. The neuron cell culture is placed above the array and isimmersed in a solution that provides the culture nutriment. Acapacitive coupling is established between the cell membrane andeach microelectrode, thanks to this coupling, the extracellularpotential signal, representing the local activity of the cell culture,appears between each microelectrode and a common reference.The common reference is an external electrode dipped in thephysiological solution. Moreover, the reference electrode exhibitssignificantly lower impedance with respect to the single micro-electrodes of the array. As the LNLP preamplifier input isdifferential (i.e., the extracellular potential and the referenceelectrode potential), the preamplifier must be able to withstandthe different impedance values on the two inputs; about 100 kOand less than 1 kO, respectively [19].

The basic element of the RIM is the set of LNLP preamplifiers(one for each recording channel). As stated above, in this work thepreamplifier circuit is connected to a MCS MEA provided with areservoir where the neuronal culture is placed. In the future, themicroelectrodes will be integrated within the analog front-endintegrated circuit (containing the preamplifiers) through post-processing techniques [20]; in this way the RIM will be morerobust with respect to the environmental disturbances capturedby the current experimental setup.

The preamplifiers should provide a proper amplification andfilter-off the noisy components; biological noise due to neighborcells activity, and environmental noise. As stated above, pre-amplifier input is differential, and hence common-mode distur-bances can be rejected, improving the signal-to-noise ratio.

The LNLP preamplifier output signals are then sampled andmultiplexed by next two stages of the RIM.

4. The low-noise low-power preamplifier

4.1. Preamplifier specifications definition

Following Section 2, the preamplifier has to fulfill thespecifications listed below:

�

Voltage gain value of 100 V/V (i.e. 40 dB) (it is a typical valuefor this kind of applications, representing a good compromisebetween open-loop gain requirements and resolution ([8,21])). � Band-pass frequency response with a bandwidth range of 10–

2000 Hz.

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E. Bottino et al. / Microelectronics Journal 40 (2009) 1779–17871782

�

CMRR 440 dB due to the very different single-ended inputimpedance values. �

Fig. 5. The preamplifier circuit scheme.

Fig. 6. Symmetrical OTA schematic.

Low noise contribution i.e.o10mVrms in the bandwidthfrequency range.

The preamplifier must be able to be robust with respect tohighly unbalanced single-ended input impedances, i.e. the non-inverting input impedance microelectrode, 2 orders of magnitudegreater than the inverting one-reference electrode as discussed inSection 3. This unevenness also has a direct impact on thepreamplifier common-mode rejection ratio (CMRR): simulationsshowed a CMRR degradation of about 20 dB at 2 kHz whencompared to the balanced input impedance values case. Thus thepreamplifier input impedance has to be high enough to compen-sate for the common-mode rejection degradation.

To prevent biological tissue damaging, in a system providedwith a thousand recording channels, power consumption must beminimized [22,23]. Assuming a 1000-electrode recording struc-ture occupying 100 mm2 of silicon area, to comply with biologicalconstraints a single channel of the system must not dissipatemore than 80mW.

Many preamplifier implementations have been proposed so far(e.g., Refs. [7,8,12,13,24]), but majority of them cannot bepractically implemented in a complete fully integrated CMOSstandard interface due to an excessive complexity (i.e. large-areaoccupation, excessive power consumption, non-standard fabrica-tion process). Commercial recording systems use passive MEAs(i.e. no electronics integrated with the recording array) compris-ing 60–120 electrodes with typical pitches from 100 to 500mm.This means that, for electrode distance of 200mm, each electrodehas a surrounding free space of 0.04 mm2 where the electroniccircuitry could be implemented: in turn, this value is too small, aslow cut-off frequency circuitry, needed to get rid of DC and low-frequency components, prevents the use of small size capacitors.We estimated a more realistic value of about 0.2 mm2 of siliconarea for each recording channel.

Previous considerations translate into the following specifica-tions:

�

Power consumption per channel o80mW to avoid biologicaltissue damage. � A single preamplifier should fit in 0.2 mm2 to allow the

integration with MEA having sufficient spatial resolution.

4.2. Low-noise low-power preamplifier design

The key rule we followed for the system design was simplicity,as we wanted a very small silicon-area occupation as a qualifyingfeature for the LNLP. This way, we could place the front-endconditioning electronics beneath each microelectrode. Thus, weconceived an architecture comprised by simple-concept stages,which were specifically tailored for our application.

Two fundamental requirements for the preamplifier are thelow-frequency common-mode rejection and the low-noise con-tribution. Different approaches exist to achieve these goals, bothexploiting continuous time (e.g. chopper stabilization, gm-Cfiltering) and sampled time (e.g. auto-zeroing, correlated doublesampling) techniques [25]. All these techniques, share theproblem of requiring very large silicon area or very high power.Moreover, sampled time techniques pose an additional risk due tothe sampling frequency harmonics folded back into the baseband.Therefore, we decided to embed the band-pass filter in thepreamplifier to reduce the system complexity. Moreover, to keep

small the electronic size and to avoid further noise generation dueto switching architectures, we decided to get advantage of acontinuous time approach.

Fig. 5 shows the preamplifier topology (first proposed in [23]):it is an operational transconductance amplifier (OTA) providedwith a resistive–capacitive symmetrical feedback network. Thisnetwork is responsible for the high-pass filter behavior (HPF),which in conjunction with the OTA low-pass filter transferfunction (LPF), realizes the band-pass filter (BPF).

Assuming an ideal OTA (i.e. with an infinite open loop gain)and C1, CLbC2, the preamplifier mid-band voltage gain AvM isequal to the ratio C1/C2; the lower corner frequency fL and theupper corner frequency fH values, respectively, are given by

fL �1

2pRC2ð1Þ

fH �gOTA

m

2pAvMCLð2Þ

where gOTAm � gm1gm6=gm4 represents the equivalent OTA trans-

conductance (please refer to the circuit reported in Fig. 6).

4.2.1. High resistance value integrated resistors

We designed capacitor dimensions as small as possible,because usually capacitors realization requires large silicon area(as a reference, using a 0.35mm CMOS standard process, a 50 pFPoly1–Poly2 capacitor occupies about 0.06 mm2). At the sametime, our goal was to implement a very low value of fL. This could

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E. Bottino et al. / Microelectronics Journal 40 (2009) 1779–1787 1783

be done only if the value of R (see Eq. (1)) was sufficiently high(i.e. up to 1 GO), in order to obtain very high value time constants(e.g. tens of milliseconds or more). Unfortunately, the implemen-tation of high resistance value integrated resistors is one of themajor issues in integrated analog design, even exploiting a high-resistive poly process. Thus, we used the extremely largeimpedance provided by integrated lateral bipolar transistors(BJT) [26].

The BJT is in fact a lateral pnp structure realized with a PMOSdevice, where the p+-type emitter (or drain) is shorted to the gate,and the p+ collector (the source) is shorted to the n+ base (thebulk). By applying a positive voltage between the collector and theemitter (i.e. DV40 V) the device acts as a diode-connected PMOS,while for negative DV values, it turns into a lateral diode-connected pnp. The key feature of the MOS-bipolar device is thatit exhibits a very high resistivity (i.e. R410 GO) when the voltagedrop DV is well below a given threshold (e.g. |DV|o0.2 V).

There are some drawbacks in using the lateral bipolartransistors: first, the device is usually not very well characterizedand foundry models are inaccurate. So, most of the times, it isnecessary to experimentally characterize it.

Second, lateral BJTs are quite sensitive to light: emitter–basejunction photocurrents proportional to the light intensity havebeen reported for irradiance values of some tens of mW/m2 [26].so their junction must be properly shielded when integrated withthe MEA.

Third, the linearity is poor, so they are unsuitable forapplications requiring low distortion for large output signals.One can partially solve the problem by connecting two pnptransistors in series, but in this case, biasing the potential at theconnection node becomes difficult due to the device inherentlyhigh impedance.

Fourth, the reproducibility of the device transfer characteristic(i.e. the device resistance given an applied voltage) can be quitelow. In our application, although, this is a minor issue, a minimumimpedance value (e.g., about 100 MO) is guaranteed around theorigin (i.e., for a small applied voltage).

In our case these drawbacks do not affect our design to a largeextent as the application does not need high accuracy regardingthe low-frequency cut-off frequency fL; linearity is not an issue aswell because the input signal, even if amplified by a factor of 100,remains well below the threshold voltage value where the deviceimpedance is maximum. Moreover, lateral transistor silicon areaoccupation is as small as 13.4�13.4mm2 (using AMS C35 models).So, the use of such devices seems justified.

The sizing of C1,2 needs some caution as well. As their ratiodefines the preamplifier mid-band gain, it must be set to 100. Thisposes a limit on both C1 and C2 values: the former cannot be toobig due to silicon area constraints, the latter cannot be too smallotherwise its value would be degraded by process non-idealities(i.e. fringing capacitance and border effects). Moreover, C2 sets,together with the lateral pnp transistor impedance, the lowercorner-frequency fL. We set C1=20 pF and C2=200 fF.

4.2.2. Open-loop gain

The value of AvM (the preamplifier closed-loop gain or CL gain)is strictly correlated to the OTA open-loop (OL) low-frequencyvoltage gain AOTA

v0 . In particular, assuming the latter is constantwithin the bandwidth of interest, we can write

AvM �AOTA

v0 ðsC1RÞ

ðAOTAv0 þ1ÞðsC2Rþ1ÞþsC1R

ð3Þ

We determined the minimum value of AOTAv0 needed to obtain

an acceptable precision of the CL gain evaluating the relative erroron AvM due to the finite OL gain value. The AOTA

v0 value cannot betoo small, but also it is useless to increase it too much because

such an effort would be frustrated by the capacitors mismatch.Technological process data indicate that a typical absolutemismatch error for an integrated poly1–poly2 capacitor is around15–20%. With proper layout design techniques (i.e. commoncentroid), the relative mismatch error between two capacitorscan be reduced to less than 1%. So we choose the value of AOTA

v0 soas to yield a maximum error on AvM comparable to the one dueto layout capacitors mismatch, i.e. AOTA

v0 ¼ 80 dB. Such a gain can beachieved by most CMOS OTA architectures, but considerationson noise performances, silicon area occupation (i.e. devicesnumber and size), and power consumption must be taken intoaccount.

4.2.3. OTA architectures noise comparison

As stated in Section 2, extracellular potential minimumamplitude value is about 40mV, whereas the maximum noisefloor is 10mV. With such small voltage values at stake, thepreamplifier noise contribution must be minimized to avoidunwanted increase of the noise floor. In this perspective,we performed a detailed noise analysis on four OTA architectures(described in [27]), which could be employed to designthe preamp circuit. The analysis was aimed at identifying thecircuit topology, which would have generated the smallestamount of noise.

The four OTAs are: (a) a symmetrical configuration withinverting output stage, (b) a Miller transconductance amplifier, (c)a single-stage cascode, (d) a folded cascode. The four topologieswere chosen for the satisfactory trade-off between gain andcomplexity; in addition, we employed single-ended outputconfiguration, implementing the differential pair with PMOStransistors. Evaluating the input-referred noise V2

irn for eachtopology, we found out that the least noisy was the symmetricalOTA, depicted in Fig. 6.

4.2.4. OTA circuit design considerations

The low-frequency OTA transfer function AOTAv0 is given by

AOTAv0 �

gm1

gm3

gm6

gd6þgd8ð4Þ

To achieve AOTAv0 ¼ 80 dB we chose to bias M1 and M2 in weak

inversion (where, for a given current, the value of gm is higher),whereas M3–M8 work in deep strong inversion (to minimize gm3

while maximizing gd6 and gd8). To avoid very large values of W1,2,we set the bias current as IB=1mA; in this way the currentconsumption was limited as well. Unfortunately, decreasing gm3,4

too much causes a stability problem, as the two non-dominantpoles gm3/(Cg3+Cg5) and gm4/(Cg4+Cg6)) are shifted to low-frequency. To overcome the problem and still have a high gain,we employed a mirroring factor between M3,4 and M5,6 smallerthan one, so that the output impedance is increased and powerconsumption is lowered as well. Anyhow, lowering the current inthe output branch decreases the value of gm6 also; this, in turn,can degrade once more AOTA

v0 (see Eq. (4)).When implementing the feedback loop, fH becomes equal to

the one reported in Eq. (2).Thus, one must carefully size load capacitance value CL and

gOTAm to obtain a proper value for fH. A gOTA

m value, which complieswith all the aforementioned constraints, could be in fact too lowto insure a sufficient bandwidth to the preamplifier. Addingtwo cascode MOSes to the output stage would overcome theproblem, but at the cost of using more silicon area for the biasingcircuitry and adding a heavy contribution to flicker noisegeneration.

Another solution to get a sufficient bandwidth is to dec-rease CL; in this case it is advisable to add a buffer at the OTAoutput to decouple any capacitive load (i.e. stray capacitance); the

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Fig. 7. Bioamplifier chip microphotograph.

Fig. 8. Preamplifier microphotograph.

Table 1Comparison of the preamplifier performance with those reported in [28].

Data [28] This work

Technology (CMOS): minimum channel length 0.18 0.35

Supply voltage (V) 1.8 71.65

Supply current (mA) 4.67 1.36

Mid-band gain AvM (dB) 49.52 39.4

AOTAv0 (dB) 86 73

fL (Hz) 98.4 0.25

fH (kHz) 9.1 2.6

Virn (mVrms) 5.6 5.66

CMRR (dB) 52.7 61.7

Size (mm2) 0.05 0.13

Power consumption (mW) 8.6 4.5

Noise Efficiency Factor (NEF) (see Ref. [23] for details) 4.9 5.08

E. Bottino et al. / Microelectronics Journal 40 (2009) 1779–17871784

final value of CL must take into account the buffer inputcapacitance as well.

4.3. Preamplifier circuit measurements and discussion

The preamplifier was implemented using the 4-metal 2-polyTSMC CM035 technology provided by the MOSIS service (www.mosis.com). The fabricated test chip is shown in Fig. 7; itcomprised, apart from the preamplifier (1), a buffer (2)—replicaof the OTA output buffer employed in the preamplifier—and twodifferent circuit sub-blocks included for separate characterization:the symmetrical OTA (3) and the lateral pnp structures (5).

Structure (4) is an inverting amplifier containing in itsfeedback loop a lateral pnp and was used for an indirectcharacterization.

In Fig. 8 the preamplifier is visible in detail. The two bigrectangular structures are the 20 pF capacitors (C1) comprised by100 unity caps each. The two 200 fF capacitors (C2) are realizedwith two unity caps placed at the very centre of the rectangularstructures. Other structures are visible, as well such as thedifferential pair, the current mirrors and some switches around it.

The lateral pnp devices are indicated by the text arrow (beside thelower right corner of the mirrors).

Table 1 shows a performance comparison between ourBioamplifier and a state-of-the-art preamplifier [28].

The Bioamplifier mid-band gain AvM is measured at 100 Hz;ideally it should have been 40 dB: the lower value is due tothe finite OTA open loop gain AOTA

v0 , see Eq. (3). High-resistancemeasurements are consistent with the reported fL value, as theyshow a minimum sub-threshold impedance of 5.4�1011O(see Fig. 9).

fH is higher than expected; this is probably due to the layout ofCL, not so accurate as the one adopted for C1 and C2 (i.e. we simplyused the parametric cell layout provided with the design-kit). It isworth noting that the measured in-band noise performance of ourBioamplifier includes the buffer stage used to decouple the LNLPoutput stage to the chip bond-pad as well. In the RIM, the buffer isrequired for impedance adaptation (see Appendix A), but a singlebuffer can be shared among several channels. A graph of themeasured noise spectrum of the Bioamplifier is depicted in Fig. 10.

The common-mode rejection ratio (CMRR) is an importantparameter in our application, as the two inputs are highlyunbalanced: the reference electrode is dipped in the heavilyionized physiological solution where the neurons are grown. so itsseries impedance is small (i.e. about 1 kO), on the other hand, theinput electrode sees a series impedance of about two orders ofmagnitude greater. Thus, to insure that the preamplifier rejects toa sufficient extent common-mode disturbances, it is necessarythat its CMRR is high enough (i.e. 60 dB or greater) to cope withthis impedance unbalance.

Area occupation and power consumption do not take intoaccount the internal buffer as only one of them is needed for manychannels. Compared with the preamplifier reported in [28], ourdesign offers less power consumption, and more CMRR. Noise isthe same, even if in our case the noise due to the buffer is includedas well. Supply voltage and silicon area are higher, even if weexploited a 0.35mm technology, whereas in [28] a 0.18 process isemployed. When compared to other proposals (see for example[23]), our Bioamplifier offers one of the best trade-off in terms ofnoise, power consumptions and silicon area occupation. A detailedcomparison between the performance reported by differentimplementations and this work appears in [27].

A statistical characterization on 15 chips was performed toevaluate the reproducibility of critical parameters such as closedloop gain, low-frequency cut-off and lateral pnp resistance value(Rpnp). Some results of these evaluations are shown in Table 2.

From the above table, one could argue that the reproducibilityof integrated high-resistive device is quite low. The BJT resistancestandard deviation is half of its mean value; this is directly

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Fig. 9. MOS-BJT I/V characteristic characterization. The characterization has been carried out measuring 50 lateral bipolar devices. The light gray and dark gray lines

represent the minimum and the maximum measured values, respectively.

Fig. 10. Noise spectrum measurement.

Table 2Some bioamplifier parameters statistical analysis (Max. voltage drop across the

lateral BJT: 7100 mV).

Mean s2 s

AvM (V/V) 89.65 0.32 0.57

fL (Hz) 0.46 0.38 0.59

fH (kHz) 2.55 0.01 0.12

PNP resistance (GO) 298 � 154

Fig. 11. The PCB used for the experimental measurements with the Bioamplifier chip.

E. Bottino et al. / Microelectronics Journal 40 (2009) 1779–1787 1785

reflected in the fL parameter, where the standard deviation is evenhigher than the mean value. This is due to the small number ofmeasured samples; in fact, we found one chip that had quitedifferent characteristics from the rest of the samples (e.g. its fL was2.5 Hz, whereas for the other samples the values of this parameterwere comprised between 0.22 and 0.40 Hz). Eliminating thesesample results from the statistical analysis, we get for examplemean (fL)=0.29 Hz and sigma (fL)=0.05 Hz, respectively. A similarthing happens for Rpnp. Still, even considering the small number ofsamples with an unfavorable distribution the maximum value offL is 2.3 Hz for a 3-Sigma Gaussian distribution model (99.75% ofthe whole statistical distribution): this is an acceptable resultconsidering our particular application.

5. Experimental results: recordings of electrogenic cells

After the electrical characterization, the preamplifier function-alities were tested in real operating conditions (i.e., recordings of

electrogenic cells). For this purpose, experimental measurementsessions including the use of cardiomyocytes and neurons cellswere performed. The neural samples were treated in the samemanner described in Section 2.

To effectively test the circuits, an evaluation board (PCB) wasrealized. It comprised the prototype chip and a commercialdiscrete MEA directly coupled to it by means of thin copper wires(Fig. 11). The board was equipped with an aluminum shield, whichwas shorted to ground during the experimental recordings. Theshield was needed due to the very noisy environment and despitethe use of a Faraday cage enclosing the whole experimental set-up(Fig. 11 shows the PCB with the top aluminum plate removed).

To evaluate the preamplifier circuit, we used first cardiomyocytes,as the signal bandwidth is comparable with the neuronal one,whereas their amplitude is about 3–10 times larger. Fig. 12 shows anexperimental recording of 4-day-old cardiomyocytes spontaneouslyactive. The recording was acquired with a NI6071E 12-bit Digital-to-Analog Quantizer (DAQ) by National Instruments (Austin, TX, USA).It is important to note that such recordings were taken connectingthe Bioamplifier output directly to the acquisition board and nopost-processing was performed on the signals.

After this positive evaluation, the preamplifier circuit has beenemployed to record electrophysiological activity from 20 DIVs(Days in vitro) spinal cord neurons. The choice of this kind of cellsderives from their pattern, characterized by high-amplitude signalspikes and long bursts (i.e., packed sequence of spikes). The

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Fig. 12. Five seconds of chicken cardiac muscle cells electrophysiological activity.

Fig. 13. (a) Neural activity recorded by one channel of a MEA and amplified with

the proposed bioamplifier. The original recording was 15 s long, here only 1.5 s are

shown. (b) Same recording channel of (a) acquired with the MCS system.

Fig. 14. Measured preamplifier CMRR with an infinite input impedance (circles),

with a 100 kO resistance (squares) and with an unbalanced 1 k/100 k input

impedance (triangles).

E. Bottino et al. / Microelectronics Journal 40 (2009) 1779–17871786

acquired signals are presented in Fig. 13, where a comparison withsignals recorded with the MCS pre- and filter amplifier (gain1200� ) is shown.

Although the noise level is rather high (�10mVrms), the spikingactivity is evident and well-separated from the noise floor.

The recorded signal shown in Fig. 13a has been modulated by a50 Hz disturbance. Such an effect is due to the recording set-up andthe degradation of the CMRR with respect to frequency (see Fig. 14).The former depends on the connection between the MEA and theprototype chip by means of long, non-shielded thin copper wires(see Section 4) that act as antennas collecting environmental noise.This problem will be overcome in the preamplifier final versionimplementation where the preamplifier circuits will be integratedtogether with the MEA into the same chip. The latter depends on theunbalanced input impedance of the input and reference electrodes(see Section 4). To address this issue the next version of thepreamplifier circuit will include two input buffers (given the AC-coupled structure, they could be implemented by simple sourcefollower stages connected to the preamplifier inputs). Preliminarysimulations showed that noise component increase would beroughly 50% (i.e. noise would increase to 6.9mVrms) and powerconsumption would increase 3mW for the latter.

Inspite of this, the preamplifier demonstrated its functionalityin adverse environmental conditions, with real biological samples,and fulfilled all the required specifications

6. Conclusions

In this paper, we presented the design, implementation andexperimental measurement results of a fully integrated CMOSlow-noise low-power preamplifier for recording in vitro extra-cellular potential signals of neuronal cells. The circuit is designedwith the aim of inserting in a modular bi-directional fullyintegrated interface system. The interface system should providea useful tool for the definition of novel neuro-electronic interfaces,in which biological neurons and artificial devices communicatemimicking the hierarchical organization of the vertebrates’ centralnervous system.

The preamplifier circuit design is precisely tailored on suchapplications and offers very good performance in terms of siliconarea occupation, power consumption, noise and CMRR, withrespect to other reported implementations. The obtained resultsencourage to proceed in the direction of a fully integratedstructure, in which LNLP amplifier is directly integrated in thesame chip that implements the recording electrodes.

The fully integrated system could provide an innovativemeasurement platform with clear implications also for in vivo

brain–computer interface applications.

Acknowledgments

The authors would like to thank the MOSIS service for the chipfabrication. The authors are also grateful to Dr. Alberto Dei(Palmics Srl) for the realization of the evaluation board.

Appendix A

A.1. Cell-microelectrode interface model

We electrically modeled the interface between the microelec-trode, the electrolyte junction and the neuron (microelectrode–electrolyte junction–neuron interface or MJN): (a) to analyze theneuron culture electrical properties to refine the design of theanalog recording front-end, (b) to verify by simulation the LNLPpreamplifier circuit functionality when connected to a realisticsignal source model.

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E. Bottino et al. / Microelectronics Journal 40 (2009) 1779–1787 1787

The MJN interface circuit model consists of three main blocks:(a) a neuron patch membrane that generates the action potentials,(b) the neuro-electronic junction made up of a simple electroniccircuit, which can be tailored to simulate different operatingconditions and configurations (weak or tight adhesion conditions)[29,30], (c) the microelectrode model based on the schemedevised by Robinson [31].

The MJN model was employed in the LNLP design simulationsin order to check its behavior assuming different conditions forthe neuron–electrode coupling.

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