New Protection Circuit for High-Speed Switching and Start-Up of a Practical Matrix Converter

3100 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 55, NO. 8, AUGUST 2008

New Protection Circuit for High-Speed Switchingand Start-Up of a Practical Matrix Converter

Jon Andreu, José Miguel De Diego, Iñigo Martínez de Alegría,Iñigo Kortabarria, José Luis Martín, Member, IEEE, and Salvador Ceballos

Abstract—The matrix converter (MC) presents a promisingtopology that needs to overcome certain barriers (protection sys-tems, durability, the development of converters for real applica-tions, etc.) in order to gain a foothold in the market. Taking intoconsideration that the great majority of efforts are being orientedtoward control algorithms and modulation, this paper focuses onMC hardware. In order to improve the switching speed of theMC and thus obtain signals with less harmonic distortion, severaldifferent insulated-gate bipolar transistor (IGBT) excitation cir-cuits are being studied. Here, the appropriate topology is selectedfor the MC, and a recommended configuration is selected, whichreduces the excursion range of the drivers, optimizes the switchingspeed of the IGBTs, and presents high immunity to common-modevoltages in the drivers. Inadequate driver control can lead tothe destruction of the MC due to its low ride-through capability.Moreover, this converter is especially sensitive during start-up,as, at that moment, there are high overcurrents and overvoltages.With the aim of finding a solution for starting up the MC, a circuitis presented (separate from the control software), which ensurescorrect sequencing of supplies, thus avoiding a short circuit be-tween input phases. Moreover, it detects overcurrent, connection/disconnection, and converter supply faults. Faults cause the circuitto protect the MC by switching off all the IGBT drivers withoutlatency. All this operability is guaranteed even when the supplyfalls below the threshold specified by the manufacturers for thecorrect operation of the circuits. All these features are demon-strated with experimental results. Lastly, an analysis is made of theinteraction that takes place during the start-up of the MC betweenthe input filter, clamp circuit, and the converter. A variation of theclamp circuit and start-up strategy is presented, which minimizesthe overcurrents that circulate through the converter. For allthese reasons, it can be said that the techniques described in thispaper substantially improve the MC start-up cycle, representinga step forward toward the development of reliable MCs for realapplications.

Index Terms—Driver, matrix converter (MC), overcurrent,overvoltage, protection, reset, start-up, switching.

I. INTRODUCTION

THE CLEAR intent of the power electronics market isto attain the following objectives: improved interaction

Manuscript received July 24, 2007; revised March 12, 2008. PublishedJuly 30, 2008 (projected). This work was supported by Ministerio de Educacióny Ciencia under Project ENE 2007-67033-C03-02/ALT.

J. Andreu, J. M. De Diego, I. M. de Alegría, I. Kortabarria, and J. L. Martínare with the Department of Electronics and Telecommunications, University ofthe Basque Country, 48013 Bilbao, Spain (e-mail: [email protected]).

S. Ceballos is with the Energy Unit, Robotiker-Tecnalia Research Centre,48170 Zamudio, Spain, and also with the Department of Electronics andTelecommunications, University of the Basque Country, 48013 Bilbao, Spain(e-mail: [email protected]).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TIE.2008.922575

with the grid, flow of bidirectional power, high efficiency andoperation at high switching frequencies, small size and, lastly,integration of complex and intelligent solutions within the samepower module. In principle, the matrix converter [1] (MC)meets all of these targets.

Fig. 1 shows a wind turbine with a three-phase MC. TheMC is composed of nine common-collector (CC) bidirectionalswitches. It contains an input filter and a clamp circuit withtwo diode bridges, a Cclamp capacitor, a crowbar, and an Rntc

resistor. The MC feeds the rotor of a doubly fed inductionmachine [2]. The six main characteristics of the MC (Fig. 1)are given here.

1) It is an “all-silicon” ac/ac converter made up of n × mbidirectional switches [3].

2) The MC has no significant reactive elements [4]; thesecomponents are usually sensitive to temperature and veryexpensive, and their price has not shown a downwardtrend over the years. Thus, the MC can operate in highand low atmospheric pressure environments, and at hightemperatures, where other converters are seriously re-stricted by the limitations of electrolytic capacitors.

3) Because of its inherent bidirectional topology, the MCcan operate in all four quadrants, instantaneously takingor delivering power from or to the grid [5].

4) Using appropriate modulation strategies, it is possibleto achieve sinusoidal currents in the grid and sinusoidalvoltages at the load [6], with a unity power factor [7],having a low harmonic distortion [8]–[12] in these wave-forms. There are different ways of improving the totalharmonic distortion (THD) of the MC output waveforms,e.g., increasing the modulation frequency, using a biggerfilter, or using improved modulation algorithms. In [8],a modulation method called subenvelope plus a modifiedMC improve the THD [9], [11] and add zero-voltage vec-tors in the modulation sequence; in [10], the conventionalPWM is modified to improve the THD with unbalancedinput voltage; and lastly, in [13], a genetic algorithm isused in order to attain a good MC performance.

5) Although the MC uses a high number of switches, thereis a tendency in the market toward a price reduction ofsilicon components. The high number of switches meansa higher distribution of the thermal stress [14] in theswitches.

6) The simultaneous commutation of the bidirectionalswitches used in MC is very difficult to achieve withoutgenerating overcurrent or overvoltage spikes (its two ba-sic rules cannot be fulfilled). This problem can be solved

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ANDREU et al.: NEW PROTECTION CIRCUIT FOR HIGH-SPEED SWITCHING START-UP OF PRACTICAL MC 3101

Fig. 1. Matrix converter, input filter, and clamp circuit integrated in a wind turbine platform.

using the four-step commutation technique [3], [15], [16].Comparing with a VSI, the MC commutates at lowervoltages; furthermore, it will often commutate at very lowor zero volts. Thus, the MC will offer lower switchinglosses than a conventional inverter. On the other hand, theabsence of large reactive elements will allow the MC towork at high fsw; this performance will lower the sizeof the input filter. Moreover, high operating frequenciesmean high-order harmonics, which are less harmful forthe grid.

Taking the overall characteristics of the MC, it could providesolutions for a wide range of applications [14], [17] (recentlyVestas has patented a variable-speed wind turbine having anMC [2]).

The MC is a very promising technology that may contributeto the development of power electronics, but nowadays, severaltechnological barriers must be overcome in order to extend itsuse in commercial applications. Some of the challenges aregiven here.

1) The MC has a limited voltage transfer ratio of√

3/2 [3].2) The absence of natural bidirectional switches, together

with the high number of power switches, means higherconnection complexity.

3) The modulation and control techniques are a challengingtask that can be carried out with modern digital signalprocessors (DSPs) and high-capacity field-programmablegate arrays (FPGAs).

4) Protection of the converter is a complex task [18], be-cause there is no way to store energy; in this way, the MCis very sensitive to voltage dips and distortions in the gridhaving a poor ride-through capability.

In the MC, the great majority of scientific effort is beingfocused on improving the control techniques (wind generation[2], distributed generation [19], loss reduction [7], common-mode voltage reduction [20], sensorless control [17], [21]–[23],etc.), modulation (space vector modulation [24] and other vari-ants [25], direct torque control [22], [26], etc.), waveform qual-ity [8], [27], stability analysis [28], and semisoft commutation[3], [15], [16]. Likewise, there are several references in whichthe behavior of the MC in the presence of unbalanced networksis improved [29].

However, there are very few references that study MC hard-ware and the problems this involves. Most of them concentrateon new switches with reverse blocking capacity (reverse-blocking IGBT) [30] and on the clamp circuit [18], [31] asMC protection circuit.

It can be said that there are virtually no references thatconcentrate on auxiliary circuits used to improve the behaviorand degree of protection of the converter. In this sense, thispaper examines a number of different MC IGBT excitationtopologies, presenting a configuration that improves the switch-ing of the converter. On the other hand, and bearing in mind thatone of the critical moments of the MC is start-up, an analysisis made of the problems of the converter during start-up andduring supply transitories or faults of the converter’s auxiliarycircuitry. All of these problems are resolved with a new start-upand reset circuit. Lastly, the interaction between the input filterand the MC clamp circuit is taken into consideration duringstart-up. Moreover, a start-up sequence and variation of theclamp circuit is proposed, so that the current and voltage spikesduring the start-up of the MC are reduced. Therefore, this paperrepresents a step forward in efforts to increase the reliability ofthe MC.


Fig. 2. Relationship between input filter cutoff frequency fc and CF and LF .

II. MC REQUIREMENTS: HIGH-SPEED COMMUTATION

In order to be able to take maximum advantage of the MC,this must operate at high switching levels. Several reasons tojustify this statement are set out here.

1) By selecting high switching frequencies fsw [32], it ispossible to work with the input filter (Fig. 1) with ahigher cutoff frequency fc. This lowers the values ofits reactive components (CF and LF ), improving theinitial characteristic of the “all-silicon” MC. The relationbetween the cutoff frequency fc of the second-order inputfilter (Fig. 1) and the reactive components is given by

fc =1

2π√

CF LF

. (1)

As shown in Fig. 2, a reduction in the size of CF andLF increases the cutoff frequency of the filter; thus, ahigher modulation frequency is needed for an adequatewaveform quality.

2) In order to reduce the noise derived from the switchingof the semiconductors around fsw, it will be necessaryfor the switching frequency to be as high as possible, sothat it is distant from the fc frequency. High operatingfrequencies mean high-order harmonics, which are lessharmful for the grid; thus, this ensures that the voltageand current signals are of optimum quality.

3) Due to the fact that the MC has no significant reactiveelements [4] (which are usually sensitive to temperature),the MC can operate at high temperatures (this, in turn,allows it to operate at high frequencies), where otherconverters are seriously restricted by the limitations ofelectrolytic capacitors.

4) Through the use of vector modulation techniques [spacevector modulation (SVM)], low harmonic distortion sig-nals can be obtained. There is a variant of the SVM, i.e.,the double-sided SVM (DSSVM) [24], which achieves,

on the one hand, an even distribution of the number ofcommutations in each of the semiconductors, therebyavoiding overheating problems [32]. On the other hand,the quality of the synthesized signals by the MC isimproved in comparison with the traditional SVM [33].All this is attained by applying a series of symmetricalsequences of 14 vectors (combination of three activeswitches) throughout a modulation period (Tsw).

When any modulation technique is applied (SVM,DSSVM, DTC, etc.), the transition from one vector toanother must be made in such a way as to comply withtwo basic rules of the MC. It is for this reason that,together with the corresponding modulation technique,the four-step or semisoft commutation technique is used[3], [16].

The application of the DSSVM, together with the four-step technique, makes the number of commutations givenin the MC during a modulation period (Tsw) considerablygrow (24 switch-ons and 24 switch-offs), which requires avery good dynamic response from the entire commutationstage.

5) New-generation integrated circuits, such as the FPGAs,can respond to the high computational load required bythe MC, executing modulation algorithms at high speed(even as high as megahertz). This shows that there is norestriction with regard to the control part, with the bot-tleneck being the IGBT (bandwidth and heat dissipationcapacity) and the driver that controls this.

III. HARDWARE SOLUTION FOR

HIGH-SPEED COMMUTATION

The large number of commutations, together with the oper-ating requirements at high fsw, means that both the control andthe IGBTs must quickly respond. All this requires, in turn, arapid response of the drivers that control these switches. The


Fig. 3. LTD trying to command an MC bidirectional switch: (a) CC and (b) CE.

main driver topologies used in power converters are analyzedhere, and the viable topology for the MC is selected. Followingthis, a configuration that improves the commutation speed andcommon-mode immunity of the MC is described.

A. Suitable Drivers

1) Level Translator Driver (LTD): Drivers typically used inother power converters (e.g., back-to-back), such as the IR2213of International Rectifier (Fig. 3), seem to be the best option forthe MC. This offers the possibility of ordering two switches atthe same time; it is floating and has a level translator, whichmakes it unnecessary to supply the driver with a dc source.In this way, galvanic insulation is not necessary (it makes thedriver faster), and six dc sources are eliminated, making this thesimplest and cheapest design.

Moreover, it can support a high-voltage offset (Voffset 1200 V); this is important in the MC as its IGBTs have to blockfloating voltages that arrive in the input voltage line–line, i.e.,

Vblock_MC_switch =√

3Vin_mc. (2)

On the other hand, the LTD can deliver large current spikes(up to 2A), which quickly loads the IGBT input capacitor Cies,quickly making this commute.

First, through the HO and LO outputs (Fig. 3), the drivermust govern the two IGBTs that form the bidirectional switchof the MC. So that the HO output can send a pulse to thecorresponding IGBT, terminal VS must be joined at some timewith COM (GND). This allows capacitor Cho to charge throughthe Vcc supply and the Dlh diode. In a typical application (e.g.,inverter), the Cho charge is provided when the LO switch isactivated.

However, in an MC, voltages are floating. The followingequation is complied with at all times:

VS , VCOM = Vin_mc where Vin_mc ∈ Vr, Vs, Vt. (3)

In other words, VS and VCOM (see the thick line in Fig. 3)will have the value of one of the input voltages Vr, Vs, or Vt

(Fig. 1).Let us consider, for example, that the modulator applies the

sst vector, i.e., switches SU, SV, and TW active (Fig. 1). In this

case, point W (Fig. 3) will have a voltage Vt, and point r willhave Vr. Under these circumstances, the common node of thebidirectional switch will have a voltage equal to Vr or Vt; this isdependent on Vr > Vs or Vr < Vs, with the bidirectional switchbeing in the CC or common emitter (CE). On applying theremaining possible vectors to MC, equivalent situations will beproduced. For this reason, in none of the case are the capacitorsCho and Clo adequately charged.

Moreover, for the driver to operate within the specifications,VS ≥ VSS must be complied with. This does not occur in theMC (or when bidirectional switches are used in CC [Fig. 3(a)]or in CE [Fig. 3(b)] as the IGBT emitter is a floating point at alltimes, the voltage of which oscillates between ±|Vin_mc|. Forall these reasons, this kind of driver (LTD) is not appropriatefor the MC.2) Optocoupler Fitted Driver: Drivers, such as the HCPL-

3180 of Agilent Technologies, can be used in the MC and areconceptually different from the previous ones. These are fittedwith an optocoupler (greater propagation delay than the LTDfloating driver) to galvanically insulate the system as the voltagelevels of the IGBTs emitter oscillate between ±|Vin_mc|. In thiscase, nine drivers apply a reference voltage with respect to theinput phases of the MC, and another nine applies with respectto the output phases. Unlike the floating drivers, these musthave an isolated supply source in order to be able to provide thenecessary energy to the IGBT gate. The next section describesthe use of this driver in the MC.

B. Optocoupler Driver (TOD) and RecommendedConfiguration (ROD)

The inputs of the drivers must be excited in a controlledmanner, so that the IGBTs of the MC commute. Frequently,the control devices (i.e., FPGA/DSP) do not have outputs inopen collector (OC), and as a whole, when they do have them,these do not support the current levels required in the commu-tation. As the drives cannot be directly excited, between theFPGA/DSP and the corresponding driver (Fig. 4), there mustbe an intermediate stage—OC buffer—that can manipulate therequired currents. Usually, these OC output devices have onlyan N -channel transistor and two diodes D1oc (to Vcc) and D2oc

(Fig. 4). The purpose of these diodes is to provide electrostaticdischarge (ESD) protection.


Fig. 4. MC driver circuit: (a) typical (TOD) and (b) recommended configuration (ROD).

The typical configuration [TOD in Fig. 4(a)] of the optocou-pler driver normally used contains the OC output of the bufferOCsw in series with the photoemitter of the driver (Ddin).However, if the transistor OCsw is placed parallel with the LEDto be controlled [ROD in Fig. 4(b)], the excursion range of theanode voltage (diode Ddin) with regard to GND (∆V Ddin

A−GND)is considerably reduced during the commutations (Fig. 5). Inaddition, the ROD configuration presents higher robustness tocommon-mode voltage in the driver.1) Common-Mode Immunity: The common-mode voltage

in the optocoupler (Figs. 4 and 6) is defined as

VCM = V Ddincathode − VEE

∣∣∣∣dVCM

dt

∣∣∣∣ ≤ 10kVµs

(4)

where VCM is the common-mode voltage, and VEE is the outputreference pin in the optocoupler (Figs. 4 and 6). The VCM noiseis generated by ESD, converter switching, magnetic energydischarge WL in the clamp circuit (Fig. 1), etc.

High dVCM/dt on the order of kilovolts per second generatesparasitic currents in Cp and Cn (Fig. 4). It can lead to undesiredswitching, and so, the two basic rules of the converter may notbe fulfilled.

In Fig. 6, different paths for the parasitic currents in the driverare shown (e.g., the Cp path and ok path). Depending on thesign of dVCM/dt and the open-collector transistor (OCsw inFig. 6), the optocoupler state is reinforced (ok path in Fig. 6), oran error might be generated (Cp path in Fig. 6). Two examplesare given here.

1) With OCsw opened (IGBT conducting) and negativedVCM/dt: The IGBT conducting state is reinforced, be-cause the current runs through Cp and the light emittingdiode (Ddin in Fig. 4).

2) With OCsw opened and positive dVCM/dt: Part of theDdin excitation current runs through Cp, and an undesiredswitching may occur if this current is too high.

In order to insure proper operation during common-modetransients, two actions must be taken according to the IGBTstate.

1) With IGBT activated: Ddin must be overdriven beyond itsactivation threshold.

2) With IGBT turned off: The diode anode–cathode voltagemust be lower than the activation threshold.

The ROD topology is more robust than TOD for common-mode voltage immunity. Thus, it should be a recommendedconfiguration in order to prevent these problems. Nevertheless,a proper and careful printed circuit board design (layout sym-metry, minimize stray capacities, etc.) must be carried out toavoid this problems.2) TOD and ROD Commutation: Considering that the sup-

ply of the driver is Vdd = 15 V, the saturation voltage of thetransistor OCsw is V sat

ce 0.3 V and the voltage that falls inLED Ddin when this is in conduction is V on

d 1.7 V, for eachone of the cases, we will have two configurations.

1) Typical configuration TOD [Fig. 5(a)]:

∆V DdinA−GND = Vdd − V on

d − V satce 13 V. (5)

Moreover, in this case, the stray capacitor CAK of diodeDdin does not have any path for forced discharge. CAK

is discharged, following the characteristic curve of thediode [Fig. 4(a)], passing through the elbow of the curve(slow discharge with an id1 current). This makes thecommutation even slower.

2) Recommended configuration ROD [Fig. 5(c)]:

∆V DdinA−GND = V on

d − V satce 1.4 V. (6)


Fig. 5. ∆VDdinA−GND of the driver input during the commutation of the IGBTs of the MC. (a) TOD driver: turn on. (b) TOD driver: turn off. (c) ROD driver:

turn on. (d) ROD driver: turn off.

In addition to a reduced voltage being produced, in thiscase, the capacitor CAK extremely quickly discharges viathe OC transistor. This is due to the fact that the latterimposes a higher discharge current:

id2 = βib with id2 id1 (7)

and βib being the saturation current of the transistorOCsw and id1 being the discharging current imposed bythe Ddin diode characteristic (Fig. 4).

In this way, using the ROD configuration [Fig. 4(b)], its ex-cursion range is reduced to 10.7% (Fig. 5). This improves thedynamic response of the driver by 11% during the switching onand by 51% during the switching off (Table I), which providesa solution for the speed requirements mentioned in Section II.

As shown in Section IV-B, for the correct start-up of the MC,driver supplies will require sequencing.

IV. MC RIDE-THROUGH CAPABILITY

A. Mc Fault Conditions

MC performs a direct ac/ac conversion, without any storageelement. Thus, it is a low ride-through capability converter, andit is very difficult to control and protect the MC during faultconditions. In general, the fault conditions can be classified asovervoltage and overcurrent. There are three possible reasonsfor overvoltages.

1) Input overvoltage: due to distortion or perturbation on thegrid. Moreover, there may be an overvoltage at the inputwhen the MC is inadequately started up (Section V).

2) Output overvoltage: due to error on the current sign de-tection or sudden MC shut down (which is usually causedby overcurrent problems). The worst case would be whenthe load current reaches the overcurrent limit and theMC switches are turned off. In this way, the overvoltage


Fig. 6. Summary of the response times experimentally obtained [e.g., Fig. 10(a) and (b)] in the protection circuit in the case of an overcurrent fault.

TABLE IDRIVER EXCITATION TIMES: TOD AND ROD

appears when there is no path for the inductive currentsof the load and there is a magnetic energy (WL) storedon it.

3) The stray inductance along the MC switches can generateovervoltages in both sides of the converter because ofhigh di/dt at switching instants. In order to reduce thiseffect, CF (Fig. 1) should be placed as near as possible tothe MC switches.

On the other hand, there are five possible reasons for theovercurrent.

1) MC supply faults: due to grid distortion, voltage sag,voltage dropout, blackout, etc. (Section V).

2) MC commutation faults: due to MC switch faults, EMCfault, control strategy fault, inadequate MC switch com-bination, etc.

3) Abnormal operation of the motor: due to overload, shortcircuit in its coils, grounding faults, etc.

4) High inrush currents: overcurrent along the MC inputfilter and clamp circuit (Fig. 1) due to inappropriate start-up of the converter (Section V).

5) Circulating current along the MC switches: Due to MCcommutation faults, or two basic MC rules are not ful-filled (Section V).

B. MC Start-Up Problem

Starting up the MC is one of the most crucial moments for theconverter. During this stage, overcurrents and overvoltages maybe produced, causing serious damage to the converter. Threesituations can be identified.

1) Logic supply connection and reset:a) The example of the ROD topology [Fig. 4(b)] of the

drivers, together with an inappropriate start-up of theconverter, may cause a circulating current. This is dueto the fact that, if the supply of the drivers (+15Vd

in Fig. 4) is present before their input signals areactivated (OCsw), all the IGBTs of the MC will beactivated [see path4 in Fig. 4(b)]. In this situation, theinput phases of the converter are short-circuited. Forthis reason, it will be necessary to delay the supply ofthe drivers in order to give the control time to emit thecorresponding IGBT setpoint (activation of path3).

b) A similar problem may occur when using the TODconfiguration [Fig. 4(a)]. During the initial start-up in-stant, diode D1oc (ESD) and the decoupling capacitorCdec (initially discharged) of the buffer input providea path [path1 in Fig. 4(a)] for the current that activatesthe driver input. This start-up may occur in the otherdrivers of the MC, provoking the activation of morethan one IGBT for each output phase, causing a shortcircuit.Furthermore, if the Vcc supply of buffer OC(which is usually the same as that of the control logic:3.3 or 5 V) complies with Vcc < +15Vd, diode D1oc

begins to conduct current (path1), thereby causingthe aforementioned short circuit. For this reason, thisconfiguration may cause problems in the MC.

Therefore, during start-up (both with the ROD configu-ration and the TOD), a sequencing of auxiliary supplieswould be required to ensure a certain status of OCsw

before power is supplied to the drivers (Section V-A).


Fig. 7. MC start-up, supply, and fault protection circuit.

2) Interaction with the MC input filter: On the one hand, dueto the presence of an input filter in MC, an overvoltage(VCF

) of two times the peak of input voltage Vin_grid

can exist in the filter capacitor, because the MC has beeninstantaneously connected to the grid (a clamp circuitwill reduce this problem). On the other hand, when theMC is turned on, an inrush current appears through CF

and Cclamp (Fig. 1). The worst case for the MC shouldbe when the capacitor of the clamp is discharged andone of the input phases (Vin_grid) is at its peak value.For this reason, it will be necessary to insert a series ofcomponents (short-circuitable resistor Rpu and dampingresistor Rd in the filter and Rntc in the clamping circuit)in order to minimize these problems (Section V-B).

3) End of start-up: To minimize the voltage drop that takesplace in the filter and control the MC better, it will benecessary to short circuit resistor Rpu. In accordance withthe status of the MC switches, a current spike ICF

mayappear in capacitor CF of the input filter when resistorRpu is disconnected (Section V-C).

V. IMPROVEMENTS IN THE MC RESET

AND START-UP SEQUENCE

A. Mc Reset and Fault Protection Circuit Solution

A new circuit that provides a solution to the aforementionedlogic supply connection and reset problems of the MC has

been developed (Fig. 7), i.e., the MC reset and fault protectioncircuit. The following objectives, among others, are attained.

1) During the start-up of the MC, give the control circuittime to initialize and issue the signal that prevents theshort circuit between the MC input phases.

2) Energize the MC drivers only when the auxiliary supplyis higher than a safe threshold.

3) Detect shutdowns and faults in the converter supply,reacting in real time to instantaneously switch off theMC switches. It is extremely important for this to cor-rectly operate when there is a dip in the auxiliary supply,and the stray capacities of the entire protection circuit arecharged.

4) Correctly operate when the auxiliary supply of the de-vices is lower than the threshold required by the manufac-turer for the corresponding integrated circuit to operate(precision reference “AR” and comparators “Comp” inFig. 7), which is of great importance in start-up circuits.Should the protection system be made with complexintegrated circuits (this would involve a higher level ofcomplexity in the circuit and its treatment), this would beput into doubt.

5) Turn off the MC in the presence of faults that mightdamage the converter (e.g., overcurrents). The shutdownis instantaneous and independent of the control (whichhas a latency time that might be excessive and can fail infault situations).


Fig. 8. Different sequences of the MC start-up, supply, and fault protection circuit, i.e., 5a → 5b → · · · → 5d and 8a → · · · → 8g.

6) Be a flexible system (“wired AND”) in which it is easy toincorporate fault detection signals, so that the control isaware of these in real time.

This protection circuit is made up of five blocks (the notationPnx used indicates a specific point in Fig. 7):1) Reference and vin_main sense: Formed by a hysteresis

comparator that contains a precision reference (“AR” in Fig. 7)of reduced consumption in order to establish an independentreference voltage for the auxiliary circuitry supply (Vin_main).The reference level must be independent of the input auxiliarysupply (Vin_main : P1a) as the aim is to detect faults in this. Itis defined by

VAR_min VAR_ref +(Vin_main − VAR_ref)

IAR_max· IAR_min

IAR_min

IAR_max=

1100

(8)

with VAR_min being the threshold voltage that the general aux-iliary supply (Vin_main) must reach to ensure the establishmentof the reference level (VAR_ref). IAR_min and IAR_max are therange of currents in which the component must operate (“AR”in Fig. 7). This level must be very low, e.g., P1b : VAR_min 1/6Vin_main (8). In this way, the range in which the correctoperation of the circuits that make up the protection system areensured.

The hysteresis cycle, as well as the behavior of the completeprotection circuit, is shown in Fig. 8. Its activation value Va and

deactivation threshold Vb are defined by

Va =[1 + R1

(1

R2+

1R4

)]VAR_ref +

R1

R4VOLcomp (9)

Vb =

1

R2

(1

R1+ 1

R4+R5

) + 1

VAR_ref (10)

with VOLcomp being the comparator low-level output voltage(point P1c).

The hysteresis comparator output (hout : P1c) attacks anRCh network in such a way that, when the supply iscorrect (Vin_main > Va), point P1c will be charged witha time constant defined by circuit RCh. In this way, thepower-up of the drivers (P5b = Vin_main) will be delayed[Tdelay_driver_supply 226 ms in Fig. 9(b)] with regard to theexistence of a correct input supply Vin_main. On the other hand,Tdelay_driver_supply shall be sufficiently “large,” so that, duringthis time, the control can activate a determined vector, thusavoiding the short circuit between phases (Section IV-B).

When the supply is incorrect (Vin_main < Vb), point hout

must be quickly discharged. This is done due to the fact thatCh is discharged by the internal open-collector transistor (OC)of the hysteresis comparator. Once the condition Vin_main < Vb

has been met, it is necessary to wait until Vin_main > Va andTdelay_driver_supply elapses [Fig. 9(b)], so that the drivers canbe supplied. This must occur both in the case of disconnectionsof the supply and in the case of dips in this (Fig. 8). In this case,


Fig. 9. Disturbances in the supply and response times of the protection circuit. (a) Driver supply turnoff without any delay: Tdelay_rsil 1.09 µs. (b) Detectionof general supply and driver supply turn-on with delay: Tdelay_driver_supply 226 ms. (c) Disappearance of supply or overcurrent fault and activation of driversupply: Tload_Crsil = 4400 µs. (d) Dip in the general supply, turnoff of drivers, and delayed turn-on.

the stray capacitors of the entire circuit are charged, which mustnot lead to an incorrect sequencing of supplies [Fig. 9(d)].2) OC Comparator: Its objective is that the hysteresis cycle

(hout : P1c) can be one of the inputs (P2b : Vcc_ok) of the“wired AND” that attacks the driver supply control stage. Thisis achieved due to the fact that the output of this comparator isa transistor in OC.

For output Vcc_ok to follow the same profile as point P1c ofthe hysteresis cycle, a comparison level is established Vc Vb

at the OC comparator input (P2a).3) Current Fault Detection: Detects overcurrent faults in

the MC and generates the nIlim signal (P4a in OC). This circuitis made up of three blocks.

1) Current sensing (positive and negative) and level conver-sion (current at voltage range ∈ [0, . . . , 15 V]).

2) Comparators (OC) of positive and negative currents:These compare the current that circulates in the corre-

sponding phase of the MC with the limit values definedin block c.

3) Generation of current limit values VIpos (P3c) andVIneg (P3d):

VIpos =VddR95 + P1 + R96

R92 + R95 + P1 + R96(11)

VIneg =VddR96

R92 + R95 + P1 + R96(12)

with Vdd = +15 V, and P1 being the ohmic value of thepotentiometer in the Fig. 7.

This block allows the current limit—positive (11) andnegative (12)—of all the MC phases to be adjusted ina flexible manner. These limits shall be adapted to thecurrent sensor range.


In order to control overcurrent faults throughout the con-verter, it will be necessary to incorporate blocks a and b for eachof the MC phases. The two comparators (OC) of each phase willsimultaneously generate the warning signal nIlim (P4a), whichwill be one of the inputs of the “wired AND.”4) Fault Sense—Wired AND: This stage includes the inputs

of the “wired AND” to generate the signal RSIL (P4b) to warnthe control. The inputs are given as follows: correct supplydetection Vcc_ok and overcurrent fault nIlim. On the other hand,these inputs ate the ones that control the supply of the driversof the IGTBs (driver supply control).

To prevent RSIL from being activated by any induced noise, itwill be necessary to incorporate a capacitor (Crsil) in the gate oftransistor M3. Moreover, due to Crsil, oscillations are avoidedas the nIlim signal remains active during the Crsil(Tload_Crsil)charging time. During this time, the control must issue thecorresponding setpoint to make the origin of the fault disappear.

It is important to correctly determine the value of Crsil as,if this is large and there is any anomaly (e.g., nIlim), thiscapacitor would take a long time to discharge. This would makeTdelay_rsil (delay of the RSIL signal) long, which would meanthat the control will not quickly react.

Moreover, during Tdelay_rsil, the supply of drivers (+15Vd)remains active; therefore, the origin that caused the fault isnot avoided. Therefore, in order to provide the circuit witha dynamic response [Tdelay_rsil 1.09 µs in Fig. 9(a)], thefollowing relation must be complied:

Crsil Ch e.g., Crsil = 10 nF and Ch = 1 µF. (13)

However, if Crsil is very small, it follows that Tload_Crsil isalso small, which could lead to oscillations in the appearanceof the overcurrent fault (nIlim). The solution to this problem isto use a MOSFET transistor (M2 in Fig. 7), which allows theincorporation of a high-value pull-up resistance (R9 = 1 MΩin Fig. 7), without requiring an increase in Crsil or a currentdemand that the FPGA Dron output pin cannot deliver (enableof the entire circuit of drivers). In this way, Tload_Crsil canbe increased (without varying Tdelay_rsil), giving the controltime to issue the setpoint that makes the origin of the faultdisappear.5) Driver Supply Control: The aim of this unit is to sup-

ply the drivers of the IGBTs (P5b = P1a) whenever a seriesof indications is complied with. These are given as follows:1) correct input supply (Vin_main); 2) absence of overcurrentfaults (nIlim); and 3) enabling of drivers by the control (Dron).

Signal Dron(P5a), which is activated by the FPGA, and itspull-up resistor act as the enable of the “wired AND.” In thisway, the supply of the drivers can be controlled from the FPGA.

When any of these three conditions are not met, the transistorQ1 switches to the cutoff region, causing the supply of thedrivers (+15Vd) to be nil (P5b = P1a). This will prevent a shortcircuit between phases of the MC.

On the other hand, and due to the existence of thecollector–emitter stray capacity Cce in Q1, there may be prob-lems during the initial instant of start-up. At this time, Cce

is discharged; thus, the drivers are joined to the main supply(P5b = P1a). This problem would be resolved by incorporating

a decoupling capacitor at the driver input (Cd), the value ofwhich meets

Cd Cce. (14)

Should this not be incorporated, it will be necessary to ensurethat the total stray capacity of the driver input complies with

Ctotal_strayin_driver =

18∑i=1

Cstrayin_driveri

Cce. (15)

In the MC, the +15Vd supply is carried parallel to the18 drivers of the IGBTs, in compliance therefore with (15).

Therefore, due to this circuit, an adequate sequencing ofsupplies is achieved, protecting the converter in real timeagainst problems caused by the drivers, overcurrent faults, andturnoffs and microcutoffs in the control supply (Fig. 10). Thecircuit adequately responds even when the supply is lower thanthe threshold of the operating range of the integrated circuits,thereby making the MC more robust.

B. Improvement of the Filter Versus Clamp InteractionDuring the Start-Up

When MC is instantaneously connected to the grid, an over-voltage VCF

of two times the peak of the input voltage can existin the filter capacitor. Furthermore, in this moment, an inrushcurrent [Fig. 11(a) and (b)] appears through CF and Cclamp

(Fig. 1).All these problems are partially (but not totally) minimized

with the insertion of a power-up resistor Rpu (Fig. 1) [34].Table II shows the spike values reached during the power-upof the MC [Fig. 11(a) and (b)]. During MC power-up, theconverter load does not affect all these values, i.e., it is notimportant whether the bidirectional switches are in conductionstatus or not (load connected/disconnected to the input stage ofthe MC). A series of conclusions can be drawn from the valuesobtained (Table II).

1) The greater attenuation of overvoltage VCFand inrush

current ICFis produced when the Rpu is not used.

2) The insertion of the clamping circuit (Fig. 1) causes, inturn, a reduction in the voltage spike VCF

.3) The clamp has no affect on ICF

.4) In the latter situation, there is a current spike Iclamp,

which reduces the service life of this capacitive element(especially if Rpu is not used).

On the other hand, this paper proposes the insertion of anegative-temperature-coefficient termistor Rntc in the clampcircuit. In this way, the behavior of the clamping circuitand, therefore, of the MC considerably improves [Fig. 11(a)and (b)].

There are two possible locations for the Rntc.

1) Between the input bridge and Cclamp (Fig. 1) to limitthe inrush current that appears in Cclamp in the case ofa sudden connection of the MC to the grid. This locationoffers some advantage: When the magnetic energy (WL)stored in the load is being transferred to Cclamp, the load


Fig. 10. Delay between the appearance of an overcurrent fault and the turnoff of the MC drivers and their IGBTs. (a) Delay overcurrent fault (↑ P3_r_in) anddriver supply turn off (P5b ↓). (b) Delay overcurrent fault (↑ P3_r_in) and turn off IGBT gate (P6b ↓).

Fig. 11. Voltage spike (VCF) and inrush current (Iclamp, ICF

). (a) MC with Rntc and MC with and without Rpu. (b) MC without Rntc and MC with andwithout Rpu.

TABLE IIMC PLATFORM AND MAXIMUM VALUES REACHED DURING THE POWER-UP

current will not flow through Rntc. In this way, Rntc andthe load will be decoupled; therefore, it is not necessary todimension Rntc in accordance with the maximum currentthat the load can handle.

2) In series with Cclamp, so that the load of MC also sees thisRntc. This location, which, in principle, is the optimumone, has more sense when the load of MC is capacitive(as in this case, it would limit the overcurrent generatedon disconnecting the MC from the load). However, when

the load is inductive—locations 1 and 2—these behavein a similar manner, as the sudden disconnection of theload will create overvoltages and not overcurrents (withthe latter case being the one in which Rntc operates).

Table II shows the values [Fig. 11(a) and (b)] obtained whenRntc is placed in location 1. As it can be seen, the current spikeCclamp that goes through is reduced to 29%. This improvementhas greater relevance in MCs in which resistor Rpu is not used:


in this case, during the power-up of the MC, currents mayappear, which reach even 86 A (a current that can cause seriousdamage in the clamping capacitor). If Rntc is used [Fig. 11(a)],the Iclamp current is reduced to 8.7 A.

When the diode bridges of the clamp circuit are conducting,the Cclamp and the MC bidirectional switches are connected.The IGBTs have a maximum capacity to withstand voltage (i.e.,1200 V). Taking into account that the MC auxiliary circuits arefloating, the maximum voltage in the IGBTs, when the clampcircuit is “on,” is approximately [35]

|Vblock_ce| ≈ |Vin_grid| +∣∣∣∣Vclamp

3

∣∣∣∣ (16)

being

a) Output : Vclamp = VCclamp

b) Input : Vclamp = VCclamp + VRntc .(17)

When the input bridge is conducting and taking into account(17.b), proper selection of Cclamp and Rntc is needed in or-der to keep the IGBT blocking voltage below its maximumvalue, i.e.,

∣∣∣∣Vclamp

3

∣∣∣∣ + |Vin_grid| < Vce_max ≈ 1200 V. (18)

In this sense, the Rpu resistor will be helpful, because itminimizes the inrush current; thus, the voltage drops throughRntc. However, the sizing of Rntc is not a critical task becausethere is a wide range (16) to work with Vclamp and, thus,with VRntc .

C. Improvement in the Transitory to Stationary Condition

In order to maximize the voltage transfer ratio of the MCand perform a suitable control of the MC, resistor Rpu must beshort-circuited (SWpu in Fig. 1) once the initial transitory hasended.

The moment that the Rpu resistor is short-circuited, an ICF

current spike may appear in CF and another Iclamp spike inCclamp, which reduces the service lifetime of these compo-nents. These spikes depend on several factors: voltage in theclamp, MC connected or disconnected to the load, and inputvoltage difference, i.e.,

Vgrid_mc = Vin_grid − Vin_mc. (19)

The Iclamp current can be avoided by waiting (several net-work cycles) until Cclamp is sufficiently charged to ensure thatVin_grid − VCclamp is small. On the other hand, while Rpu ispresent, there is a voltage difference Vgrid_MC. On short-circuiting Rpu and due to Vgrid_MC, the aforementioned ICF

(Fig. 12) would arise, which will be proportional to the voltagedifference.

One way of avoiding ICFis by controlling the moment in

which Vin_grid is equal to Vin_MC. This requires the incorpora-tion of a series of sensors at the input or, in their absence, thatthis moment be mathematically determined (which dependson the parameters of the MC and of the load). However, if,

Fig. 12. Current peak ICFthrough the filter capacitor when Rpu is

disconnected.

during the power-up period of the MC, the switches of theconverter remain off (filter and load decoupled), Vgrid_MC

is considerably reduced (Fig. 12), thus avoiding the appearanceof ICF

.This ICF

current spike can be both positive and negative(filter capacitor previously loaded after a prior operation); inthis case, a large part of ICF

will return to the grid (thusintroducing distortion in the latter) if the MC and the load showgreater impedance than the grid and the filter, i.e.,

ZMC&load > Zgrid + ZLF//ZRd

. (20)

In this way, with the provided solution, the service lifetimeof the filter capacitor is lengthened, and on the other hand, thenetwork is prevented from being contaminated.

VI. CONCLUSION

The MC is a converter that can be used in a wide rangeof applications. Nevertheless, it does not as yet represent asufficiently mature option for industrialization because of itspoor ride through capability. In order to overcome this situation,this paper examines the hardware of the MC, with the aim ofimproving converter start-up and switching.

High-frequency operation fsw involves a minimization ofthe size of the reactive elements of the converter and an im-provement in the quality of the signals synthesized by the MC.High fsw requires high computing speed, IGBT bandwidth, andspeed of response in the drivers that control the MC switches.Drivers traditionally used in other converters, such as the LTDs,cannot be used with the MC. Optocoupler-fitted drivers are anattractive solution. This paper shows a configuration (ROD) thatreduces the excursion range of the drivers, thus improving theswitching speed, and gives a higher common-mode immunityto the drivers.

Turning on the MC is a very delicate moment as overcurrentand overvoltages may occur, damaging the converter. More-over, if the start-up sequence of the converter is not correct,the drivers may be activated, giving rise to high circulatingcurrents. A start-up algorithm executed via software does notguarantee correct initialization as the µP /DSP/FPGA responds


with a certain amount of latency and may be fed after thedrivers. Moreover, the software may fail due to noise inducedin the start-up or with the appearance of overvoltages andovercurrents in the MC.

Due to the start-up circuit presented, correct sequencing ofthe supplies is ensured, preventing short circuits during start-up.Moreover, this circuit instantaneously protects the MC in thecase of overcurrents and voltage faults in the auxiliary powersupply. Likewise, this ensures its operation even when thesupply falls below the threshold required by the manufacturersof the circuits used.

On the other hand, by including resistor Rpu in the inputfilter, the current and voltage spikes that take place during start-up are partially reduced. This paper proposes the inclusion ofan Rntc in the clamp circuit in order to minimize to a greaterextent the current that passes through Cclamp and CF . In orderto increase the voltage transfer ratio of MC, Rpu must bedisconnected. At that instant, another current spike appears inCF ; this paper proposes the application of a determined setpointto the MC in order to protect the CF .

Taking these contributions into consideration, it can be saidthat the techniques proposed in this paper represent an improve-ment in the start-up cycle of the MC converter and, in turn, itsride-through capability. Thus, this represents a step forward inthe development of reliable MCs for real applications.

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Jon Andreu received the M.S. degree in elec-tronic and control engineering from the University ofMondragon, Mondragon, Spain, in 1997. He is cur-rently working toward the Ph.D. degree in matrixconverters in the Department of Electronics andTelecommunications, University of the BasqueCountry, Bilbao, Spain.

After his graduation, he joined the Ideko ResearchCenter, where he worked on machine-tool applica-tions. Since 2002, he has been an Assistant Professorof electronic technology with the Department of

Electronics and Telecommunications, University of the Basque Country. Heis also a Researcher with the Applied Electronic Research Group, Universityof the Basque Country. His current activities include matrix converters andapplication of power electronics.

José Miguel De Diego was born in San Sebastian,Spain, in 1951. He received the B.S. degree inelectrical engineering from Navarra University, SanSebastián, in 1979 and the Ph.D. degree in industrialengineering from the High School of Engineering ofBilbao, Bilbao, Spain, in 1991.

From 1979 to 1988, he was an R&D staff memberin industrial electronics companies. He was with theR&D departments of Philips until 1994 and EricssonRadio S.A., Spain until 2003, and as a Researchand Development Staff Engineer. Since 1989, he has

been a Lecturer with the Department of Electronic and Telecommunication,University of the Basque Country. His research interests are power supplysystems and removable energies.

Iñigo Martínez de Alegría received the B.Sc. andM.Sc. degrees in physics from the University ofthe Basque Country, Bilbao, Spain, in 1996. He iscurrently working toward the Ph.D. degree at theUniversity of the Basque Country.

After his graduation, he joined Ikerlan, the re-search center of the MCC industrial group, wherehe spent two years working in mechatronics applica-tions. He then joined Azterlan, a metallurgy researchcenter. Since 2000, he has been as an AssociateProfessor with the Department of Electronics and

Telecommunications, University of the Basque Country. His current activitiesinclude application of power electronics to renewable energies.

Mr. Alegría is a Member of the IEEE Power Electronics Society.

Iñigo Kortabarria received the M.S. degree in elec-tronic and control engineering from the Universityof Mondragon, Mondragon, Spain, in 1999. He iscurrently working toward the Ph.D. degree in matrixconverter application to wind power generation in theDepartment of Electronics and Telecommunications,University of the Basque Country, Bilbao, Spain.

From 1999 to 2004, he was an R&D staff mem-ber in industrial electronics companies. Since 2004,he has been an Assistant Professor in electronictechnology with the Department of Electronics and

Telecommunications, University of the Basque Country. He is also currently aResearcher in the Applied Electronic Research Group, University of the BasqueCountry. He is working on projects regarding the control of the advanced powerconverter topologies applied to wind power generation.

José Luis Martín (M’97) received the M.S. andPh.D. degrees in electrical engineering from the Uni-versity of the Basque Country, Bilbao, Spain, in 1988and 1992, respectively.

He currently manages the Applied ElectronicsResearch Team of the Department of Electronicsand Telecommunications, University of the BasqueCountry, where he was an Assistant Professor inelectronic technology from 1989 to 1995, an Asso-ciate Professor in 1995, Department Head from 1995to 2001, and Vice-Dean of the Faculty of Engineer-

ing from 2001 to 2005.

Salvador Ceballos was born in Santander, Spain, in1978. He received the B.S. degree in physics fromthe University of Cantabria, Santander, Spain, in2001 and the B.Eng. degree in electronic engineeringfrom the University of the Basque Country, Bilbao,Spain, in 2002. He is currently working towardthe Ph.D. degree in the Department of Electronicsand Telecommunications, University of the BasqueCountry.

Since 2002, he has been with the Robotiker-Tecnalia Research Centre, Zamudio, Spain, where he

is currently a Development Engineer in the Energy Unit. He is the author orcoauthor of more than 20 published technical papers. His research interestsinclude multilevel converters and fault-tolerant power electronic topologies.

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New Protection Circuit for High-Speed Switching and Start-Up of a Practical Matrix Converter

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