Sub-wavelength Texturing for Solar Cells using Interferometric

Lithography

W.L. Chiu

1

, M.M. Alkaisi

1,5,a

, G. Kumaravelu

3

, R.J. Blaikie

1,5

, R.J. Reeves

2,5

, A.

Bittar

4, 5

1

Department of Electrical and Computer Engineering, University of Canterbury, Christchurch, NEW

ZEALAND

2

Department of Physics and Astronomy, University of Canterbury, Christchurch, NEW ZEALAND

3

Nanocluster Devices Ltd, Christchurch, NEW ZEALAND

4

Industrial Research Limited, Lower Hutt, Wellington, NEW ZEALAND

5

MacDiarmid Institute for Advanced Materials and Nanotechnology, NEW ZEALAND

a

M.Alkaisi@elec.canterbury.ac.nz

Keywords: Solar cells, surface texturing, interferometric lithography, RIE.

Abstract. We have employed Interferometric Lithography (IL) for sub-wavelength surface texturing

on large area silicon substrates. Low defect density Reactive Ion Etching (RIE) processes have been

developed to transfer the pattern into the silicon using SF6 plasma. Reflection measurements on the

sub-wavelength textured surface have been carried out and show a substantial reduction from ~30%

to below 4% over the spectrum range from 400nm to 1200nm. IL is a mask-less lithography

technique which is used to define periodic patterns. The theoretical limit of the pitch size of the

structure is half of the wavelength of the light source. Hence, the sub-wavelength patterns can be

achieved easily. Moreover, sub-wavelength texturing requires short RIE processes; most of the

plasma-induced damage on the silicon surface can be avoided.

Introduction

Among many techniques that improve the performance of solar cells, surface texturing is one of the

most effective. Different texturing patterns which are either random or periodic 3-D structures can

suppress the reflectance of the surface of Si solar cells down to a very small level, as well as increase

the optical path for light absorption. There are various ways to texture the silicon surfaces. In the

previous paper we discussed techniques utilizing Reactive Ion Etching (RIE) [1]. We reported that

the texturing can reduce the reflectance down to 0.4% in the visible light range. The greatest

advantage of using RIE for texturing is that RIE is a common industrial process. Hence the

techniques are suitable for mass productions. The RIE techniques can also be applied to low cost

materials such as polycrystalline silicon wafers.

The aim for this research is to fabricate sub-wavelength texturing structures with minimum cost

and surface damage. To be more specific, the texturing will have the feature size less then the

shortest wavelength of the visible spectrum (~ 400nm). Kananmori etal [2] showed that

sub-wavelength periodic structures behave like Anti-Reflection Coatings (ARC). The motivation is

that such structures will require much shorter RIE process because of the small depth required.

Hence it will minimize the RIE induced defects that may degrade the cells’ performance [3].

The pattern for the sub-wavelength texturing is defined using Interferometric Lithography (IL) [4].

IL is a mask-less lithography technique which can be used to define periodic patterns both as gratings

and dot structures. The throughput is high because IL can cover a large area at single exposure. The

theoretical limit of the pitch size of the patterns is half of the wavelength of the light source. For

instance, we utilized an Ar laser to produce 364nm UV light as the source. It means that pitch sizes

less then 200nm are achievable. Hence it is suitable for the sub-wavelength surface texturing.

Advances in Science and Technology Vol. 51 (2006) pp. 115-120online at http://www.scientific.net© (2006) Trans Tech Publications, Switzerland

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IL provides a low cost alternative to conventional lithography for patterning nano-scaled optical

gratings [5]. Complicated periodic patterns are also achievable with multiple exposures using IL [6].

Carefully timed double exposures allow us to define periodic dot/hole patterns for our textures. For

example, rectangular array pattern (Fig.1a) is obtained by simply rotating the sample 90° for the second exposure.

(a) (b)

Figure 1. The SEM images of the pattern defined on photo resists using IL, the pitch size of the

patterns is around 350nm. (a) The sample was rotated 90˚ at the second exposure; (b) the sample was

rotated 60˚.

IL using Lloyd’s-Mirror

IL utilizes the interference of two coherent beams. The periodic line patterns they produced can be

recorded using photo resists. The period of the pattern depends on the incident angle between the two

beams and the wavelengths of the light sources. Assuming that both have the same wavelength, then

the relationship can be described by the following equation:

)sin(2 θλ=p (1)

where p is the pitch size of the pattern, λ is the wavelength of the light sources, and θ is the half angle of intersection of two beams.

In this research we utilized the simplest IL configuration; the Lloyd’s-Mirror interferometer [4].

In this configuration only one light source is required (Fig.2). Laser light is the ideal choice since it is

monochromatic and coherent, therefore, guarantees high contrast interference patterns. The laser

beam can be expanded by utilizing spatial filtering to achieve large area exposure. A simple spatial

filter consists of a convergent lens that focuses the beam onto a pinhole. Spatial filtering also

removes spatial noises at high frequencies that may degrade the pattern quality.

(a) (b)

Figure 2. Lloyd’s mirror IL system. (a) The block diagram and (b) A closer look at the sample holder.

The detailed illustration of the sample holder is shown in Fig.2b. The coherent light will strike onto

the sample which is coated with photo resists. Another source of coherent light is the reflection from

the mirror. The interference pattern generated is recorded by the photo resists. The pitch size of the

pattern can be controlled by stage angle θ’. In fact, θ’ is equal to θ in Eq.1.

Spatial filter

Sample holder

UV laser

UV mirrors

Sample

Interference pattern

Coherent Light

θ’

Mirror Rotatable stage

Disclosing Materials at the Nanoscale116

The Lloyd’s-Mirror configuration is the simplest setting among the existing IL configurations

[7,8]. Its greatest advantage is the ease of pitch size control. However, it sacrifices the quality of the

pattern for the simplicity. The overall contrast of the image is worse due to the intensity difference

between the two beams (the reflected light has a minor intensity loss due to the mirror). The optical

path difference of the beams increases from the stage centre. This leads to a non-uniform phase

difference and degrades the contrast. In addition, the mirror’s quality (in terms of flatness and

perfections) is a major factor that determines the quality of the patterns.

Tri-layer Imaging System

The pattern recording mechanism is a tri-layer photo resist structure. It consists of an ARC at the

bottom layer, and an I-line photo resist layer at the top. Between them there is a thin layer of SiO2.

The ARC layer is necessary to suppress the reflection from the silicon surface during the exposure.

Without it the reflection will cause strong vertical standing waves that also get recorded by the resists

layer. This results in patterns with distorted sidewall profile; such patterns will not survive though

the reminding processes. For this research a commercial ARC (AZ Barli-2) is used. However, a

thick layer of hard-baked (185°C) photo resist can also be used as an ARC [4]. Since a 364nm UV laser is employed for this research, we utilized an I-line photo resists (AZ HiR

1075) for pattern recording. The thickness of the resists layer has to be adjusted based on different

stage angles. This is necessary because at large stage angles, the large optical path difference

between the beams will produce poor contrast. If the layer is too thick then it will fail to record the

pattern effectively. The SiO2 layer is there to space out the ARC and the photo resists. This is due to

the poor selectivity of the O2 plasma etch for etching the ARC layer (using photo resists as the mask),

which can destroy the pattern. If the pattern is first transferred onto SiO2 layer and then onto the ARC

layer the problem of selectivity is solved. It is desirable to have a thin SiO2 layer as long as it is thick

enough to act as the etch mask for etching the ARC layer.

+/ 13-120,2.

Figure 3. The diagram shows the steps for fabricating sub-wavelength surface texturing.

Photo

resist

SiO2

ARC

1. Silicon substrate

with tri-layer resists

structure

2. Pattern definition

using IL

3. After

development,

perform CHF3 plasma

CHF3 plasma

Photoresist as

the mask

4. Perform O2 plasma

etch to etch ARC

O2 plasma

SiO2 as

the mask

5. Perform SF6 plasma

etch to etch Si

SF6 plasma

ARC as

the mask

6. Perform cleaning to

remove ARC

Advances in Science and Technology Vol. 51 117

Processes

Fig.3 shows the processes we developed for fabricating sub-wavelength surface texturing. Before the

pattern definition step using IL, the crystalline silicon substrate (p-type, <100>) is coated with a layer

of ARC (AZ Barli 2, ~180nm), following by evaporation of a thin layer of SiO2 (~50nm), then finally

the photo resist (AZ HiR 1075, ~200nm) is applied. The photo resist is double exposed using IL. The

sample gets rotated 90˚ (or 60˚) during the second exposure. The stage angle was set to 31˚ therefore

the pitch size of the patterns is expected to be around 350nm. The photo resist is developed using the

AZ MIF 300 developer for 7 seconds.

After the developing process, three dry etching processes are performed for pattern transfer onto

the silicon surface. An Oxford PlasmaLab80 RIE machine was utilized for the purpose. First, CHF3

plasma etch (15sccm, RF 200W, process pressure 25mTorr, 295˚K) is performed to transfer the

pattern onto the SiO2 layer. Then O

2 plasma etch (5sccm, RF 100W, process pressure 1mTorr, 173˚K)

to etch the ARC layer with SiO2 as the mask. Finally, to fabricate the texturing, low-defect SF

6

plasma etch (10sccm, RF 60W, process pressure 150mTorr, 295˚K) is performed. The recipe for this

particular etching is designed for achieving isotropic profile textures and to minimize silicon surface

damage. After the SF6 etch, AZ EL thinner is used for removing the remaining ARC.

Results

At the current stage, a surface texturing with 350nm pitch size has been fabricated. The texturing

shown in Figs.4 and 5 is a semi-hole-pillar structure. The surface was etched for 4.5 minutes under

SF6 Plasma. The depth of the texturing features is around 350–400nm. The diffuse reflectance of the

texturing was measured using a high accuracy spectrophotometer against a standard diffusing plate.

Also measured was the diffuse reflectance from a typical polished silicon sample. The result is

shown in Fig.6.

One can see from the plot that the reflectance was suppressed from 30–40% down to 3–4% within

the visible spectrum (400–700nm). In fact, the reflectance never goes beyond 12% through out

300–1200nm region. This is an interesting result especially because silicon is transparent to light

>1000nm. The big jump in the reflectance curve (up to ~50% in Fig.6) for the untextured silicon at

>1000nm region is mainly due to the reflection at the second interface and at the sample backing.

Figure 4. The SEM image of a sub-wavelength surface texturing. The structures have feature size

~350nm. The depths of the structure are around 350–400 nm

Disclosing Materials at the Nanoscale118

Figure 5. The cross-section view of the structure shown in Fig.4. Pitch size = ~350nm.

Figure 6. The diffuse reflectance of the texturing vs. a typical silicon sample through out the light

spectrum. The textured silicon suppressed the reflectance down to 3–12% at wavelengths from 300 to

1200nm.

Conclusion

A sub-wavelength surface texturing technique suitable for large area silicon wafers has been

developed. The pitch size of the texturing structures is 350nm and the features depth is around

350-400nm. The patterns were defined using IL. IL is a mask-less lithography technique able to

define large area of sub wavelength patterns uniformly and well suitable for solar cell application.

The patterns were transferred on to the silicon using low defect density RIE processes. The

reflectance of the resultant texturing is around 3-4%. It is higher than that obtained from our micron

sized texturing structures (~0.4%)[1]. However, the RIE process for the IL is much shorter and

requires only 4.5 minutes in SF6 plasma. Previous texturing requires 30 minutes of etching time at

high RF power [1]. Based on our previous study on the surface damage [3], we expect damage is

greatly reduced due to the short SF6 etching. The full analysis on the surface damage on the

sub-wavelength texturing is the subject of other study. The combination of IL and short RIE

processes has the potential of producing inexpensive method for surface texturing which is suitable

for mass production.

Silicon

Surface

texturing

Advances in Science and Technology Vol. 51 119

Acknowledgment

A special acknowledgment goes to Steve Drake and Ling Lin for their help and advice. Also the

support from the laser team of the Department of Physics and Astronomy in University of Canterbury

is appreciated.

References

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ion etching technique”, Proceeding the 29th IEEE PVSC conference, New Orleans, Louisiana, USA, May 19-24, 2002.

[2] Y. Kananmori, M. Sasaki, and K. Hane: “High Aspect-ratio Two-dimensional Silicon

Sub-wavelength Gratings Fabricated by Fast Atom Beam Etching,” SPIE Conference on Micromachining and Microfabrication Process Technology V, Santa Clara, California, USA, 1999.

[3] G. Kumaravelu, M.M. Alkaisi, D. Macdonald, J. Zhao, B. Rong, and A. Bittar: “Minority Carrier

Lifetime in Plasma-textured Silicon Wafers for Solar Cells,” Solar Energy Materials & Solar Cells 87, 2005, pp. 99–106.

[4] S.J. Drake, N. Kohn, R.J. Blaikie, R.J. Reeves, and M.M. Alkaisi: “Photoresist as an

Anti-Reflection Coating for Interference Lithography,” Second International Conference on Advanced Materials and Nanotechnology, Queenstown, New Zealand, 2005.

[5] L. Lin, R.J. Blaikie, R.J. Reeves: "surface-plasmon-enhanced optical transmission through

planar metal films", Journal of Electromagnetic Waves and Applications, volume 19, number 13, page 1721-1728, 2005.

[6] X.Y. Ao, and S.L. He: “Two-stage design method or realization of photonic bandgap structures

with desired symmetries by interference lithography,” Optics Express, vol. 12, no. 6, pp. 978–983, Mar. 2004.

[7] H.I. Smith: Submicron- and Nanometer-Structures Technology, 3rd ed. Sudbury, Massachusetts, USA: NanoStructures Press, 1993, ch. 16.

[8] T.A. Savas, S.N. Shah, M.L. Schattenburg, J.M. Carter, and H.I. Smith: “Achromatic

interferometric lithography for 100-nm-period gratings and grids,” Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, November 1995 Volume 13, Issue 6, pp. 2732-2735.

Disclosing Materials at the Nanoscale120