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Pertemuan 23Reduced Instruction Set Computer 1
Matakuliah : H0344/Organisasi dan Arsitektur Komputer
Tahun : 2005
Versi : 1/1
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Learning Outcomes
Pada akhir pertemuan ini, diharapkan mahasiswa
akan mampu :
• Menjelaskan prinsip kerja Reduced Instruction Set Computer
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Outline Materi
• Instruction Execution Characteristics
• The Use of Large Register File
• Compiler-Based Register Optimization
• Reduced Instruction Set Architecture
• RISC Pipelining
• RISC versus CISC Controversy
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Overview
Key element of RISC:
1. A large number of general purpose registers, and/or the use of compiler technology to optimize register usage.
2. A limited and simple instruction set.
3. An emphasis on optimizing the instruction pipeline.
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CISC RISC Superscalar
CharacteristicIBM
370/168VAX
11/780Intel
80486SPARC
MIPS R4000
PowerPCUltra
SPARCMIPS
R1000
Year developed 1973 1978 1989 1987 1991 1993 1996 1996
Number of instructions
208 303 235 69 94 225
Instruction size (byte)
2-6 2-57 1-11 4 4 4 4 4
Addressing modes 4 22 11 1 1 2 1 1
Number of general purpose registers
16 16 8 40-520 32 32 40-520 32
Control memory size (kbits)
420 480 246 - - - - -
Cache size (kbyte) 64 64 8 32 128 16-32 32 64
Overview
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Instruction Execution Characteristics
The major cost in the life cycle of system is software, not hardware.
Researchers and industry have been to develop ever more powerful and complex high level programming languages. These high level language (HLLs) allow the programmer to express algorithms more concisely, take care more detail, and often support naturally the use of structured programming or object oriented design.
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Instruction Execution Characteristics
Operations performed
Study language workload
[HUCH83] [KNUT71] [PATT82] [TANE78]
Pascal Scientific
Fortran Student
Pascal SystemC
SystemSal
System
Assign 74 67 45 38 42
Loop 4 3 5 3 4
Call 1 3 15 12 12
If 20 11 29 43 36
Goto 2 9 - 3 -
Other - 7 6 1 6
Relative dynamic frequency of high level language operations
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Instruction Execution Characteristics
Operations performed
%Dynamic Occurrence
Machine instruction weighted
Memory reference weighted
Pascal C Pascal C Pascal C
Assign 45 38 13 13 14 15
Loop 5 3 42 32 33 26
Call 15 12 31 33 44 45
If 29 43 11 21 7 13
Goto - 3 - - - -
Other 6 1 3 1 2 1
Weighted relative dynamic frequency of HLL operation
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Instruction Execution Characteristics
Operands used
Dynamic percentage of operands
% Pascal C Average
Integer constant 16 23 20
Scalar variable 58 53 55
Array/structure 26 24 25
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Instruction Execution Characteristics
Procedure calls
Procedure arguments and local scalar variables
Percentage of executed procedure calls with
Compiler, interpreter, and
typesetter
Small nonnumeric program
>3 arguments 0-7 0-5
>5 arguments 0-3 0
>8 words of arguments and local scalars
1-20 0-6
>12 word of arguments and local scalar
1-6 0-3
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Instruction Execution Characteristics
Implication
1. Use a large number of registers or use a compiler to optimize register usage.
2. Careful attention need to be paid to the design of instruction pipelines.
3. A simplified (reduced) instruction set is indicated.
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The use of a large register file
The most accesses are to local scalars.
1. The software approach is to rely on compiler to maximize register usage.
2. The hardware approach is simply to use more register so that more variables can be held in registers for longer periods of time.
A strategy is needed that will allow the most frequently accessed operands to be kept in registers and to minimize register-memory operations.
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The use of a large register file
Register windows
1. A typical procedure employs only a few passed parameters and local variable
2. The depth of procedure activation fluctuates within a relative narrow range.
The facts:
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The use of a large register file
Register windows
Overlapping register windows
Parameterregisters
Localregisters
Temporaryregisters
Parameterregisters
Localregisters
Temporaryregisters
Call/return
Level J
Level J + 1
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B.in
B.loc
C.in
D.in
C.loc
D.loc
A.in
A.loc
(F)
(E)
w0 w1
w2
w3w4
w5
Savewindowspointer
Currentwindowspointer
SaveRestore
Return
Call
The use of a large register file
Register windows
Circular buffer organization of overlapped windows
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The use of a large register file
Large register file versus cache
Characteristics of large register file and cache organizations
Large register file Cache
All local scalars Recently used local scalars
Individual variables Blocks of memory
Compiler assigned global variables Recently used global variables
Save/restore based on procedure nesting depth
Save/restore based on cache replacement algorithm
Register addressing Memory addressing
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The use of a large register file
Large register file versus cache
Referencing a scalar
R
DecoderW#
Registers
Data
Instruction
A
Instruction
Tags Data
Compare Select
(a) Windows based register file (b) Cache
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A B C D E F
DE
R1 R2 R3
A
D F
B
C E
(b) Register interference graph(a) Time sequence of active use of registers
Compiler based register optimization
Graph coloring approach