AD7327/AD7328 Evaluation Board User Guide UG-419
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Evaluating the AD7327/AD7328
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. Rev. 0 | Page 1 of 28
FEATURES Full-featured evaluation board for the AD7327/AD7328 PC control in conjunction with the system demonstration
platform (EVAL-SDP-CB1Z) PC software for control and data analysis (time and
frequency domain) Standalone capability
EVAL-AD7327SDZ/EVAL-AD7328SDZ KIT CONTENTS EVAL-AD7327SDZ/EVAL-AD7328SDZ evaluation board Evaluation software CD for the AD7327/AD7328 9 V mains power supply adapter
ADDITIONAL EQUIPMENT NEEDED System demonstration platform (EVAL-SDP-CB1Z) Precision analog signal source SMB cables USB cables
EVALUATION BOARD DESCRIPTION The EVAL-AD7327SDZ/EVAL-AD7328SDZ is a full-featured evaluation board, designed to allow the user to easily evaluate all features of the AD7327/AD7328. The evaluation board can be controlled via the SDP connector (J2). The EVAL-SDP-CB1Z board allows the evaluation board to be controlled via the USB port of a PC using the AD7327/AD7328 evaluation software.
The EVAL-AD7327SDZ/EVAL-AD7328SDZ generates all required power supplies on-board and supplies power to the EVAL-SDP-CB1Z controller board.
On-board components include the following:
• AD8597: ultralow noise op amp • ADP1613: step-up PWM dc-to-dc switching converter • ADP3303-5: high accuracy anyCAP® 200 mA low dropout
linear regulator • ADP2301: 1.2 A, 20 V, 1.4 MHz nonsynchronous step-down
switching regulator • ADM1185: quad voltage monitor and sequencer • ADP190: logic controlled, high-side power switch • ADG3308: low voltage, 1.15 V to 5.5 V, 8-channel
bidirectional logic level translator • AD780: 5 V/3.0 V ultrahigh precision band gap voltage
reference
Various link options are described in the Evaluation Board Hardware section.
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TABLE OF CONTENTS Features .............................................................................................. 1 EVAL-AD7327SDZ/EVAL-AD7328SDZ Kit Contents ............... 1 Additional Equipment Needed ....................................................... 1 Evaluation Board Description......................................................... 1 Revision History ............................................................................... 2 Functional Block Diagram .............................................................. 3 EVAL-AD7327SDZ/EVAL-AD7328SDZ Quick Start Guide ..... 4
Recommended Quick Start Guide ............................................. 4 Evaluation Board Hardware ............................................................ 5
AD7327 Device Description ....................................................... 5 AD7328 Device Description ....................................................... 5 Hardware Link Options ............................................................... 5 Power Supplies .............................................................................. 7 Serial Interface .............................................................................. 8 Analog Inputs ................................................................................ 8 Reference Options ........................................................................ 8 Sockets/Connectors...................................................................... 8 EVAL-AD7327SDZ/EVAL-AD7328SDZ Basic Hardware Setup ............................................................................................... 8
Evaluation Board Software ...............................................................9 Software Installation .....................................................................9 Launching the Software ............................................................. 11 Software Operation .................................................................... 11 Description of User Software Panel ......................................... 12 Register Controls ........................................................................ 13 Data Capture/WaveForm Tab ................................................... 14 AC Testing—Data Capture/Histogram Tab ............................ 15 DC Testing—Data Capture/Histogram Tab ........................... 15 AC Testing—Data Capture/FFT Tab ....................................... 16 Data Capture/Summary Tab ..................................................... 17 Save File ....................................................................................... 18 Load File ...................................................................................... 18
Evaluation Board Schematics and Artwork ................................ 19
REVISION HISTORY 10/12—Revision 0: Initial Version
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FUNCTIONAL BLOCK DIAGRAM
CS
DINDOUT
VCC
AD7327/AD7328
EVAL-SDP-CB1ZCONTROLLER
BOARD
SERIALINTERFACE
ON-BOARDPOWER SUPPLIES
VSS
ADG3308 LEVEL
SHIFTER
VSS
VDRIVE
VIN
DCINPUTJACK
VDD
GND
BIPOLARINPUT SIGNALS
×8
SCLKVIN0... 7IN7
AD780REF
INPUTBUFFERS×8
REFIN/OUT
VDRIVE
VCC
GND
GND
GND
EVAL-AD7327SDZ/EVAL-AD7328SDZ
ADP3303+5V
ADP2301SDP 5V
ADP1613±15V
ADP1903.3V
ADM1185POWER
SEQUENCER
OP AMPSUPPLIES
AD8597
VIN
VDD
7-9V
+
–
5V
BF527DSP
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Figure 1.
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EVAL-AD7327SDZ/EVAL-AD7328SDZ QUICK START GUIDE RECOMMENDED QUICK START GUIDE To install the software, do the following:
1. Install the AD7327/AD7328 software from the enclosed CD. When installing the software, ensure that the EVAL-SDP-CB1Z board is disconnected from the USB port of the PC. After installation, restart the PC.
2. Connect the EVAL-SDP-CB1Z board to the EVAL-AD7327SDZ/EVAL-AD7328SDZ board, as shown in Figure 2.
3. Screw the EVAL-SDP-CB1Z board to the EVAL-AD7327SDZ/ EVAL-AD7328SDZ board together with the enclosed nylon screw-nut set to ensure that the boards connect firmly together.
4. Connect the 9 V power supply adapter included in the kit to the J702 connecter on the EVAL-AD7327SDZ/EVAL-AD7328SDZ board.
5. Connect the EVAL-SDP-CB1Z board to the PC via the USB cable. For Windows® XP, searching for the EVAL-SDP-CB1Z drivers may be needed. If prompted by the operating system, choose to automatically search for the drivers for the EVAL-SDP-CB1Z board.
6. Launch the AD7327/AD7328 software from the Analog Devices, Inc., subfolder in the All Programs menu.
9V PSU
EVAL-SDP-CB1Z
USB TO PC 1073
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Figure 2. Setting Up the EVAL-AD7327SDZ/EVAL-AD7328SDZ
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EVALUATION BOARD HARDWARE AD7327 DEVICE DESCRIPTION The AD7327 is an 8-channel, 12-bit plus sign, successive approximation analog-to-digital converter (ADC) designed on the industrial CMOS (iCMOS) process. iCMOS is a process that combines high voltage silicon with submicron CMOS and complementary bipolar technologies. It enables the development of a wide range of high performance analog ICs capable of 33 V operation in a footprint that no previous generation of high voltage parts could achieve. Unlike analog ICs using conventional CMOS processes, iCMOS components can accept bipolar input signals while providing increased performance, dramatically reduced power consumption, and reduced package size.
The AD7327 can accept true bipolar analog input signals. The AD7327 has four software-selectable input ranges: ±10 V, ±5 V, ±2.5 V, and 0 V to +10 V. Each analog input channel can be independently programmed to one of the four input ranges. The analog input channels on the AD7327 can be programmed to be single-ended, true differential, or pseudo differential.
The ADC contains a 2.5 V internal reference. The AD7327 also allows external reference operation. If a 3 V reference is applied to the REFIN/OUT pin, the AD7327 can accept a true bipolar ±12 V analog input. Minimum ±12 V VDD and VSS supplies are required for the ±12 V input range. The ADC has a high speed serial interface that can operate at throughput rates up to 500 kSPS.
AD7328 DEVICE DESCRIPTION The AD7328 is an 8-channel, 12-bit plus sign, successive approximation ADC designed on the industrial CMOS (iCMOS) process. iCMOS is a process that combines high voltage silicon with submicron CMOS and complementary bipolar technologies. It enables the development of a wide range of high performance analog ICs capable of 33 V operation in a footprint that no
previous generation of high voltage parts could achieve. Unlike analog ICs using conventional CMOS processes, iCMOS components can accept bipolar input signals while providing increased performance, dramatically reduced power consumption, and reduced package size.
The AD7328 can accept true bipolar analog input signals. The AD7328 has four software-selectable input ranges: ±10 V, ±5 V, ±2.5 V, and 0 V to +10 V. Each analog input channel can be independently programmed to one of the four input ranges. The analog input channels on the AD7328 can be programmed to be single-ended, true differential, or pseudo differential.
The ADC contains a 2.5 V internal reference. The AD7328 also allows for external reference operation. If a 3 V reference is applied to the REFIN/OUT pin, the AD7328 can accept a true bipolar ±12 V analog input. Minimum ±12 V VDD and VSS supplies are required for the ±12 V input range. The ADC has a high speed serial interface that can operate at throughput rates up to 1 MSPS.
Complete specifications for the AD7327/AD7328 are provided in the AD7327/AD7328 data sheet, available from Analog Devices, which should be consulted in conjunction with this user guide when using the EVAL-AD7327SDZ/EVAL-AD7328SDZ evaluation board.
HARDWARE LINK OPTIONS Before using the evaluation board, the required operating setup has 23 link options that must be set. The functions of these options are outlined in Table 1. Table 1 lists the position in which all the links are set when the evaluation board is packaged. Before using the evaluation board, set the jumper and solder link (LKx) options correctly to select the appropriate operating setup. The default link positions are listed in Table 2, and the functions of these options are outlined in Table 1.
Table 1. Link Options Link No. Function LK1 Sets Input A0 load to 51 Ω when inserted LK2 Sets Input A1 load to 51 Ω when inserted LK3 Sets Input A2 load to 51 Ω when inserted LK4 Sets Input A3 load to 51 Ω when inserted LK5 Sets Input A4 load to 51 Ω when inserted LK6 Sets Input A5 load to 51 Ω when inserted LK7 Sets Input A6 load to 51 Ω when inserted LK8 Sets Input A7 load to 51 Ω when inserted LK9 A0 signal selection Position A: input signal passed to input buffer amplifiers Position B: 0 V passed to input buffer amplifiers LK10 A1 signal selection Position A: input signal passed to input buffer amplifiers Position B: 0 V passed to input buffer amplifiers
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Link No. Function LK11 A2 signal selection Position A: input signal passed to input buffer amplifiers Position B: 0 V passed to input buffer amplifiers LK12 A3 signal selection Position A: input signal passed to input buffer amplifiers Position B: 0 V passed to input buffer amplifiers LK13 A4 signal selection Position A: input signal passed to input buffer amplifiers Position B: 0 V passed to input buffer amplifiers LK14 A5 signal selection Position A: input signal passed to input buffer amplifiers Position B: 0 V passed to input buffer amplifiers LK15 A6 signal selection Position A: input signal passed to input buffer amplifiers Position B: 0 V passed to input buffer amplifiers LK16 A7 signal selection Position A: input signal passed to input buffer amplifiers Position B: 0 V passed to input buffer amplifiers LK17 VREF voltage selection (0 Ω) Inserted: VREF = 3.0 V Removed: VREF = 2.5 V LK18 VDRIVE selection Position A: VDRIVE = 3.3 V Position B: VDRIVE = VCC Position C: VDRIVE set externally via Socket J3, Pin 2 LK19 CS selection
Position A: CS sourced from the EVAL-SDP-CB1Z
Position B: CS sourced externally via J7, Pin 1
LK20 SCLK selection Position A: SCLK sourced from the EVAL-SDP-CB1Z Position B: SCLK sourced externally via J7, Pin 8 LK21 DIN selection Position A: DIN sourced from the EVAL-SDP-CB1Z Position B: DIN sourced externally via J7, Pin 4 LK22 DOUT Selection Position A: DOUT sourced from the EVAL-SDP-CB1Z Position B: DOUT sourced externally via J7, Pin 3 LK23 REFIN/REFOUT selection Position A: REFIN/REFOUT supplied from the on-board precision reference AD780 Position B: REFIN/REFOUT supplied externally via J7, Pin 2 Open: internal reference used; must be enabled over SPORT LK1011 VSS selection Position A: VSS supplied from on-board supply Position B: VSS supplied from external source via J100 Terminal 1 LK1021 VDD selection Position A: VDD supplied from on-board supply Position B: VDD supplied from external source via J100 Terminal 3
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Link No. Function LK103, LK104, LK105, LK106 Sets the VDD and VSS levels when using the on-board supplies Link ±12V ±15V LK103 POP (place both 0 Ω resistors) NOPOP (neither 0 Ω resistor is placed) LK104 NOPOP (neither 0 Ω resistor is placed) POP (place both 0 Ω resistors) LK105 NOPOP(neither 0 Ω resistor is placed) POP (place both 0 Ω resistors) LK106 POP (place both 0 Ω resistors) NOPOP (neither 0 Ω resistor is placed) LK701 VCC selection Position A: VCC supplied from on-board 5 V supply Position B: VDD supplied from external source via J703 Terminal 1 SL1 to SL4 Not used 1 Both LK101 and LK102 should always be in matching positions.
Table 2. Link Options—Setup Conditions Link No. Position Function LK1 to LK8 Inserted Signal inputs, A0 to A7, set to 51 Ω LK9 to LK16 A Input signals passed to input buffer amplifiers LK17 A Output from AD780 set to 3.0 V LK18 A VDRIVE pin on AD7327/AD7328 set to 3.3 V
LK19 A CS pin on the AD7327/AD7328 is connected to the EVAL-SDP-CB1Z board
LK20 A SCLK pin on the AD7327/AD7328 is connected to the EVAL-SDP-CB1Z board LK21 A DIN pin on the AD7327/AD7328 is connected to the EVAL-SDP-CB1Z board LK22 A DOUT pin on the AD7327/AD7328 is connected to the EVAL-SDP-CB1Z board LK23 A VREF is supplied from the AD780 precision voltage reference LK101 A VSS supplied from on-board supply LK102 A VDD supplied from on-board supply LK103 POP Both 0 Ω resistors placed VDD = 15 V; VSS = −15 V LK104 NOPOP Neither 0 Ω resistors placed VDD = 15 V; VSS = −15 V LK105 NOPOP Neither 0 Ω resistors placed VDD = 15 V; VSS = −15 V LK106 POP Both 0 Ω resistors placed VDD = 15 V; VSS = −15 V LK701 A VCC supplied from on-board 5 V supply
POWER SUPPLIES Take care before applying power and signals to the evaluation board to ensure that all link positions are as required by the operating mode.
When using the EVAL-AD7327SDZ/EVAL-AD7328SDZ in conjunction with the EVAL-SDP-CB1Z board, connect the ac transformer to the J702 connector. VCC, VDD, VSS, and VDRIVE are generated on board.
Each supply is decoupled on the EVAL-AD7327SDZ/EVAL-AD7328SDZ using the 10 µF and 0.1 µF capacitors. A single ground plane is used on this board to minimize the effect of high frequency noise interference.
Table 3. External Power Supply Required
Power Supply Voltage Range (V) Purpose
VIN1, J8 or J702
+7 to +9 Supplies all on-board power supplies that generate all the required voltages to run the evaluation board
VDD, J100 +12 to +16.5 Amplifier +VDD VSS, J100 −12 to −16.5 Amplifier −VSS VCC, J703 +2.7 to +5.25 ADC supply VDRIVE, J3 +2.7 to +5.25 Supply voltage for the digital
interface circuitry 1 When this is supplied, all other power supplies are available on-board. If this
supply is not used, all other supplies must be sourced from an external source.
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SERIAL INTERFACE The AD7327/AD7328 uses a high speed serial interface that allows sampling rates up to 500 kSPS for the AD7327 and 1 MSPS for the AD7328. For details on the operation of the serial bus, refer to the AD7327 data sheet and the AD7328 data sheet.
The EVAL-AD7327SDZ/EVAL-AD7328SDZ communicates with the EVAL-SDP-CB1Z board using level shifters. The EVAL-SDP-CB1Z operates at a 3.3 V logic level. The level shifters allow the VDRIVE voltages to exceed 3.3 V and be used without damaging the SDP interface.
Details of the serial interface can be found in the AD7327 data sheet and the AD7328 data sheet.
ANALOG INPUTS The analog inputs on the EVAL-AD7327SDZ/EVAL-AD7328SDZ are filtered and buffered by the AD8597 ultralow distortion, ultra-low noise op amp. The EVAL-AD7327SDZ/EVAL-AD7328SDZ is configured for single-ended input mode.
The A0 and A1 inputs allow a signal to be connected to the board via the SMB connectors. Alternatively, all signals can be connected via Header J1.
For performance evaluation, using the SMB connections is recommended for the best signal quality on the A0 and A1 inputs.
Each analog input to the EVAL-AD7327SDZ/EVAL-AD7328SDZ allows a 51 Ω load to be placed on the input, if required. LK1 to LK8 are placed to connect the inputs to the 51 Ω loads.
REFERENCE OPTIONS The reference source can be from the AD7327/AD7328 REFIN/ OUT pin or from an AD780, 5 V/3.0 V, ultrahigh, precision band gap, voltage reference (U12). An external reference voltage may also be applied to Pin 2 of J7.
SOCKETS/CONNECTORS
Table 4. Socket Connection Functions Socket Function J1 A0 to A7 inputs with ground pins adjacent to each
signal pin J2 SDP1Z socket for evaluation control board J3 External screw connection for VDRIVE J4 Analog A0 input; buffered to VIN0, AD7327/AD7328 J5 Test point access to VIN0 to VIN7 signals J6 Analog A1 input; buffered to VIN0, AD7327/AD7328 J7 External connection for serial interface and reference
voltage J8 7 V to 9 V bench supply screw terminal connector J100 VSS and VDD screw terminal connectors J702 7 V to 9 V dc transformer power connector J703 AVCC screw terminal connector
EVAL-AD7327SDZ/EVAL-AD7328SDZ BASIC HARDWARE SETUP The AD7327/AD7328 evaluation board connects to the SDP board (EVAL-SDP-CB1Z). The EVAL-SDP-CB1Z board is the controller board, which is the communication link between the PC and the main evaluation board. Figure 2 shows a photograph of the connections made between the AD7327/AD7328 daughter board and the EVAL-SDP-CB1Z board.
Before connecting power, connect the EVAL-AD7327SDZ/ EVAL-AD7328SDZ board to Connector A or Connector B on the EVAL-SDP-CB1Z board. Use the nylon screws included in the EVAL-AD7327SDZ/EVAL-AD7328SDZ evaluation kit and to ensure the EVAL-AD7327SDZ/EVAL-AD7328SDZ board and the EVAL-SDP-CB1Z board are connected firmly together.
When the EVAL-AD7327SDZ/EVAL-AD7328SDZ board and the EVAL-SDP-CB1Z board are connected securely, connect the power supplies on the EVAL-AD7327SDZ/EVAL-AD7328SDZ board. The EVAL-AD7327SDZ/EVAL-AD7328SDZ requires an external power supply, which is included in the evaluation board kit. Connect this power supply to the J702 connector on the EVAL-AD7327SDZ/EVAL-AD7328SDZ board. Alternatively, a bench power supply can be used to power the EVAL-AD7327SDZ/ EVAL-AD7328SDZ via J8. Further details on the required power supplies connections and options are detailed in Table 4.
Before connecting the EVAL-SDP-CB1Z board to a PC, ensure that the AD7327/AD7328 software has been installed from the enclosed CD. The full software installation procedure is detailed in the Evaluation Board Software section.
Finally, connect the EVAL-SDP-CB1Z board to the PC via the USB cable enclosed in the EVAL-SDP-CB1Z kit. If using the Windows XP® platform, the EVAL-SDP-CB1Z drivers may need to be searched for. If prompted by the operating system, choose to automatically search for the drivers for the EVAL-SDP-CB1Z board.
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EVALUATION BOARD SOFTWARE SOFTWARE INSTALLATION The EVAL-AD7327SDZ/EVAL-AD7328SDZ evaluation kit includes software on a CD. Click the setup.exe file from the CD to run the install. The default location for the software is the following: C:\Program Files\Analog Devices\AD7327_28.
Install the evaluation software before connecting the evaluation board and the EVAL-SDP-CB1Z board to the USB port of the PC to ensure that the evaluation system is correctly recognized when connected to the PC.
There are two parts to the installation
• AD7327/AD7328 evaluation board software install • EVAL-SDP-CB1Z SDP board drivers install
Figure 3 to Figure 7 show the separate stages of the AD7327/ AD7328 evaluation software. Figure 8 to Figure 12 show the separate steps to install the EVAL-SDP-CB1Z drivers. Proceed through all of the installation steps allowing the software and drivers to be placed in the appropriate locations. Only after the software and drivers have been installed should the EVAL-SDP-CB1Z board be connected to the PC.
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Figure 3. AD7327/AD7328 Install Window 1
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Figure 4. AD7327/AD7328 Install Window 2
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Figure 5. Install Window 3
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Figure 6. AD7327/AD7328 Install Window 4
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Figure 7. AD7327/AD7328 Install Window 5
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Figure 8. EVAL-SDP-CB1Z Drivers Setup Window 1
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Figure 9. EVAL-SDP-CB1Z Drivers Setup Window 2
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Figure 10. EVAL-SDP-CB1Z Drivers Setup Window 3
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Figure 11. EVAL-SDP-CB1Z Drivers Setup Window 4
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Figure 12. EVAL-SDP-CB1Z Drivers Setup Window 5
After installation from the CD is complete, connect the EVAL-AD7327SDZ/EVAL-AD7328SDZ board to the EVAL-SDP-CB1Z board as described in the Evaluation Board Hardware section.
When the EVAL-SDP-CB1Z board is first plugged in via the USB cable provided, allow the Found New Hardware Wizard to run. Once the drivers are installed, ensure that the board has connected correctly by looking at the Device Manager of the PC. When the EVAL-SDP-CB1Z board appears under ADI Development Tools, the installation is completed.
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Figure 13. Device Manager
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LAUNCHING THE SOFTWARE When the EVAL-AD7327SDZ/EVAL-AD7328SDZ and EVAL-SDP-CB1Z are correctly connected to the PC, the AD7327/ AD7328 software can be launched.
To launch the software, complete the following steps: 1. From the Start menu, select Programs/Analog Devices/
AD7327/AD7328. The main window of the software then displays.
2. If the AD7327/AD7328 evaluation system is not connected to the USB port via the EVAL-SDP-CB1Z when the software is launched, a connectivity error displays (see Figure 14). Connect the evaluation board to the USB port of the PC, wait a few seconds, click Rescan, and follow the instructions.
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Figure 14. Connectivity Error Alert
SOFTWARE OPERATION When the software is launched, the panel opens and the software looks for hardware connected to the PC. The software detects the generic attached to the PC and returns this in a user dialog box. The user software panel then launches as shown in Figure 15.
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Figure 15. User Software Panel, Setup Screen
DESCRIPTION OF USER SOFTWARE PANEL The user software panel, as shown in Figure 15, has the following features:
1. File menu with the choice of the following: a. Load data: load previously captured data in .tsv (tab
separated values) format for analysis b. Save Data as .tsv: save captured data in .tsv) format
for future analysis c. Print Front Panel Picture: use to print the front panel
to the default printer. d. Save Picture: use to save the current screen capture e. EXIT
2. Use this drop-down menu to select the generic, AD7327 or AD7328.
3. Sampling Rate: The default sampling frequency matches the maximum sample rate of the ADC selected from the drop-down menu. User can adjust the sampling frequency; however, there are limitations around the sample frequency, where unusable sample frequencies are input, and the software automatically adjusts the sample frequency accordingly. Units can be entered such as 10k for 10,000 Hz. As the
maximum sample frequency possible is device dependent, with some of the ADCs capable of operating up to 250 kSPS, while others can run to 1.3 MSPS, the software matches the particular ADC ability. If the user enters a value larger than the ability of the existing device, the software indicates this and reverts to the maximum sample frequency.
4. Sample: to perform a single capture. 5. Continuous: to perform a continuous capture from the
ADC. Press a second time to stop sampling. 6. Select the number of samples (# Samples) to analyze. 7. There are four tabs available displaying the data in different
formats, these are listed here and described in more detail in the Data Capture/WaveForm Tab, AC Testing—Data Capture/Histogram Tab, DC Testing—Data Capture/Histogram Tab, AC Testing—Data Capture/FFT Tab, and Data Capture/Summary Tab sections. a. Waveform b. Histogram c. FFT d. Summary
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8. EXIT button. Use this button to exit the software. Alternatively, go to File/Exit.
9. Channel display buttons. Use these to display multiple channel reads on the display. For FFT analysis, select only one channel.
10. Registers (Control Register, Sequence Register, Range Register 1, and Range Register 2). Use these buttons to access the register settings dialog boxes. See the Register Controls section for more details.
Within any of the chart panels, the following tools allow user control of the different chart displays.
is used for controlling the cursor. if present.
is used for zooming in and out.
is used for panning.
Click Save Plot to save plots.
REGISTER CONTROLS There are four registers used to control the operations of the AD7327/AD7328. For detailed settings of these registers, refer to the relevant data sheet.
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Figure 16. Control Register Dialog Box
The Control Register sets up the addressing, modes, and power management, as well as setting the sequence, coding, and reference source (see Figure 16).
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Figure 17. Sequence Register Dialog Box
The Sequence Register selects which channels are included in the channel sequencing (see Figure 17).
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Figure 18. Range Register1 Dialog Box
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Figure 19. Range Register2 Dialog Box
Range Register 1 and Range Register 2 allow the range of each channel to be individually selected (Figure 18 and Figure 19).
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Figure 20. Data Capture/Waveform Tab
DATA CAPTURE/WAVEFORM TAB Figure 20 illustrates the Data Capture/Waveform tab. The input signal here is a 50 kHz sine wave.
Number 1 in Figure 20 shows that the waveform analysis reports back the amplitudes recorded from the captured signal in addition to the frequency of the signal tone (see Figure 20).
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Figure 21. Data Capture/Histogram Tab
AC TESTING—DATA CAPTURE/HISTOGRAM TAB Figure 21 shows the Data Capture/Histogram tab. This tab allows the user to test the ADC for the code distribution for ac input and computes the mean and standard deviation, or transition noise of the converter, and displays the results.
Raw data is captured and then passed to the PC for statistical computations. To perform a histogram test, select the Histogram tab and click Sample.
An ac histogram needs a quality signal source applied to the input of the SK1/SK3 connectors. Figure 21 shows the histogram for a 50 kHz sine wave applied to the ADC input and the results calculated.
Number 1 in Figure 21 illustrates the different measured values for the data captured.
DC TESTING—DATA CAPTURE/HISTOGRAM TAB More commonly, the histogram is used for dc testing, where the ADC is tested for the code distribution for dc input and computes the mean and standard deviation, or transition noise of the converter, and displays the results. Raw data is captured and passed to the PC for statistical computations. To perform a histogram test, select the Histogram tab click Sample.
A histogram test can be performed without an external source because the evaluation board has a buffered VREF/2 source at the ADC input. To test other dc values, apply a source to the J3 and J4 inputs. To make the dc source noise compatible with that of the ADC, it may be required to filter the signal.
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Figure 22. Data Capture/FFT Tab
AC TESTING—DATA CAPTURE/FFT TAB Figure 22 shows the Data Capture/FFT tab This tests the traditional ac characteristics of the converter and displays a Fast Fourier Transform (FFT) of the results. As in the histogram test, raw data is captured and passed to the PC, where the FFT is performed displaying the signal-to-noise ratio (SNR), signal-to-noise-and-distortion ratio (SINAD), total harmonic distortion (THD), and spurious-free dynamic range (SFDR). To perform an ac test, apply a sinusoidal signal to the evaluation board at the SMB inputs, J4 and J6. Low distortion, better than 115 dB, is required to allow true evaluation of the part. One possibility is to filter the input signal from the ac source. There is no suggested
band-pass filter; however, take consideration in the choice. Furthermore, if using a low frequency, band-pass filter when the full-scale input range is more than a few volts peak-to-peak, use the on-board amplifiers to amplify the signal, thus preventing the filter from distorting the input signal.
Figure 22 displays the results of the captured data.
1. Shows the input signal information 2. Displays the fundamental frequency (Fund) and amplitude
in addition to the second (2nd) to fifth (5th) harmonics. 3. Displays the performance data: SNR, THD, SINAD, Peak
Spurious, Pk Noise Freq, and Bin.
AD7327/AD7328 Evaluation Board User Guide UG-419
Rev. 0 | Page 17 of 28
1073
2-02
5
Figure 23. Data Capture/Summary Tab
DATA CAPTURE/SUMMARY TAB Figure 23 shows the Data Capture/Summary tab. It captures all the display information and provides it in one panel with a synopsis of the information, including key performance parameters, such as SNR and THD.
UG-419 AD7327/AD7328 Evaluation Board User Guide
Rev. 0 | Page 18 of 28
SAVE FILE The software can save the current captured data for later analysis to a .tsv file (see Figure 24). Window users are prompted to save to an appropriate folder location.
1073
2-02
6
Figure 24. Save File Dialog Box (Choose file to write.)
LOAD FILE In the Choose file to read. window, users are prompted to load the file (see Figure 25). User may have to navigate to find these example files. The default location for the example files is: C:\Program Files\Analog Devices\AD7327_28\examples.
1073
2-02
7
Figure 25. Load File Dialog Box (Choose file to read.)
AD7327/AD7328 Evaluation Board User Guide UG-419
Rev. 0 | Page 19 of 28
EVALUATION BOARD SCHEMATICS AND ARTWORK
15
Vdi
vide
r
12
Vdi
vide
r
Sel
ect
outp
ut
volt
age
wit
hth
ese
LK1
03
and
LK1
04
0R
resi
stor
s
+1
2/1
5V
-12
/-1
5V
Join
atU
10
0.4
VS
S
VD
DV
DD
VS
S
GN
D
LIN
K+
/-1
2V
+/-
15
V
LK
10
3
LK
10
4
LK
10
5
LK
10
6
INO
UT
IN IN
INOU
T
OU
T
OU
T
IN=
>b
oth
A&
B0
RP
lace
d.
OU
T=
>A
&B
0R
rem
ov
ed
Ou
tpu
tv
olt
ag
eJu
mp
er
sett
ing
sP
ow
er
sup
ply
for
Am
pli
fie
rs
1
23
Q100
SI2
304D
DS
-T1-G
E3
D101
B0540W
-7-F
D100
B0540W
-7-F
C107
10uF
14m
R
R112
309k
C109
6.8
nF
C110
10pF
R116
47k5
R115
4k22
R114
71k5
R113
8k25
C102
10uF
14m
R
C103
10uF
14m
R
C104
10uF
14m
R
C105
10uF
14m
R
C106
10uF
14m
R
C118
10uF
14m
R
C119
10uF
14m
R
C120
10uF
14m
RC
121
10uF
14m
R
C122
10uF
14m
R
C123
10uF
14m
R
R100
150k
C115
1uF
9m
R
C108
1uF
5.5
mR
R118
DN
PC
124
DN
P
A BLK101
AB LK102
J100-1
J100-3
J100-2
R106
2R
2R107
8R
2
R103
14R
R104
2R
2
R105
8R
2R117
14R
12
34
L102
15uH
12
34
L101
15uH
12
L103
1.0
uH
60m
R
12
L104
1.0
uH
60m
R
C111
1uF
C116
1uF
C112
1uF
9m
R
C113
1uF
9m
R
C114
1uF
9m
R
C101
1uF
9m
R
C125
5.6
nF
C117
1uF
11m
R
C100
1uF
11m
R
B
A
LK103
B
A
LK104
BA
LK105
LIN
K-2
-R0603
BA
LK106
1C
OM
P
2FB
3EN
4GN
D
5S
W6
VIN
7FR
EQ
8S
S
U100
AD
P1613A
RM
Z
V_IN
VD
D
VS
S
LK105
LK105
LK106A
LK106B
LK106B
LK106A
VD
D_V
SS
_EN
SG
ND
SG
ND
5V
_LO
CA
L
10732-028
Figure 26. Schematic Page 1
UG-419 AD7327/AD7328 Evaluation Board User Guide
Rev. 0 | Page 20 of 28
C160-C
163
plac
edon
lyif
spec
ific
dela
ysnee
ded
PW
RG
D
Gro
un
dS
tar
poin
t.Pl
ace
nea
rto
V_
inja
ckpl
ug
J4/
J1
An
alo
gp
ow
er
sup
ply
VC
CA
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we
rsu
pp
lyfo
rS
DP
bo
ard
AG
ND
PW
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CP
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er
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pp
ly
Po
we
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pp
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ard
Po
we
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eq
ue
nci
ng
Su
pp
lyfo
rV
-DR
IVE
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D
2V
IN1
3V
IN2
4V
IN3
5V
IN4
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D
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8O
UT2
9O
UT1
10
VD
DU
703
AD
M11
85A
RM
Z
R71
32k
4
LED
1
GR
EEN
R71
52k
4
LED
2
GR
EEN
R71
610
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717
10k
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810
k
1
23
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2N
7002
R71
910
k
R70
168
k
C710
DN
P
C713
DN
P
C714
DN
P
C715
DN
P
R70
218k
R70
368
k
R70
468
k
R70
518k
R70
768
k
R70
818k
J702-1
J702-2
J702-3
J702-4
J703-1
J703-2
8IN
17
IN2
5S
D
4G
ND
1O
UT1
2O
UT2
6ER
RO
R3
NR
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AD
P3303-5
C720
10nF
R71
2
330kR
0402
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10nF
B ALK701
C721
1uF
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IN
4EN
3FB
6S
W
2G
ND
1B
ST
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AD
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1A
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C725
0.1
uF
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453k6
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GN
D
B1
EN
A2
VO
UT
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1 AD
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AC
BZ
R74
118k
R74
068
k
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GN
D
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610
k
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J8-1
1V
OU
T
2S
EN
SE
3G
ND
4N
/C
5EN
/UV
LO
6G
ND
7PG
8V
IN
9EP
U7
06
AD
P7
10
2A
RD
Z-5
.0
C700
1uF
C701
1uF
12
L1
6.8
uH
C724
10uF
14m
R
+C
711
10uF
+C
712
10uF
V_I
N
VC
C_EN
VD
D_V
SS
_EN
VS
DP_
EN
VC
C VS
DP
VD
D
V_IN
AG
ND
SD
P_G
ND
VIN
_G
ND
VC
C
V_IN
VC
C_EN
V_IN
SD
P_G
ND
VS
DP
VS
DP_
EN
SD
P_G
ND
SD
P_V
IO_3.3
VV
DR
IVE_3V
3
V_IN
5V
_LO
CA
L
10732-029
Figure 27. Schematic Page 2
AD7327/AD7328 Evaluation Board User Guide UG-419
Rev. 0 | Page 21 of 28
Boa
rdID
EEPR
OM
(24LC
32)
must
beon
I2C
bus
0,
I2C
bus
1is
com
mon
acro
ssbo
thco
nnec
tors
onS
DP
-Pu
llup
resi
stor
sre
quir
ed
BM
OD
E1:
Pull
up
wit
ha
10K
resi
stor
tose
tS
DP
tobo
otfr
oma
SPI
FLA
SH
onth
eda
ugh
ter
boar
d
Mai
nI2
Cbu
s(C
onnec
ted
tobl
ackf
inTW
I-
Pull
up
resi
stor
snot
requ
ired
)
VIN
:U
seth
ispi
nto
pow
erth
eS
DP
requ
ires
5V
200m
A
VIO
:U
SE
tose
tIO
volt
age
max
draw
20m
A
Boa
rdID
EEPR
OM
(24LC
32)
must
beon
I2C
bus
0,
I2C
bus
1is
com
mon
acro
ssbo
thco
nnec
tors
onS
DP
-Pu
llup
resi
stor
sre
quir
ed
BM
OD
E1:
Pull
up
wit
ha
10K
resi
stor
tose
tS
DP
tobo
otfr
oma
SPI
FLA
SH
onth
eda
ugh
ter
boar
d
Mai
nI2
Cbu
s(C
onnec
ted
tobl
ackf
inTW
I-
Pull
up
resi
stor
snot
requ
ired
)
Use
SD
P_
GN
Da
sre
turn
for
VS
DP
CO
NN
EC
TOR
STA
ND
AR
DS
DP
PAR
ALL
EL
POR
T
SPO
RT
SPI
I2C
GEN
ER
AL
INPU
T/O
UTP
UT
TIM
ER
S
* * * *
*
* * * *
* * * *
*N
Con
BLA
CK
FIN
SD
P120
NC
119
NC
118
GN
D117
GN
D116
VIO
(+3.3
V)
115
GN
D114
PAR
_D
22
113
PAR
_D
20
112
PAR
_D
18
111
PAR
_D
16
110
PAR
_D
15
109
GN
D108
PAR
_D
12
107
PAR
_D
10
106
PAR
_D
8105
PAR
_D
6104
GN
D103
PAR
_D
4102
PAR
_D
2101
PAR
_D
0100
PAR
_W
R99
PAR
_IN
T98
GN
D97
PAR
_A
296
PAR
_A
095
PAR
_FS
294
PAR
_C
LK93
GN
D92
SPO
RT_
RS
CLK
91
SPO
RT_
DR
090
SPO
RT_
RFS
89
SPO
RT_
TFS
88
SPO
RT_
DT0
87
SPO
RT_
TSC
LK86
GN
D85
SPI
_S
EL_
A84
SPI
_M
OS
I83
SPI
_M
ISO
82
SPI
_C
LK81
GN
D80
SD
A_0
79
SC
L_0
78
GPI
O1
77
GPI
O3
76
GPI
O5
75
GN
D74
GPI
O7
73
TMR
_B
72
TMR
_D
71
NC
70
NC
69
GN
D68
NC
67
NC
66
NC
65
NC
64
NC
63
GN
D62
UA
RT_
TX61
BM
OD
E1
60
RES
ET_
IN59
UA
RT_
RX
58
GN
D57
NC
56
EEPR
OM
_A
055
NC
54
NC
53
NC
52
GN
D51
NC
50
NC
49
TMR
_C
48
TMR
_A
47
GPI
O6
46
GN
D45
GPI
O4
44
GPI
O2
43
GPI
O0
42
SC
L_1
41
SD
A_1
40
GN
D39
SPI
_S
EL1
/SPI
_S
S38
SPI
_S
EL_
C37
SPI
_S
EL_
B36
GN
D35
SPO
RT_
INT
34
SPO
RT_
DT3
33
SPO
RT_
DT2
32
SPO
RT_
DT1
31
SPO
RT_
DR
130
SPO
RT_
DR
229
SPO
RT_
DR
328
GN
D27
PAR
_FS
126
PAR
_FS
325
PAR
_A
124
PAR
_A
323
GN
D22
PAR
_C
S21
PAR
_R
D20
PAR
_D
119
PAR
_D
318
PAR
_D
517
GN
D16
PAR
_D
715
PAR
_D
914
PAR
_D
11
13
PAR
_D
13
12
PAR
_D
14
11
GN
D10
PAR
_D
17
9PA
R_D
19
8PA
R_D
21
7PA
R_D
23
6G
ND
5U
SB
_V
BU
S4
GN
D3
GN
D2
NC
1V
INJ2
R28
R29
100K
R63
100K
1A
02
A1
3A
24
VS
S
8V
CC
7W
P6
SC
L5
SD
A
U2
24LC
32A
-I/M
SC
63
0.1
uF
C64
0.1
uF
R11
68k
1V
CC
A
2A
13
A2
4A
35
A4
6A
57
A6
8A
79
A8
10
EN
11
GN
D
12
Y8
13
Y7
14
Y6
15
Y5
16
Y4
17
Y3
18
Y2
19
Y1
20
VC
CY
U3
AD
G3308
SD
P_V
IO_3.3
VS
DP_
VIO
_3.3
V
VS
DP
SD
P_G
ND
SD
P_V
IO_3.3
V
SPO
RT_
TFS
SPO
RT_
DR
0
SPO
RT_
RS
CLK
SPO
RT_
DT0
SPO
RT_
RFS
SC
LK_S
W
CS
_S
W
DO
UT_
SW
DIN
_S
W
SPO
RT_
TSC
LKS
POR
T_D
T0S
POR
T_TF
S
SPO
RT_
RFS
SPO
RT_
DR
0S
POR
T_R
SC
LK
SPO
RT_
TSC
LK
VD
RIV
EV
DR
IVE_3V
3
VD
RIV
E_3V
3
10732-030
Figure 28. Schematic Page 3
UG-419 AD7327/AD7328 Evaluation Board User Guide
Rev. 0 | Page 22 of 28
A0
_G
ND A
1
A2
A3
A4
_G
ND
A5
A6
_G
ND A
7
A0
A1
_G
ND
A4
A5
_G
ND
A7
_G
ND
A6
A3
_G
ND
A2
_G
ND
AD
CD
RIV
ER
s
C24
0.1
uF
+
C23
10uF
C22
0.1
uF
+
C1
10uF
BALK9
LK1
R1
51r
R2 51r
LK2
BA
LK10
+
C2
10uF
C3
0.1
uF
+
C4
10uF
C29
0.1
uF
R5
51r
LK5
BA
LK13
+
C41
10uF
C42
0.1
uF
+
C43
10uF
C44
0.1
uF
R6
51r
LK6
BA
LK14
+
C46
10uF
C47
0.1
uF
+
C48
10uF
C20
18pF
R9
1K
R10
DN
P
R3
1K
C68
100pF
R12
DN
P
R13
1K
C5
100pF
C70
18pF
R16
1K
R17
DN
P
SL1
R14
DN
P
R15
DN
P
R18
DN
P
R19
1K
C40
100pF
C69
18pF
R20
1K
R21
DN
P
R22
1K
C45
100pF
R23
DN
P
C71
18pF
R24
1K
R25
DN
P
SL2
R26
DN
P
R27
DN
P
R4
DN
P
C49
0.1
uF
+
C6
10uF
C32
0.1
uF
+
C31
10uF
BA
LK11
LK3
R7
51r
R8
51r
LK4
BA
LK12
+
C7
10uF
C8
0.1
uF
+
C38
10uF
C39
0.1
uF
R31
51r
LK7
BA
LK15
+
C51
10uF
C52
0.1
uF
+
C53
10uF
R39
51r
LK8
BA
LK16
+
C56
10uF
C57
0.1
uF
+
C58
10uF
C59
0.1
uF
C88
18pF
R40
1K
R44
DN
P
R45
1K C89
100pF
R46
DN
P
R47
1K
C90
100pF
C91
18pF
R48
1K
R49
DN
P
SL3
R50
DN
P
R51
DN
P
R52
DN
P
R53
1K
C92
100pF
C93
18pF
R54
1K
R55
DN
P
R56
1K
C94
100pF
R57
DN
P
C95
18pF
R58
1K
R59
DN
P
SL4
R60
DN
P
R61
DN
P
R62
DN
P
C34
0.1
uF
C54
0.1
uF
J1-1
J1-3
J1-5
J1-7
R32
0R R33
0R R
34
0R R35
0R
R36
0R R
37
0R R
38
0R R41
0R
J4
J6
6
2-
3+
4V
-
7V
+
U4
AD
8597A
RZ
6
2-
3+
4V
-
7V
+
U5
AD
8597A
RZ
6
2-
3+
4V
-
7V
+
U6
AD
8597A
RZ
6
2-
3+
4V
-
7V
+
U7
AD
8597A
RZ
6
2-
3+
4V
-
7V
+
U8
AD
8597A
RZ
6
2-
3+
4V
-
7V
+
U10
AD
8597A
RZ
6
2-
3+
4V
-
7V
+
U9
AD
8597A
RZ
6
2-
3+
4V
-
7V
+
U11
AD
8597A
RZ
J1-2
J1-4
J1-6
J1-8
J1-1
1J1
-12
J1-1
5J1
-16
J1-9
J1-1
0
J1-1
3J1
-14
VS
S
VD
D
VIN
5
VS
S
VD
D
VIN
4
VS
S
VD
D
VIN
1
VIN
0
VD
D
VS
S
VS
S
VD
D
VIN
7
VS
S
VD
D
VIN
6
VS
S
VD
D
VIN
3
VIN
2
VD
D
VS
S
10732-031
Figure 29. Schematic Page 4
AD7327/AD7328 Evaluation Board User Guide UG-419
Rev. 0 | Page 23 of 28
VD
RIV
E
GN
D
VIN
0
VIN
1
VIN
2
VIN
3
VIN
4
VIN
5
VIN
6
VIN
7
CS
RE
FIN
/RE
FO
UT
SC
LK
DO
UT
DIN
GN
D
GN
D
GN
D
VO
LTA
GE
RE
FE
RE
NC
E
C9
0.1
uF
T_C
S
T_V
CC
T_D
OU
T
T_S
CLK
T_D
IN
2+
VIN
3TE
MP
6V
OU
T
8O
P_S
EL
4G
ND
U12
AD
780
C17
0.1
uF
+C
14
10uF
7V
IN0
8V
IN1
9V
IN4
10
VIN
511
VIN
712
VIN
613
VIN
314
VIN
2
5R
EFI
N/R
EFO
UT
6V
SS
15
VD
D16
VC
C
17
VD
RIV
E
1C
S
20
SC
LK
2D
IN
18
DO
UT
3D
GN
D4
AG
ND
19
DG
ND
U1
AD
7328
C16
0.1
uF
+C
19
10uF
J3-1
J3-2
C50
470nF
+
C55 10uF
C60 0.1uF C61 0.1uF
+
C6210uF
X1
CLA
MP-
SO
IC-T
SS
OP
+
C75 10uF
C76
DN
P
T_R
EFI
N/R
EFO
UT
C77 0.1uFC78 0.1uF
BA
LK23
B A
LK21
B A
LK22
B A
LK19
A B C
LK18
LK17
0R
B A
LK20
J5-1
J5-2
J5-3
J5-4
J5-5
J5-6
J5-7
J5-8
J7-1
J7-2
J7-3
J7-4
J7-5
J7-6
J7-7
J7-8
C18
10nF
D4
BA
T43
D5
BA
T43
VD
D
EX
T_V
DR
IVE
VD
D
VS
S
VIN
0
VIN
1
VIN
4
VIN
5
VIN
7
VIN
6
VIN
3
VIN
2
EX
T_C
S
EX
T_R
EFI
N/R
EFO
UT
EX
T_S
CLK
EX
T_D
IN
EX
T_D
OU
T
VC
C
VD
RIV
E_3V
3
VD
RIV
E
VC
C
DO
UT_
SW
EX
T_C
S
EX
T_R
EFI
N/R
EFO
UT
EX
T_D
IN
EX
T_S
CLK
EX
T_D
OU
T
DIN
_S
W
SC
LK_S
W
CS
_S
W
10732-032
Figure 30. Schematic Page 5
UG-419 AD7327/AD7328 Evaluation Board User Guide
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Figure 31. Top Printed Circuit Board (PCB) Silkscreen
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Figure 32. Bottom Printed Circuit Board (PCB) Silkscreen
AD7327/AD7328 Evaluation Board User Guide UG-419
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Figure 33. Layer 1 Component Side View
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Figure 34. Layer 2 Component Side View
UG-419 AD7327/AD7328 Evaluation Board User Guide
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Figure 35. Layer 3 Component Side View
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Figure 36. Layer 4 Component Side View
AD7327/AD7328 Evaluation Board User Guide UG-419
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NOTES
UG-419 AD7327/AD7328 Evaluation Board User Guide
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NOTES
ESD Caution ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
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