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{ X, Z } { Z }{ Y } { Y } { X }
{ X }{ Z }
{ Y }
{ S , Z }
{ S }
b a d b c
1
3
1 2
2
4
5
3 4 5
i
j
{ X }
a d
XY
S
X
b cb
r2
r5r6
r1
YZ
Z X
Y
a d
XY
Y X
Z X
S
X Y
b cb
r2
r5r6 r6 r8
r2
r3
r1
r6 r8
r3
(b)(a)
r4
r9 r9
b
d
a
b
b
b
a
b c
a
ba t1
t4
t5
t7
t6
t3
t2
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bb
d
a
b
c
a a
b b
b
a
t2 t3 t4 t5 t6 t7t1
1 2 3 4 5 6 7 8
1
2
4
3
5
6
7
8
t1 t2 t3 t4 t5 t6 t7
{X,Z}
{Y} {X,Z} {X,Z}
{X,Z}
{Y} {Y} {Y} {Y}
{Y}{X} {Z}
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(DATA + ADDRESS + CONTROL) bus
(DATA + ADDRESS + CONTROL) bus
(DATA + ADDRESS + CONTROL) bus
CYKmemoryarbiter
memory
CYK
(DATA + ADDRESS + CONTROL) bus
GRAMMAR
MEMORY
GRAMMAR
MEMORY
GRAMMAR
MEMORY
cluster 3cluster 1
arbiter
cluster 2
arbiter arbiter
(SRAM) (SRAM) (SRAM)
(SRAM)
GRAMMAR
CLUSTER 1 CLUSTER 2
GRAMMAR
Processor
P1
Processor Processor Processor Processor Processor Processor Processor Processor Processor
P2 P3 P4 P5 P6 P7 P8 P9 P10
GRAMMAR
CLUSTER 3
lengthsentence
overPARSE
FPGA chip
FPGA board (RC1000-PP)
PROCESSOR CONTROL busstartPARSE
GLOBALcontroler
G-CTRL
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module
guard
ReadData
LREG1
LREG2
RREG2
RREG1
tmpIndex tmpBase
shadowtmp
CYKaddress
WriteData
Processor synchronisation unitCYK memory addressing unit
CYK memory DATA
grammar memory ADDRESS
grammar memory DATA
RHS2RHS1
LHS Grammarmemoryaccess module
MAG
RHS1Index RHS2Index
RHS1base RHS2base Guardbase
LHS
update
module
IJIndex
IJbase
IJshadow RHS1shadow RHS2shadow
CYK memory address
update
modulesinisino
synchronisation
update unit
grammar look-up unit
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N11
N21
N1n
N11
N21
N1n
N21
N1n
N11
indexing table non-terminals table guard-vectors table
Phead Pguard
PguardPhead
Phead Pguard
free
free
free
bit 10 15
emptylast
0 0
0 0 0 0
0
1 0 0 1 0
100
0 0 0 0 01
2*C [bytes] | N | [bits]
Dtail
Dtail
Dtail
8 [bytes]
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X1 X2
X1
X1
X1
X1
X1
X1
X1
X2
X2
X2
X2
X2
X2
X2
1
0
|N|-2
|N|-1
|N|-3
LEVEL1 LEVEL2 LEVEL3
ptr_right
ptr_left
ptr_table
RHScode
RHScode
RHScode
RHScode
RHScode
RHScode
RHScode
RHScode
Y
Y
Y
Y
Y
Z
ZZ
Z
ZZZ
Z
Z
Xm
0 100 200 300 400 500 600
3
4
5
6
7
8
9
10
11
12
13
14
15
4.0222.71
0.26
6.8539.48
0.5
9.4555.39
0.74
13.5684.16
1.22
15.7598.78
1.35
21.72141.64
2.13
25.69171.58
2.37
37.26250.15
3.73
37.73
255.82
3.69
46.22314.56
4.64
53.16363.9
5.64
63.89435.36
6.83
71.12508.97
7.7
sentencelength[wo
rds]
time[ms]
soft1soft2hard
2 4 6 8 10 12 14 160
10
20
30
40
50
60
70
80
90
sentence length[words]
speedup
vs. soft2vs. soft1
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