Fall 2006
Lillevik 333f06-l22 1University of Portland School of Engineering
EE 333
Computer OrganizationLecture 22
Project 6Hard disk driveBus arbitration
Fall 2006
Lillevik 333f06-l22 2University of Portland School of Engineering
EE 333
Project 6
• Due: Friday, December 1
• Microprogram the instruction set
• Complete MDP16 design
• Execute a simple program
• Extra credit for additional instructions
Fall 2006
Lillevik 333f06-l22 3University of Portland School of Engineering
EE 333
MDP16 execution
Program stores 0x25, 0x35, and 0x45 at 0x100, 0x101, 0x102 and reads the numbers back
Fall 2006
Lillevik 333f06-l22 4University of Portland School of Engineering
EE 333
MicroROM contents
Fall 2006
Lillevik 333f06-l22 5University of Portland School of Engineering
EE 333
Example trace
$0 = 0x100 for address of sw
Fall 2006
Lillevik 333f06-l22 6University of Portland School of Engineering
EE 333
Example trace, continued.
Mem[100] = 0x25, Mem[101] = 0x35, Mem[102] = 0x45
Fall 2006
Lillevik 333f06-l22 7University of Portland School of Engineering
EE 333
Example trace, continued.
Now load 0x100, 0x101, 0x102 into $1
Fall 2006
Lillevik 333f06-l22 8University of Portland School of Engineering
EE 333
Computer components
• Input: receives information from external world
• Output: transmits information to external world
• Memory: holds programs and data
• Data path: physical route that carries info
• Control: coordinates overall flow of info
Fall 2006
Lillevik 333f06-l22 9University of Portland School of Engineering
EE 333
System Bus
The bus interconnects system agents
Fall 2006
Lillevik 333f06-l22 10University of Portland School of Engineering
EE 333
System view of a computer
One Agent at-a-time owns the bus
···
Signal 0
Signal n
Agent 0 Agent n···
BusSignal 1
Fall 2006
Lillevik 333f06-l22 11University of Portland School of Engineering
EE 333
Agents
• Goal: perform some function (memory, I/O, etc.)
• Types– Master: can own the bus, assert signals– Slave: only responds when requested by master
• Operations– Memory or I/O space– Read or write– Interrupt
Fall 2006
Lillevik 333f06-l22 12University of Portland School of Engineering
EE 333
What type of agent?
Agent Master SlaveCPU Y N
Memory
Disk
Display
Keyboard
Printer
Fall 2006
Lillevik 333f06-l22 13University of Portland School of Engineering
EE 333
Moving-head disk
Disk buses include EIDA, SATA, SCSI
Performance = seek time + latency time + transfer time
NOTE: Unique location denoted CHS cylinder, head, sector
Fall 2006
Lillevik 333f06-l22 14University of Portland School of Engineering
EE 333
Disk features
• Platter: magnetically coated disk
• Side: one of two platter surfaces
• Arm: lever arm that swings across platter
• Head: sensor that reads/writes data on platter
• Track: circular region on platter
• Cylinder: collection of tracks with same radius
• Sector: region of a track, basic unit of data (B)
Fall 2006
Lillevik 333f06-l22 15University of Portland School of Engineering
EE 333
Disk performance
• Seek: time to move arm
• Latency (rotational): time for platter to rotate to requested sector
• Transfer: time to move data across bus
Fall 2006
Lillevik 333f06-l22 16University of Portland School of Engineering
EE 333
High-end disk example
Buffer = disk cache
Host = PC disk controller
Fall 2006
Lillevik 333f06-l22 17University of Portland School of Engineering
EE 333
Find disk bandwidth, transfer time?
CLK = 100 ns, 32-bit data bus, 5 clocks/bus cycle, 512B sector
Fall 2006
Lillevik 333f06-l22 18University of Portland School of Engineering
EE 333
Find the disk average latency?Twelve 5 cm platters, 7200 rpm, 120 GB
Fall 2006
Lillevik 333f06-l22 19University of Portland School of Engineering
EE 333
System view of a computer
One Agent at-a-time owns the bus
···
Signal 0
Signal n
Agent 0 Agent n···
BusSignal 1
Fall 2006
Lillevik 333f06-l22 20University of Portland School of Engineering
EE 333
Example bus control signals?
Fall 2006
Lillevik 333f06-l22 21University of Portland School of Engineering
EE 333
Bus cycle (phases)
1. Arbitration: owner defined
2. Address: ID of memory or I/O provided
3. Data: information transferred
4. Response: indicates completion of cycle
Bus phases similar to instruction steps
Fall 2006
Lillevik 333f06-l22 22University of Portland School of Engineering
EE 333
Bus timing
Clk
Breq
Bgnt
Ack
Data Bus Driven
ARB ADR DATA RESP
Address Bus Driven
Fall 2006
Lillevik 333f06-l22 23University of Portland School of Engineering
EE 333
Bus timing example
Shared signals driven by different agents
DataRdy
Ack
Data
ReadReq 13
4
57
642 2
DiskMem
Disk
Disk-Adr Mem-data
Mem
Bus Cycle
A little more complex
Fall 2006
Lillevik 333f06-l22 24University of Portland School of Engineering
EE 333
Bus arbitration
• Serial: priority in-out, Request-Grant, sent from agent-to-agent (daisy-chain)
• Parallel: each agent asserts unique request (centralized), one grant asserted
• Distributed– Self-selection: agent codes combined to identify
owner– Collision detection: request repeated after a delay
Fall 2006
Lillevik 333f06-l22 25University of Portland School of Engineering
EE 333
Serial arbiter
Each priority circuit ripples to next in line
Fall 2006
Lillevik 333f06-l22 26University of Portland School of Engineering
EE 333
Design the priority circuit?Req Pin Gnt Pout
0 0
0 1
1 0
1 1
Gnt =
Pout =
Fall 2006
Lillevik 333f06-l22 27University of Portland School of Engineering
EE 333
Centralized arbitration
More & fast logic, flexible algorithm
Device 1 Device 2 Device n•••
Central Arbiter
Req
1
Gnt
1
Req
2
Gnt
2
Req
n
Gnt
n
Fixed, round-robin, multi-level, etc.
Fall 2006
Lillevik 333f06-l22 28University of Portland School of Engineering
EE 333
Fixed centralize arbiter
Fall 2006
Lillevik 333f06-l22 29University of Portland School of Engineering
EE 333
Simple RR arbiter
00
10
11
01
Req2 Req1Req3
Req0
Gntn = Staten Reqn
Fall 2006
Lillevik 333f06-l22 30University of Portland School of Engineering
EE 333
Fall 2006
Lillevik 333f06-l22 31University of Portland School of Engineering
EE 333
What type of agent?Agent Master Slave
CPU Y N
Memory N Y
Disk Y Y
Display Y Y
Keyboard N Y
Printer N Y
High-performance agents are often Masters
Fall 2006
Lillevik 333f06-l22 32University of Portland School of Engineering
EE 333
Find disk bandwidth, transfer time?
snsclkTcycle
5.010055
sMBs
bytess
bitsBW 0.8
105.04
5.032
6
ss
sMB
BytesT tor 64
10
64
8
5126sec
CLK = 100 ns, 32-bit data bus, 5 clocks/bus cycle, 512B sector
Fall 2006
Lillevik 333f06-l22 33University of Portland School of Engineering
EE 333
Find the disk average latency?Twelve 5 cm platters, 7200 rpm, 120 GB
min7200
minsec
60
21
revTlatency
004167.000833.021
ms167.4
Fall 2006
Lillevik 333f06-l22 34University of Portland School of Engineering
EE 333
Example bus control signals
• Bus request, bus grant
• Read, write
• Memory space, I/O space
• Address valid, data valid
• Wait
• Interrupt request, interrupt acknowledge
Fall 2006
Lillevik 333f06-l22 35University of Portland School of Engineering
EE 333
Design the priority circuit?Req Pin Gnt Pout
0 0 0 0
0 1 0 1
1 0 0 0
1 1 1 0
Gnt = Req · Pin
Pout = Req · Pin