PCB Tracks Thermal Simulation, Analysis And Comparison To IPC-2152 For Electrical
Current Carrying Capacity
Radu Bunea1*
, Norocel-Dragos Codreanu1, Ciprian Ionescu
1, Paul Svasta
1, Alexandru Vasile
1
1 University “Politehnica” of Bucharest, Center for Technological Electronics and Interconnection Techniques
Abstract
Along with the introduction of the new IPC-2152
standard came several questions: What has changed? How
does this new standard affect the PCB design? Are the
simulation programs up to date with the standard? And the
most important: In practice, how close are we to the
standard? In this research, we developed a series of tests
to analyze the real thermal behavior of tracks when
charged with different constant currents. We used boards
with different thicknesses (FR4 0.8mm, FR4 1.6mm, FR2
1.6mm, CEM 1.6mm) and 35um copper thickness and
1mm track width. We also performed simulations of the
structures using Ansys. All the results were compared to
IPC-2152 standard.
Introduction
The PCB tracks, due to their low values of the
geometric parameters (track width W and thickness t), can
not accommodate high values of electric current. Because
of this fact, the designers must take into account, along
with all other aspects of high quality interconnection nets,
the current carrying capabilities of PCB tracks. The
evolution of electronics involves miniaturization of all
aspects of modules, from electronic components to track
widths. Also the number of pins and interconnections
leads to a need of decreasing the tracks dimensions in
order to accommodate everything on the small area of the
printed circuit board. But at the same time, even though
the voltages in an electronic module are decreased, the
power tends to be increased. The designers are confronted
with the problem of accommodating the necessary
currents while decreasing the tracks dimensions.
Standards always came in to help designers obtain
high quality and high reliability products. For many years
the Standard at the base of determining the current
carrying capabilities of PCB tracks was IPC-275 “Design
Standard for Rigid Printed Boards and Rigid Printed
Board Assemblies”. The standard contained diagrams
form which the designer could determine the maximum
current for a given set of parameters (track width,
thickness of copper foil). The IPC-2221 “Generic
Standard on Printed Board Design” comes with more
information. In paragraph 6.2 – “Conductive material
requirements”, it contains diagrams and notes with regard
to sizing internal and external PCB tracks.
These standards provided acceptable data for the time.
In September 2009 was introduced a new standard, IPC-
2152 “Standard for Determining Current Carrying
Capacity in Printed Board Design”. It is very complex, ast
it covers updated diagrams for internal and external
tracks, while taking into account board substrate, board
thickness, coupled thermal effects and many more.
We have the intention to do a comparison between
measured and simulated values of temperature for given
track parameters, and the data provided by IPC-2152.
Theoretical aspects of temperature estimations of PCB
tracks
The current flowing through a PCB track is limited by
two important factors:
- heating due to Joule-Lenz effect;
- maximum admissible voltage drop on unit length.
Usually, the evaluation of current carrying capabilities
of printed circuit tracks can be obtained by two well-
known methods: analysis – when the designer knows the
track width and needs to determine the maximum
admissible current and synthesis – when the maximum
current is known and the track width needs to be
determined. [1]
The determination can be done either by using the
specific standards or by using calculus formulas
developed according to studies and research in this field.
To begin the analysis based on calculus (considered by
specialists to be more exact), we must state from the
beginning that whenever a current flows through a
conducting material, it will lead to the heating of the
material, so there will be an over-temperature with regard
to the environment temperature. It is known that the
relation for power is RI2, where R is the resistance of the
track; the relation between temperature and current will
not be linear. Moreover, because of the different types of
heat transfer, for almost identical conditions can be
obtained different results. An example would be tracks
with equal cross-section areas but different widths. The
wider track will dissipate more heat by convection than
the narrower track.
For computing the current in a track, we start from the
formula:
I=k·∆Tm
·An,
where I is the current [A],
∆T=Ttrack-Tenvironment is the over-temperature[K or °C]
A – cross-section area
k, m, n constants
As stated before, there are many situations when the
cross-section area is not important, but the dimensions
that lead to it:
A=W·t
where W – track width and t track thickness.
It results that:
I= k·∆Tm
· Wn1
· tn2
The parameters n1 and n2 are different to emphasize
the different heat transfer. Specialists consider that the
separation of the cross-section area in its components and
using different coefficients lead to an increased accuracy
for computing the current through a PCB track.
The parameters can be determined and lead to the
formulas [1]:
I= 0.028·∆T0.46
· W0.76
· t0.54
for PCBs with copper foil thickness 35µm or 175µm,
and I= 0.034·∆T0.46
· W0.76
· t0.54
for PCBs with copper foil thickness 70µm. The first
formula can be also used for boards with copper foil
thickness of 18µm, but the accuracy is considered to be
lower.
All the formulas can be applied to external tracks. In
case of internal tracks, the formulas are no longer valid.
IPC provides the formula:
I= 0.015·∆T0.55· A0.74.
We provide two more formulas useful for other
estimations. The first one results from the above formulas
and is used for computing the over-temperature when the
track resistance, track width, current and environment
temperature are known:
W
Pk
W
IRkT
⋅=
⋅⋅≅∆
2
The second formula is used for computing the
resistance of a copper track over unit length [2].
]/[00267.06255.0
039.0 mmA
TR Ω
⋅+⋅=
Modeling for electric-thermal analysis
To obtain the thermal solution, i.e. the temperature
map, a coupled-field analysis is required. For this type of
analysis the interaction (coupling) between two or more
types of physical phenomena (fields) is considered. Such
analyses may involve direct or indirect coupling of fields.
When performing a directly coupled analysis, the
variables from both fields (e.g., heat generation rate and
temperatures) are computed simultaneously. This method
is necessary when the individual field responses of the
model are strongly dependent upon each other. Directly
coupled analyses are usually nonlinear since equilibrium
must be satisfied based on multiple criteria. The finite
element model requires more computational resources in
this case.
An indirectly coupled analysis involves the solution of
single-field models in a particular sequence. The results of
one analysis are used as loads for the following analysis.
This is also known as the sequential method of coupled
analysis. This method of analysis is applicable when there
is one-way interaction between fields [3].
In our case, for example, if we consider that the
resistivity of conductive materials is not temperature
dependent we could also apply this method. This method
is usually more efficient than the direct method, and it
does not require use of special coupled finite elements and
no multiple iterations are required. We have used
ANSYSTM
software which supports both type of
simulations.
Thermal
model
Electric
model
Heat Generation
Temperature
Temperature dependent resistivities
Source for thermal field, Temperature dependent boundary conditions
Figure 1: Coupled field electric-thermal simulation
Only for one simulation scenario we have developed a
different model using a different solving approach. This is
called “Multi-field solver”. In this modeling technique
there are created two overlapped solid models with
different finite element types which may have different
meshes. Each model and the associated parameters and
boundary conditions is saved as a “field”. There is the
need to define the interaction surface between the fields,
in our case we have a transfer which occurs from the
electrical domain to thermal domain as volumetric transfer
and the transfer from thermal field to electrical field is
done also inside the metallic conductive elements (change
in resistivity). The solver converges more rapidly for this
solver as in direct coupling, but there were no differences
found in results up to the third decimal position. For the
ease of model creation and the ease of parameters change
we have realized the models using the first presented
method, i.e. direct coupling using thermal-electric element
called SOLID69. This permits us to combine mapped
meshing where this was possible to be done with the free
meshing using pyramids (tetrahedral elements).
Modeling considerations
The modeling and simulation flow includes: building
the solid model, defining and assigning material
properties and proper finite elements, meshing the model,
applying the loads and boundary conditions, and finally
solving and postprocessing the results. A characteristic of
the model is that the full 3D structure was modeled. In all
cases parametric type model was built which permit us to
realize a series of runs without re-creating the solid model
[3].
A major problem in modeling planar structures, as the
copper traces, is the large number of elements that can be
generated by the very thin layers that model the
conductive, dielectric or resistive depositions used in
electronics. We have used a special modeling technique,
which implies the building of the solid model by extrusion
of areas along “z“ axis. In this way, hexahedral elements
and not tetrahedral are built, and the number of finite
elements can be dramatically reduced.
For our models presented here which include the large
FR4 substrate, there were up to 1300000 elements, with
294000 nodes, a large number absolutely sufficient for the
electrical field which requires a finer mesh than the
thermal field. The running time for one data was about 2
hours.
The boundary conditions involve the applying of heat
transfer coefficients on the exterior surfaces. For the
convection coefficients we have chosen to take some
results from literature and our previous papers. The board
was hold suspended and there was also convection from
the bottom side of the board. We have used temperature
dependent film coefficients. The values were derived from
values at room temperature with the assumption of
variation according to ~(∆T)0.25 relation [3].
Temperature dependent resistivities were used for
copper and for solder alloy too. The parameters that were
used in simulations are presented in table 1:
Table 1: Material properties used in analysis
Mat.
nr.
Material Thermal
constant
(W/mK)
Resistivity
(Ω·m)
at 25°C
1 Copper 390 1.72e-8
2 FR4 0.3 ∞ The issues for determining the heat convection
coefficients are presented in [4]. The source of heat is the
electrical power dissipated in the volume of electrical
components, copper traces, solder joints, resistors.
The loads are applied to the model as volume (body)
loads, this means a heat generation rate (HGEN) or other
named power density. The Joule heat generation has a
specific distribution for certain geometry and is difficult
to be predicted without using software simulation tools.
Experimental vehicle
We developed several boards to emphasize the heat
generated in one track, in order to compare it to the new
IPC-2152 standard, and also observe the thermal coupling
of parallel tracks at different distances from each other
(12.7mm such that no thermal coupling should be
observed, 6mm to observe thermal coupling). We also
studied the effect of heat on a 5 track data bus; the center
track was heated and we measured the electric parameters
of adjacent tracks. The boards are according to standard,
1.6mm thick substrate and 35µm copper; we chose 1mm
and 0.5mm wide tracks.
All the measurements were done using the boards
presented in figure 2. A high current DC voltage source
was used to supply the probes. The source was operating
in constant current mode (current limiting). A low
resistance shunt resistor made from parallel connected
wirewound resistors was also used for precise reading of
the current, the instrument front panel meters presenting a
low accuracy. The shunt is necessary also to permit the
operation of the power supply in a point with convenient
voltage level, slightly higher than 0 V. We have stopped
the measurements when the obtained temperature on the
board becomes unusual hot.
Fig. 2. Test board for investigations
Because the boards were not provided with coating
material there were problems detected in measurement of
bare copper tracks and solder joints. It is a well known
issue of the infrared measurement that the shiny surfaces
are difficult to measure. The observed phenomenon was
that the temperature of the tracks seams to be higher than
the rest of the board, although their emissivity is much
lower. This is due to reflected heat from ambient. A
solution possible to be tried in latter experiments will be
to do the measurements in a closed (dark) box. We have
decided to coat the boards with a mate dye, sprayed from
a tube. This has given a picture with uniform temperatures
at room temperature which means that the effects of
ambient reflections were eliminated. The very thin
painting is expected to not produce any change in the heat
transfer distribution. The thermovision camera was placed
at 30 cm above the board and the current was incremented
in 1 ampere step. The measurements were taken according
to IPC standards [4, 6] at three minutes after a current
supply change.
Results
A thermogram picture captured in the measurement of
the structure is presented in figure 3. Simulation result for
the same track is presented in figure 4.
Figure 3: Thermogram picture at 5 A
Figure 4: Simulation of the track at 5 A
Table 2: Temperature in degree Celsius of a 1mm (40 mil)
PCB copper track, 35µm thickness and reference
temperature 25°C
Current
(A)
Data source Real
tempera-
ture (°C)
∆T
(°C)
Measurement 40 15
Simulation 41 16
2.3
Ref [6] 37 12
Measurement 47.7 22.7
Simulation 48.6 23.6
3
Ref [6] 50 25
Measurement 64.6 39.4
Simulation 68 43
4
Ref [6] 71 47
Measurement 78.5 53.5
Simulation 80.8 55.8
5
Ref [6] 100 75
Measurement 131.4 106.
4
Simulation 141 116
6
Ref [6] N/A N/A
For the 35 µm copper thickness board, the results
are plotted against the current, in figure 5.
0
20
40
60
80
100
120
140
0 2.3 3 4 5 6
Current
Temperature rise above 25 deg. C
0
20
40
60
80
100
120
140
Measured
Simulation
IPC
Fig. 5: Temperature difference of 25 °C from IPC
standard compared to measurements on our test board
Conclusions
From the graph we see the very good agreement
between simulation and measurements results and a large
difference from the values presented by IPC. It is possible
to obtain such different results because the IPC standard is
intended to insure safe operation of PCB tracks, so the
current limitations are critical.
The current carrying capabilities of the copper traces
on PCB depend on the copper thickness and material type
and thickness (epoxy or phenolic) laminate. Thinner
substrates lead to higher temperature rises at the same
value of the current. For the 0.8mm thick FR4 substrate,
the temperatures were approximately 10°C above the
values obtained for the other substrates.
When measuring the temperature of parallel tracks in
order to observe the thermal coupling, we observed that
for the 1mm tracks placed at minimum 12.7mm, as
specified by the standard, the thermal coupling does not
have a major influence, and can be neglected. For tracks
placed at 6mm from each other, thermal coupling
becomes an issue, as the temperature increases by an
average of 15°C, again in accordance to the data given by
the IPC-2152 standard.
All previous conclusions can be applied to the 0.5mm
wide tracks, too.
Acknowledgments
This work is supported by the project
POSDRU/6/1.5/S/19, “Ph.D. Programs Supporting
Research”.
References
1. N. D. Codreanu, “Evaluation of current carrying
capabilities of PCB tracks”, Conex Club Revue,
9/2001.
2. ***, CRC Handbook of Chemistry and Physics, no. 64,
pp. F-119
3. P. Svasta, C. Ionescu, N.D. Codreanu, D. Bonfert,
“Investigation of Solder Joints by Thermographical
Analysis”, European Microelectronics and Packaging
Conference & Exhibition 2009 Proceedings
4. ****, IPC-2221, “Generic Standard on Printed Board
Design”, pp. 38.
5. R. Bunea, P. Svasta, N.D. Codreanu, I. Plotog, C.
Ionescu, “Thermal Investigations of Solder Joints used
in Power Applications”, SIITME 2009 Proceedings
6. ****, IPC-2152, “Standard for Determining Current-
Carrying Capacity In Printed Board Design”.