1
September 2008 2006 by Fabian Kung Wai Lee 1
10 - High Power Circuits
The information in this work has been obtained from sources believed to be reliable.The author does not guarantee the accuracy or completeness of any informationpresented herein, and shall not be responsible for any errors, omissions or damagesas a result of the use of this information.
September 2008 2006 by Fabian Kung Wai Lee 2
References
• [1]* G. Gonzalez, “Microwave transistor amplifiers - analysis and design”, 2nd Edition 1997, Prentice-Hall.
• [2] C. W. Sayre, “Complete wireless design”, 2001, McGraw-Hill.• [3]* S. C. Cripps, “RF power amplifier for wireless communications”,
1999, Artech House (2nd edition 2005 is available).• [4] G. D. Vendelin, A. M. Pavio, U. L. Rohde, “Microwave circuit design
- using linear and nonlinear techniques”, 1990, John-Wiley & Sons (2nd
edition 2005 is available).• [5] S. A. Maas, “Nonlinear microwave circuits”, 1988, Artech House.• [6] G. Massobrio, P. Antognetti, “Semiconductor device modeling with
SPICE”, 2nd edition, 1993, McGraw-Hill.• [7]* B. Razavi, “RF microelectronics”, 1998 Prentice Hall.• [8] Gilmore R., Besser L., “Practical RF circuit design for modern
wireless systems”, Vol. 1 & 2, 2003, Artech House. • [9] Gray P. R., Meyer R. G., “Analysis and design of analog integrated
circuits”, 3rd Edition, 1993, John-Wiley & Sons.
2
September 2008 2006 by Fabian Kung Wai Lee 3
1.0 Introduction
May 2009 2006 by Fabian Kung Wai Lee 4
Introduction
• Thus far we have considered various aspects of small-signal amplifier design based on small-signal S-parameters.
• The small-signal S-parameters are not useful for large-signal or high power circuit design such as power amplifier, mixers, frequency converters because the active devices (i.e. transistor/FET/diode) in these circuits usually operate in the nonlinear regions (recall that S-parameters are obtained by assuming the BJT or FET to be linear).
• In large-signal circuits the voltage and current variation will be large, for BJT this means the variation of the transistor terminal voltages will be greater than VT.
• Here we will concentrate on aspects of large-signal circuit design concerning power amplifiers and mixers .
• This short note will focus on discrete design, using BJT or FET, although the concepts can be extended to integrated circuit design.
3
Small-Signal Versus Large-Signal Operation
• Consider a 2-port system:
September 2008 2006 by Fabian Kung Wai Lee 5
ZL
Vs
Zs
Large-signal
Small-signal
( ) ( ) ( ) ( ) ...33
221 TOHtvatvatvatv iiio +++=
f
Usually non-sinusoidal waveform
vi(t)
vo(t)
f
Sinusoidal waveform
T
1/T
September 2008 2006 by Fabian Kung Wai Lee 6
Large-Signal Model of Active Components (1)
• Amplitude of the voltage and current in the transistor/FET of high power circuit is large so that small-signal linear model (such as hybrid pi model) cannot be employed.
• We must use large-signal model of the transistor, such as Eber-Molls model, the Gummel-Poon model, the VBIC model. For MOSFET, the BSIM model is popular.
• Design of high power circuits is more of an art. A lot of experience is needed.
• Usually nonlinear circuit simulator is used (such as SPICE based circuit simulator). Simulation algorithms such as nonlinear transient simulation for time-domain and harmonic-balance (HB) method for frequency-domain are usually employed, see [5] for a primer into the HB method.
• The active device model is very important, as it affects the accuracy of the simulation result.
4
September 2008 2006 by Fabian Kung Wai Lee 7
Large-Signal Model of Active Components (2)
• Most bipolar junction transistor and field effect transistor manufacturers provide SPICE based model of their device online, these are usually Gummel-Poon model or VBIC model for BJT and BSIM model for FET.
• These models usually come in the form of a netlist of a sub-circuits, which we can easily incorporate into our schematic using commercial circuit simulators.
• Here a design example of Class A power amplifier will be shown. This can also be applied to Class AB and Class B. Class C, E, F and others will not be discussed in depth due to lack of time.
• Please refer to Cripps [3] for more details.
September 2008 2006 by Fabian Kung Wai Lee 8
Large-Signal Model for Bipolar Junction Transistor (BJT)
CC
CE
rB
rC
rE
VBC
VBE
B
E
C
R
ECI
β
F
CCI
βLEI
LCI
ECCC II −
As an example see http://www.designers-guide.org/Modeling/ and eesof.tm.agilent.com/docs/iccap2002/ MDLGBOOK/7DEVICE_MODELING/3TRANSISTORS/2VBICfor more information on VBIC models.
• The most popular large-signal model for BJT is the SPICE Gummel-Poon(SGP) model (See Ref [6] for further details). A more recent alternative to the SGP model is the Vertical Bipolar Intercompany Model (VBIC) model which offers more accuracies as compared to SGP model.
• The SPICE Gummel-Poon model is based on the device physics of bipolar junction transistor. A simplified version is shown below.
C
B
E
5
September 2008 2006 by Fabian Kung Wai Lee 9
Relationship Between Large and Small-Signal Models
IC
VCE0IB1
IB2
IB3
IB4
IB5
D.C. load line
Small-signal model
Large-signal model
CC
CE
rB
rC
rE
VBC
VBE
B
E
C
R
ECI
β
F
CCI
βLEI
LCI
ECCC II −
September 2008 2006 by Fabian Kung Wai Lee 10
Large-Signal Model for MOS Field Effect Transistor (1)
• For MOSFET, the current industry standard is the BSIM (Berkeley Short-channel IGFET Model, IG stands for insulated-gate) model.
• BSIM is a physics-based threshold model of field-effect transistor. It is accurate, scalable, robust and predictive MOSFET SPICE model for circuit simulation and CMOS technology development. It is developed by the BSIM Research Group in the Department of Electrical Engineering and Computer Sciences (EECS) at the University of California, Berkeley.
• Optimized for modeling MOSFET in VLSI circuits, deep submicron technology (<0.25µm channel length).
• Various flavors (in the order of increased complexities and accurracy) e.g. BSIM1, BSIM2, BSIM3, BSIM4 and BSIMSOI.
• Official homepage: http://www-device.eecs.berkeley.edu/~bsim3/• See Massobrio & Antognetti [6] for more information on large signal
field effect transistor modeling.
6
September 2008 2006 by Fabian Kung Wai Lee 11
Large-Signal Model for MOS Field Effect Transistor (2)
• SPICE model for NMOS field-effect transistor.
CGD
ECCC II −
G
D
S
BCGS
CGB
CDB
CSB
RD
RS
iD
DDB
DSB
G
D
S
B
PN+
S G D
N+P+
B
SiO2
Silicon substrate(semi-insulating)
September 2008 2006 by Fabian Kung Wai Lee 12
Large-Signal Model for MOS Field Effect Transistor (3)
• In recent year there is an alternative to BSIM, based on physics-based surface potential or inversion charge based model.
• This model is called PSP MOSFET model and is jointly developed by Pennsylvania State University and Philips Semiconductor. PSP probably stands for (Pennsylvania or Philips Surface Potential).
• The PSP model includes an accurate description of all physical effects important for modern and future CMOS technologies.
• See http://www.semiconductors.philips.com/Philips_Models/mos_models/psp/ and http://pspmodel.ee.psu.edu/introductiontopsp.asp for more information.
7
September 2008 2006 by Fabian Kung Wai Lee 13
2.0 Basic Power Amplifier Design
September 2008 2006 by Fabian Kung Wai Lee 14
Amplifier Classification (1)
• According to signal level:
– Small-Signal Amplifier.
– Power Amplifier (Large-Signal Amplifier).
• According to dc biasing scheme:
– Class A.
– Class B.
– Class AB.
– Class C.
Almost all small-signal amplifiers are Class A
8
September 2008 2006 by Fabian Kung Wai Lee 15
Amplifier Classification (2)
VCE
Rc
Vcc
VCE
IC
Rc
Vcc
VCE
IC
Re
IC
IB=0
D.C. load line
Class A
Class AB
Class B
Class C
cCCEcc RIVV +=
( )ecCCEcc RRIVV ++=
D.C. LoadLine equation
or
September 2008 2006 by Fabian Kung Wai Lee 16
Important Parameters for Power Amplifier
• Maximum output power.• Efficiency (%).• Harmonic Distortion or Linearity.• Large-signal power gain (dB) / maximum power rating (W).• Operating voltage (V).
• Bandwidth (Hz).
• Isolation.
9
September 2008 2006 by Fabian Kung Wai Lee 17
Class-A Power Amplifier Schematic Template
Vcc
Rb1
Rb2Re
Cc1
Cc2
Ce
L1
L2
L3
Cd
OutputMatchingNetwork
InputMatchingNetwork RL
t
vb
t
vc
• Low efficiency (<50%).• High linearity.• Suitable for wideband system.• Suitable for low voltage system.
Note that most poweramplifiers are of CE orCC configurations.
September 2008 2006 by Fabian Kung Wai Lee 18
Class-B Power Amplifier Schematic Template (Push-Pull Configuration)
Vcc
Rb
Cc1 Cc2
L1
L2
Cd
OutputMatchingNetwork
InputMatchingNetwork
RL
Rb
D1
D2
t
v
b
t
ic
t
-ic• High efficiency (<78%).• High linearity.• Suitable for wideband system.• Need higher operating voltage.
The active device is onlyactive half the time, or 180o
10
September 2008 2006 by Fabian Kung Wai Lee 19
Class-C Power Amplifier Schematic Template
Vcc
Rb
Cc1
Cc2L1
L2
Cd
OutputMatchingNetwork/Band-passFilter
InputMatchingNetwork RL
Can also connect tonegative supply
t
v
b
t
ic
f
f
• High efficiency (<90%).• Poor linearity.• Suitable for narrowband system.• Suitable for low voltage system.
The active device is onlyactive less than half the time, or <180o
A Short Summary on Other Classes
• Class F Amplifier – The Class F amplifier is a special variant of Class B. This class of amplifier achieves even higher efficiency than Class B by reactively tune the harmonics to ensure no dissipation at harmonic frequencies and also to minimize power dissipation by keeping the active device voltage as low as possible when the current is high.
• Class E Amplifier (Switching Amplifier) – Class E amplifier is similar to the Class B or F in that the active device is normally driven with a 180o
conduction angle between saturation and cut-off. However it uses a switching principle so that any analog relationship between the input and output is lost.
• Class D Amplifier (Switching Amplifier) – Class D amplifier utilizes the switching principle by driving two active devices in tandem, to ensure that when one device is conducting the other device is forced off. It can be regarded as a push-pull Class F amplifier.
September 2008 2006 by Fabian Kung Wai Lee 20
11
Amplifier Large-Signal Response – 1 Tone Excitation (1)
• Consider an amplifier which can be characterized by a power series expansion of it’s input.
• If the input voltage is a sinusoidal signal (1 Tone), and considering up to 3rd order:
September 2008 2006 by Fabian Kung Wai Lee 21
( )tvo( )tvi
( ) ( ) ( ) ( ) ...33
221 TOHtvtvtvtv iiio +++= ααα
( ) ( )tAtvi ωcos=
( ) ( ) ( ) ( )tAtAtAtvo ωαωαωα 333
2221 coscoscos ++≅
( ) ( )[ ] ( ) ( )[ ][ ] ( ) ( ) ( )tAtAtAAA
ttAtAtA
ωαωαωαααωωαωαωα
3cos2coscos
3coscos32cos1cos3
3412
2212
343
12
221
334
1222
11
++++=
++++=
DC term Fundamental frequencyterm (Po)
1st harmonicterm (P1)
2nd harmonicterm (P2)
|Vi(f)|
f
|Vi(f)|
f
(2.2)
(2.1)( ) ( )( )12coscos 2
12 += θθ
( ) ( )( )θθθ 3coscos3cos 413 +=
Typically α3 is negative
Amplifier Large-Signal Response - 1 Tone Excitation (2)
• Now converting all powers into dB scale, assuming the system impedance is Zo (real) and we are referencing with respect to 1mW.
• Input power:
• Fundamental:
• Similarly we can show that:
• 1st harmonic:
• 2nd harmonic:
September 2008 2006 by Fabian Kung Wai Lee 22
22
1 APoZin = ( )001.0/log10 2_
2
oZA
dBminP =
( )[ ][ ] ( )1_
234
31_
2
2234
31_
log20log20
001.0/log102
ααα
αα
+≅++=
+=
dBmindBmin
ZA
dBmo
PAP
APo
Pin/1mW
( ) 30log102 222__1 −+= αoz
dBmindBm PP
( ) 60log203 32__2 −+= αozdBmindBm PP
Pin/dBm0
Slope=1
Slope=2
Slope=3
(2.3a)
(2.3b)
(2.3c)
(2.3d)
Active componentgoes into saturation
12
September 2008 2006 by Fabian Kung Wai Lee 23
Amplifier Large-Signal Response - 2 Tones Excitation (1)
( ) ( ) ( ) ( ) ...33
221 TOHtvtvtvtv iiio +++= ααα
( ) ( ) ( )tAtAtvi 2211 coscos ωω +=( ) ( )( ) ( )
( ) ( )( ) ( )( ) ( )tt
tt
tAAtAA
tAAAA
tAAAA
AAAA
AAAA
1243
1243
12
2143
2143
21
212122121221
221232
33234
3212
122132
33134
3111
2cos2cos:2
2cos2cos:2
coscos:
cos:
cos:
12231
223
22132
213
ωωωωωω
ωωωωωω
ωωαωωαωωωαααω
ωαααω
αα
αα
−++±
−++±
−++±++
++
Component of interestin implementing mixercircuit
Component of interestin implementing amplifier
Undesirable components,cause IntermodulationDistortion (IMD).
ff1-f2
2f1-f2 2f2-f1
f2f1 2f1f1+f2 2f2
3f1 3f2
2f1+f2 2f2+f1
|Vo|
IMD
ff1 f2
|Vi|
2 sinusoidal signalAt f1 and f2
(2.4)
( )tvo( )tvi
(2.5a)
(2.5b)
(2.5c)
(2.5d)
(2.5e)
Note that we interchagef and ω freely
September 2008 2006 by Fabian Kung Wai Lee 24
Amplifier Large-Signal Response - 2 Tones Excitation (2)
• Let A1 = A2 = A, and α3 << α1.
• Now converting all powers into dB scale, assuming the system impedance is Zo (real) and we are referencing with respect to 1mW.
• As in 1 Tone excitation case, we again notice that:
– Fundamental Component : The output power at f1 and f2 (Po_f1, Po_f2) increases with slope = 1 with respect to Pin in dBm (for Pin sufficiently small).
– Mixing Component : The output power at f1-f2 and f1+ f2 increases with slope = 2 with respect to Pin in dBm.
– Intermodulation Component : The output power at 2f1±f2 and 2f2±f1increases with slope = 3 with respect to Pin in dBm.
( ) ( )tAA 12
349
11 cos: ωααω + ( ) 2212
122234
912
11_ AAAP
oo ZZo αααω ≅+=
( ) ( )tt AA214
3214
321 2cos2cos:2
33
33 ωωωωωω αα −++±
( )tA 212
221 cos: ωωαωω −−
( )2334
32
12_ 21
APoZo αωω =−
( )2222
1_ 21
APoZo αωω =−
13
September 2008 2006 by Fabian Kung Wai Lee 25
Amplifier Large-Signal Response - 2 Tones Excitation (2)
• For amplifier design, Po_f1 , Po_ 2f1-f2 and Po_ 2f2-f1 (or related components) versus Pin are off interest. These can be plotted in dB scale are shown in the next slide.
• Po_ 2f1-f2 and Po_ 2f2-f1 are typically very close to the fundamental terms, thus are difficult to remove via band-pass filtering, and result in distorted output signals.
• For mixer design, Po_ f1±f2 versus Pin are off interest.
September 2008 2006 by Fabian Kung Wai Lee 26
Dynamic Range, 1dB Gain Compression and Third Order Intercept Point
• Plotting P2ω2-ω1, Pω1 versus Pin in log scale, a few parameters can be defined:
Pout
(dBm)
-20
-10
0
10
20
30
Noise Floor
-70 -60 -50 -40 -30 -20 -10 0 10
Pin
(dBm)20
-30
-40
-50
-60
Dynamic range (DR)
1dB compressionpoint (Pin_1dB)
Saturation
Burnout
Power gain Gp = Pout(dB) - Pin(dB)
1dB Gain compressionPoint
Spurious freedynamic range(DRf)
Third-order InterceptPoint (TOI)
1
1
1
3
Note : Spurious free dynamic range is important, for within this range the 3rd
order component power is less than the noise power, thusdistortion due to this component is negligible.
1ωP
122 ωω −P
PIP
Po,mds
P1dB
14
September 2008 2006 by Fabian Kung Wai Lee 27
Some Useful Relations for Large-Signal Parameters
• Please refer to Chapter 2 of [7] and Chapter 4 of [1] for derivation.
• All parameters are in dB scale.
dBPP dBIP 101 +≅IPPPP 23 1212 −=− ωωω
( )mdsoIPf PPDR ,32 −=
( )21211 23
22 ωωωωω −− −=− PPPP IP
Po/dBm
Pin/dBm
DRf
PIP
1ωP212 ωω −P
Po,mds
P1dB
≅10dB( )2111 222 ωωωω −−+= PPPPIP
IMDPPIP 21
1+=⇒ ω
211 2 ωωω −−= PPIMDwhere
(2.2a)
(2.2b)
(2.2c)
IMD
September 2008 2006 by Fabian Kung Wai Lee 28
Relationship between TOI, DR, DR f and Linearity (1)
• Levels of input and output TOI, DR and DRf indicate the linearity of the power amplifier.
• Highly linear power amplifier has small α2 and α3 compare to α1.
• Large DR implies small α2/ α1 ratio.
• Large DRf and TOI levels imply small α2/ α1 and α3/ α1 ratios.*
• In essence, a linear power amplifier
- Has larger DR and DRf.
- Has larger TOI levels.
*Here we ignore the effect ofhigher order terms (H.O.T.) andtime delay effect.
Undesirable, suppress these
( ) ( ) ( ) ( ) ...33
221 TOHtvtvtvtv iiio +++= ααα
15
Relationship between TOI, DR, DR f and Linearity (2)
• The 1dB Gain Compression point (P1dB) and the TOI point (PIP) are important as both determine the dynamic range DR and the spurious-free dynamic range DRf.
• The DRf is usually taken as the output power range where the large-signal amplifier is considered linear.
September 2008 2006 by Fabian Kung Wai Lee 29
Po/dBm
Pin/dBm
1ωP
212 ωω −P
Po,mds
Smaller DRf (larger |α3|)
Larger DRf (smaller |α3|)
Suppose we have 2amplifiers, with differentα3 values. Typically |α3|<<1, so it’s logarithm is negative. One with larger |α3| (blue) and theother with smaller |α3| (red).
( ) ( ) ( ) 60log203 343
10_001.0log102
43
21
210
33
12−+ →=± αα
ωω odBmin
PAZ ZPP
o
Measuring TOI Level
• Equation (2.2b) provides a convenient way to measure the third-order intercept point (IP) output power PIP.
• A typical setup is shown below:
September 2008 2006 by Fabian Kung Wai Lee 30
CW Generator 1at f1
CW Generator 2at f2
Power Combiner
SpectrumAnalyzer
CW = Continuous sine WaveOutput power level for bothgenerators must be similar
Amplifierunder test
Note that cable and connectorloss has to be accounted for.
f1 f2 2f2-f12f1-f2f
Power/dBm
IMD
IMDPPIP 21
1+= ω
Note that the IMDlevel will decreaseas CW generatoroutput is increased.
Po
Pin
PIP
1ωP212 ωω −P
16
September 2008 2006 by Fabian Kung Wai Lee 31
For Class A, AB and B Power Amplifier- Constant P 1dB Contour
Typical Powercontour for FET at a fixed frequency.The power contour is obtainedby varying the loadimpedance whileensuring conjugatematch at the input, thenthe input power is slowlyincreased until1dB gain compressionis observed. ZL with similar P1B are thenjoint together. ΓL Plane
At fixed frequency !
P1dB Contour
September 2008 2006 by Fabian Kung Wai Lee 32
For Class A, AB and B Power Amplifier - Large-Signal Reflection Coefficients
Typical Γs and ΓL as a function of frequency for an FET amplifier
Large-signal Γs
Large-signal ΓL
17
Large-Signal Parameters Measurement Setup
• A typical setup as shown below is used to obtain the large-signal data on the previous slides.
May 2009 2006 by Fabian Kung Wai Lee 33
PowerMeterA
PowerMeterB
PowerMeterC
A A
B B
Transistor AmplifierUnder Test
D.C.Supply
Load
SignalGenerator
Input tuningStub
Output tuningStub
For measuring theamount of mismatchat input
For measuringInput power
For measuringOutput power
VariableAttenuator
RF choke
Directionalcoupler
September 2008 2006 by Fabian Kung Wai Lee 34
Example 2.1 – Class-A Power Amplifier Design
• In this example we would like to design a single transistor Class-A power amplifier for a battery operated device at operating frequency fo = 868.0 MHz.
• The amplifier is driven by a source with 50Ω source impedance and with available power level of PA= -5.0 dBm or 0.32 mW. The output power into a 50Ω load is required to be 10.0 mW or 10 dBm.
• The transistor chosen for the job is BFG520 from Philips Semiconductors. This is an NPN wideband transistor, with fT = 9 GHz, IC(max) = 70 mA and maximum power dissipation of 300 mW. Using a transistor with fT > 5×fo allows us to reduce the dc collector current (IC), thereby reducing idle power dissipation.
• Here we rely on Agilent Technologies ADS 2003C software for the analysis.
18
September 2008 2006 by Fabian Kung Wai Lee 35
Example 2.1 - Class A Power Amplifier Design Cont…
• The basic amplifier core circuit.
• DC analysis is performed to find the transistor quiescent point.DC analysis results:Vcc = 3.3 VIc = 10.8 mAVCE = 2.14 VIdeal voltage swing = 2.14 V
3.30 V
811 mV
811 mV811 mV
811 mV
811 mV
811 mV
2.14 V
2.14 V 2.14 V
2.14 V
2.14 V
2.14 V2.14 V
2.14 V2.14 V
2.14 V
DCDC1
DC-11.6 mA
V_DCVCCVdc=3.3 V
811 uA
RRB2R=1 kOhm
PortP1Num=1
PortP2Num=2
10.7 mA
LL1
R=L=100.0 nH
0 ACCD1C=100.0 pF
0 ACCD2C=22.0 pF
74.9 uA10.7 mA
10.8 mA
-10.8 mA
pb_phl_BFG520_19921215Q174.9 uA L
LB
R=L=100.0 nH
885 uA
RRB1R=1.5 kOhm
11.6 mA
RRCR=100 Ohm
InputTerminal
OutputTerminal
mW0.38V3.3mA5.11 =⋅== ccccdc VIP
%3.26100 )( Efficiency lTheoretica3810 =×=η
%5.25100 (PAE)
Efficiency AddedPower lTheoretica
3832.010 =×= −
This is within the limitof ideal efficiency of 50% for Class-A PA
A compromise hasto be made in termsof voltage swingand IC, owing to thedc biasing circuit chosen.
September 2008 2006 by Fabian Kung Wai Lee 36
Example 2.1 – Class-A Power Amplifier Design Cont…
• Performing a load pull test to find the optimum load impedance ZL.
VSupply
Vin
NOTE: Depending on the v alue of the internal v ariable 'f req', the v ariable TLArray Index will assume the integerv alue 0 if f req = dc, 1 if f req = f undamental,2 if f req = 1st harmonic etc. This prov idesthe index to the one dimensional arrayTLArray [ ]. Thus ef f ectiv ely the HarmonicBalance solv er will 'see' dif f erent load impedance/ref lection coef f icient at dif f erentf requencies. Similar action is perf ormed f or Source_Impedance Variable Equation.
This def ines the load andsource impedance at thef undamental and harnomics.Here we assume the circuitparasitics will short out thehigher harmonics
User can change theparameters in the Variable Equation"Stimulus_User_Setting"
VL
VARLoad_Ref lection_Coef f ient
TLoad=TLArray [TLArray Index]TLArray =list(r(ZL_dc),TL,r(ZL_2),r(ZL_3),r(ZL_4),r(ZL_5),r(ZL_6),r(ZL_7))TLArray Index=int(min(abs(f req)/RFf req + 1.5, length(TLArray )))
EqnVar
V_DCVccVdc=3.3 V
ParamSweepSweep1
Step=5Stop=360Start=0SimInstanceName[6]=SimInstanceName[5]=SimInstanceName[4]=SimInstanceName[3]=SimInstanceName[2]=SimInstanceName[1]="HB1"SweepVar="TLphase"
PARAMETER SWEEPVARStimulus_User_Settings
Ps_dBm=-5Max_Rho=0.9Max_Harmonic=5RFf req=868 MHzZo=50
EqnVar
HarmonicBalanceHB1
Step=0.1Stop=Max_RhoStart=0SweepVar="TLmag"Order[1]=Max_HarmonicFreq[1]=RFf req
HARMONIC BALANCE
VARSource_Impedance
Zs=ZsArray [ZsArray Index]ZsArray =list(Zs_dc,Zs_1,Zs_2,Zs_3,Zs_4,Zs_5,Zs_6,Zs_7)ZsArray Index=int(min(abs(f req)/RFf req + 1.5, length(TLArray )))
EqnVar
VARLoad_Ref lection_Coef f icient_Sweep
TL=TLcenter+TLmag*exp(j*(TLphase/180)*pi)TLcenter=0r(x)=(x-Zo)/(x+Zo)TLphase=0TLmag=0
EqnVar
VARLoad_Source_Impedance_at_Harmonics
Zs_7=1+j*0Zs_6=1+j*0Zs_5=1+j*0Zs_4=1+j*0Zs_3=1+j*0Zs_2=1+j*0Zs_1=ZoZs_dc=ZoZL_7=1+j*0ZL_6=1+j*0ZL_5=1+j*0ZL_4=1+j*0ZL_3=1+j*0ZL_2=1+j*0ZL_dc=1000000
EqnVar
P_1TonePORT1
Freq=RFf reqP=polar(dbmtow(Ps_dBm),0)Z=Zs OhmNum=1
PA_coreX1
I_ProbeISupply
I_ProbeISource
I_ProbeILoad S1P_Eqn
S1P1
Z[1]=ZoS[1,1]=TLoad
CCc1C=100.0 pF
CCc2C=100.0 pF
NonlinearHB analysisis applied. Thisis a single-toneanalysis since thereis only one source.Up to 5th harmonicis considered.(Max_Harmonic = 5)
one tonesource(at 868 MHz)PA = Ps_dBmor -5 dBm inthis instance.
Amplifier corecircuit (see previousslide)
Expressions to set theload and source impedance at theharmonics.
Expression to sweep ΓL acrossthe Smith Chartin polar form.
Expressions to generate the correctΓL and Zs at each frequency component during HB analysis
Source availablepower = -5dBminto 50Ω load.
19
September 2008 2006 by Fabian Kung Wai Lee 37
Example 2.1 – Class-A Power Amplifier Design Cont…
• Method of sweeping ΓL to cover the Smith Chart.
• Sweeping theangle of ΓL from 0 to 360o,at 5o interval andthe magnitude |ΓL|from 0 to 0.9 at 0.1step. • Of course wecould refine thisby using smaller steps at the expenseof greater computationalresources needed.
θ|Γ|
Re Γ
Im Γ
September 2008 2006 by Fabian Kung Wai Lee 38
Example 2.1 – Class-A Power Amplifier Design Cont…
• The expressions on the ADS’s Data Display required to generate a contour plot of load power PL at fundamental frequency on the Smith Chart.
Eqn PL1_watt = re(0.5*VL[::,::,1]*conj(ILoad.i[::,::,1]))
Eqn PL1_dBm = 10*log10(PL1_watt) + 30
Eqn PL1_dBm_max = max(max(PL1_dBm))
Eqn PL_step = 0.2
Eqn NumLine = 6
Eqn contour_PL1_dBm = contour(PL1_dBm, PL1_dBm_max-0.01-[0::NumLine-1]*PL_step)
Eqn contour_PL1_dBm_polar = indep(contour_PL1_dBm)*exp(i*(contour_PL1_dBm/180)*pi)
PL1_dBm_max9.151
Create a contour plot for load power. This actually produces a 3D array. The indexes to thearray corresponds to 1) the Power 2) TLmag and 3) TLphase. This can be plotted on X-Y plotwhere TLmag forms the x-axis, and TLphase forms the y-axis.
Change the contour plot into polar form. The function indep( ) returns the independent variableassociated with the datatype contour_PL1_dBm. There are two independent variables associatedwith contour_PL_dBm, since we varies the magnitude and phase of TL. The innermost independentvariable is TLmag, since it is embedded in the Harmonic Balance simulation control. So this isreturned by the indep( ) function. Datatype contour_PL1_dBm itself is simply the phase in degrees. So this can be easily converted in polar form.
Compute Load power and Creating Load Power ContourVL[::,::,1] extracts the fundamental component of the load voltage, for all (as indicated by the symbol '::') TLmag and TLphase. Same can be said for ILoad.i[::,::,1]
Eqn Distortion_step = 0.05
Eqn N_step = 3
Maximum loadpower (9.151 dBm) at fundamentalfrequency, with inputpower -5 dBm into 50Ω load, inputnot match condition.
freqTLphase=0.000, TLmag=0.000
0.0000 Hz868.0MHz1.736GHz2.604GHz3.472GHz4.340GHz
TLphase=0.000, TLmag=0.1000.0000 Hz868.0MHz1.736GHz2.604GHz3.472GHz4.340GHz
TLphase=0.000, TLmag=0.2000.0000 Hz868.0MHz1.736GHz2.604GHz3.472GHz4.340GHz
Mix
012345
012345
012345
Note: Plotting out the variable ‘Mix’ in the Data Display shows the index to the frequency components
20
September 2008 2006 by Fabian Kung Wai Lee 39
Example 2.1 – Class-A Power Amplifier Design Cont…
• The expressions on the ADS’s Data Display required to generate a contour plot of total load power PL at the harmonics and Efficiency on the Smith Chart.
Eqn PL2_watt=re(0.5*VL[::,::,2]*conj(ILoad.i[::,::,2]))
Eqn PL3_watt=re(0.5*VL[::,::,3]*conj(ILoad.i[::,::,3]))
Eqn PL4_watt=re(0.5*VL[::,::,4]*conj(ILoad.i[::,::,4]))
Eqn PL5_watt=re(0.5*VL[::,::,5]*conj(ILoad.i[::,::,5]))
Eqn PL_harmonic_watt = PL2_watt + PL3_watt + PL4_watt + PL5_watt
Eqn Distortion_Ratio = PL_harmonic_watt/PL1_watt
Eqn Distortion_max = max(max(Distortion_Ratio))
Distortion_max0.212
Eqn contour_DR=contour(Distortion_Ratio, Distortion_max-0.05-[0::NumLine-1]*Distortion_step)
Eqn contour_DR_polar=indep(contour_DR)*exp(i*(contour_DR/180)*pi)
Eqn Pdc_watt = re(VSupply[::,::,0]*ISupply.i[::,::,0])
Eqn N = ((PL1_watt-Pin_watt)/Pdc_watt)*100
Eqn Nmax = max(max(N))
Eqn contour_N=contour(N,Nmax - 0.1-[0::NumLine-1]*N_step)
Eqn contour_N_polar = indep(contour_N)*exp(j*(contour_N/180)*pi)
Compute Harmonic Power and Creating the Harmonic Distortion Contour
Nmax20.259
Computing the Efficiency and Creating the Efficiency Contour
Eqn Pin_watt = 0.5*re(Vin[::,::,1]*ISource.i[::,::,1])
MaximumTotal Harmonic Distortion(ratio of 0.212)
MaximumEfficiency(20.259 %)
September 2008 2006 by Fabian Kung Wai Lee 40
Example 2.1 – Class-A Power Amplifier Design Cont…
• Superimposing the PL(at 868 MHz), Efficiency η and Total Harmonic Distortion Ratio contours on the Smith Chart.
m1TLmag=m1=0.357 / 45.000level=9.140921, number=1impedance = Z0 * (1.402 + j0.811)
0.357
m2TLmag=m2=0.440 / 110.000level=0.012150, number=2impedance = Z0 * (0.540 + j0.553)
0.440
TLmag (0.073 to 0.687)
con
tou
r_P
L1
_d
Bm
_po
lar m1
TLmag (0.375 to 0.900)
con
tou
r_D
R_p
ola
r
m2
TLmag (0.053 to 0.900)
con
tou
r_N
_p
ola
r
Point of max PL (9.14 dBm), ZLopt
Point of max Efficiency (20.26%)
• PL(868 MHz) step = 0.2 dBm• Efficiency (N) step = 3%• Harmonic Distortion
Ratio step = 0.05
From the plot:ZLopt = 70.1+j40.55at 868 MHz, and closeto 0 at harmonics.
We observe thatZL needed for highestoutput power and highestefficiency are similar, thuswe choose ZLopt to be givenby the PL(868MHz) contour
21
September 2008 2006 by Fabian Kung Wai Lee 41
Example 2.1 – Class-A Power Amplifier Design Cont…
• The output transformation network design, approximated to standard L and C values.
VLVin
RRLR=50 Ohm
I_ProbeI_in
ACAC1
Step=5.0 MHzStop=4.0 GHzStart=0.1 GHz
AC
CC1BC=0.47 pF
LL1
R=L=8.2 nH
CC2C=8.2 pF
CC1AC=4.7 pF
V_ACSRC1
Freq=freqVac=polar(1,0) V
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.80.0 4.0
-100
-80
-60
-40
-20
0
20
40
60
80
100
120
140
-120
160
freq, GHz
real
(Zin
)im
ag(Z
in)
A low-pass pi network,to suppress the harmonics.
Eqn Zin = Vin/I_in.i
Real part of Zin
Imaginary part of Zin
Narrowbandtransformation
September 2008 2006 by Fabian Kung Wai Lee 42
Example 2.1 – Class-A Power Amplifier Design Cont…
• After connecting the load network, we ‘measure’ the large-signal input impedance Zin at the fo of 868 MHz.
• We then design a low-pass impedance transformation network that transforms 50Ω Zs into Zin
* at fo = 868 MHz.
This defines the load andsource impedance at thefundamental and harnomics.Here we assume the circuitparasitics will short out thehigher harmonics
Vin VL
User can change theparameters in the Variable Equation"Stimulus_User_Setting"
VSupply
VARSource_Impedance
Zs=ZsArray[ZsArrayIndex]ZsArray=list(Zs_dc,Zs_1,Zs_2,Zs_3,Zs_4,Zs_5,Zs_6,Zs_7)ZsArrayIndex=int(min(abs(freq)/RFfreq + 1.5, length(TLArray)))
EqnVar
VARLoad_Source_Impedance_at_Harmonics
Zs_7=1+j*0Zs_6=1+j*0Zs_5=1+j*0Zs_4=1+j*0Zs_3=1+j*0Zs_2=1+j*0Zs_1=ZoZs_dc=ZoZL_7=1+j*0ZL_6=1+j*0ZL_5=1+j*0ZL_4=1+j*0ZL_3=1+j*0ZL_2=1+j*0ZL_dc=1000000
EqnVar
VARLoad_Reflection_Coefficient_Sweep
TL=TLcenter+TLmag*exp(j*(TLphase/180)*pi)TLcenter=0r(x)=(x-Zo)/(x+Zo)TLphase=0TLmag=0
EqnVar
VARLoad_Reflection_Coeffient
TLoad=TLArray[TLArrayIndex]TLArray=list(r(ZL_dc),TL,r(ZL_2),r(ZL_3),r(ZL_4),r(ZL_5),r(ZL_6),r(ZL_7))TLArrayIndex=int(min(abs(freq)/RFfreq + 1.5, length(TLArray)))
EqnVar
I_ProbeISource
CC1BC=0.47 pF
CC1AC=4.7 pF
LL1
R=L=8.2 nH
CC2C=8.2 pF
RRLR=50 Ohm
VARStimulus_User_Settings
Ps_dBm=-5Max_Rho=0.9Max_Harmonic=5RFfreq=868 MHzZo=50
EqnVar
HarmonicBalanceHB1
Step=Stop=Start=SweepVar=Order[1]=Max_HarmonicFreq[1]=RFfreq
HARMONIC BALANCE
V_DCVccVdc=3.3 V
P_1TonePORT1
Freq=RFfreqP=polar(dbmtow(Ps_dBm),0)Z=Zs OhmNum=1
PA_coreX1
I_ProbeISupply
CCc1C=100.0 pF
CCc2C=100.0 pF
Eqn Zin = Vin/ISource.i
freq0.0000 Hz868.0MHz1.736GHz2.604GHz3.472GHz4.340GHz
Zin<invalid>
10.838 - j12.335-1.000 + j0.000-1.000 + j0.000-1.000 + j0.000-1.000 + j0.000
Eqn Zin = Vin/ISource.i
freq0.0000 Hz868.0MHz1.736GHz2.604GHz3.472GHz4.340GHz
Zin<invalid>
10.838 - j12.335-1.000 + j0.000-1.000 + j0.000-1.000 + j0.000-1.000 + j0.000
The results:
Zin
Large-signalZin at fo = 868 MHz
22
September 2008 2006 by Fabian Kung Wai Lee 43
Example 2.1 – Class-A Power Amplifier Design Cont…
• Finally, upon adding the input and output transformation networks.
• Note that we are performing conjugate matching at the input.
This defines the load andsource impedance at thefundamental and harnomics.Here we assume the circuitparasitics will short out thehigher harmonics
User can change theparameters in the Variable Equation"Stimulus_User_Setting"
Vin
VL
VSupply
VARLoad_Reflection_Coeffient
TLoad=TLArray[TLArrayIndex]TLArray=list(r(ZL_dc),TL,r(ZL_2),r(ZL_3),r(ZL_4),r(ZL_5),r(ZL_6),r(ZL_7))TLArrayIndex=int(min(abs(freq)/RFfreq + 1.5, length(TLArray)))
EqnVar
VARLoad_Reflection_Coefficient_Sweep
TL=TLcenter+TLmag*exp(j*(TLphase/180)*pi)TLcenter=0r(x)=(x-Zo)/(x+Zo)TLphase=0TLmag=0
EqnVar
VARLoad_Source_Impedance_at_Harmonics
Zs_7=1+j*0Zs_6=1+j*0Zs_5=1+j*0Zs_4=1+j*0Zs_3=1+j*0Zs_2=1+j*0Zs_1=ZoZs_dc=ZoZL_7=1+j*0ZL_6=1+j*0ZL_5=1+j*0ZL_4=1+j*0ZL_3=1+j*0ZL_2=1+j*0ZL_dc=1000000
EqnVar
VARSource_Impedance
Zs=ZsArray[ZsArrayIndex]ZsArray=list(Zs_dc,Zs_1,Zs_2,Zs_3,Zs_4,Zs_5,Zs_6,Zs_7)ZsArrayIndex=int(min(abs(freq)/RFfreq + 1.5, length(TLArray)))
EqnVar
VARStimulus_User_Settings
Ps_dBm=-5Max_Rho=0.9Max_Harmonic=5RFfreq=868 MHzZo=50
EqnVar
HarmonicBalanceHB1
Step=Stop=Start=SweepVar=Order[1]=Max_HarmonicFreq[1]=RFfreq
HARMONIC BALANCE
CC3C=5.6 pF
CC4BC=0.68 pF
CC4AC=10.0 pF
LL2
R=L=4.7 nH
P_1TonePORT1
Freq=RFfreqP=polar(dbmtow(Ps_dBm),0)Z=Zs OhmNum=1
I_ProbeISource
CC1BC=0.47 pF
CC1AC=4.7 pF
LL1
R=L=8.2 nH
CC2C=8.2 pF
RRLR=50 Ohm
V_DCVccVdc=3.3 V
PA_coreX1
I_ProbeISupply
CCc1C=100.0 pF
CCc2C=100.0 pF
Inputtransformationnetwork
Outputtransformationnetwork
Zin*
Zin
ZLopt
September 2008 2006 by Fabian Kung Wai Lee 44
Example 2.1 – Class-A Power Amplifier Design Cont…
• The results at PA = -5 dBm:
Eqn Zin = Vin/ISource.i
freq0.0000 Hz868.0MHz1.736GHz2.604GHz3.472GHz4.340GHz
Zin<invalid>
36.417 + j17.783-1.000 + j0.000
-1.000 - j7.016E-17-1.000 + j0.000-1.000 + j0.000
Eqn PL = (mag(VL)*mag(VL))/(2*50)
freq0.0000 Hz868.0MHz1.736GHz2.604GHz3.472GHz4.340GHz
PL0.0000.013
3.031E-65.878E-91.475E-9
2.244E-100.5 1.0 1.5 2.00.0 2.5
-1.0
-0.5
0.0
0.5
1.0
-1.5
1.5
time, nsec
Vin
t, V
VLt
, V
Eqn VLt = ts(VL) Eqn Vint = ts(Vin)
Time-domain waveform at inputand load resistor
23
September 2008 2006 by Fabian Kung Wai Lee 45
Example 2.1 – Class-A Power Amplifier Design Cont…
• Now we sweep the source PA to perform a gain compression test:
This defines the load andsource impedance at thefundamental and harnomics.Here we assume the circuitparasitics will short out thehigher harmonics
User can change theparameters in the Variable Equation"Stimulus_User_Setting"
Vin
VL
VSupply
HarmonicBalanceHB1
Step=1Stop=5Start=-20SweepVar="Ps_dBm"Order[1]=Max_HarmonicFreq[1]=RFfreq
HARMONIC BALANCEVARStimulus_User_Sett ings
Ps_dBm=-5Max_Rho=0.9Max_Harmonic=5RFfreq=868 MHzZo=50
EqnVar
VARLoad_Reflection_Coeffient
TLoad=TLArray[TLArrayIndex]TLArray=list(r(ZL_dc),TL,r(ZL_2),r(ZL_3),r(ZL_4),r(ZL_5),r(ZL_6),r(ZL_7))TLArrayIndex=int(min(abs(freq)/RFfreq + 1.5, length(TLArray)))
EqnVar
VARLoad_Reflection_Coefficient_Sweep
TL=TLcenter+TLmag*exp(j*(TLphase/180)*pi)TLcenter=0r(x)=(x-Zo)/(x+Zo)TLphase=0TLmag=0
EqnVar
VARLoad_Source_Impedance_at_Harmonics
Zs_7=1+j*0Zs_6=1+j*0Zs_5=1+j*0Zs_4=1+j*0Zs_3=1+j*0Zs_2=1+j*0Zs_1=ZoZs_dc=ZoZL_7=1+j*0ZL_6=1+j*0ZL_5=1+j*0ZL_4=1+j*0ZL_3=1+j*0ZL_2=1+j*0ZL_dc=1000000
EqnVar
VARSource_Impedance
Zs=ZsArray[ZsArrayIndex]ZsArray=list(Zs_dc,Zs_1,Zs_2,Zs_3,Zs_4,Zs_5,Zs_6,Zs_7)ZsArrayIndex=int(min(abs(freq)/RFfreq + 1.5, length(TLArray)))
EqnVar
CC3C=5.6 pF
CC4BC=0.68 pF
CC4AC=10.0 pF
LL2
R=L=4.7 nH
P_1TonePORT1
Freq=RFfreqP=polar(dbmtow(Ps_dBm),0)Z=Zs OhmNum=1
I_ProbeISource
CC1BC=0.47 pF
CC1AC=4.7 pF
LL1
R=L=8.2 nH
CC2C=8.2 pF
RRLR=50 Ohm
V_DCVccVdc=3.3 V
PA_coreX1
I_ProbeISupply
CCc1C=100.0 pF
CCc2C=100.0 pF
We sweep thevariable ‘Ps_dBm’
September 2008 2006 by Fabian Kung Wai Lee 46
Example 2.1 – Class-A Power Amplifier Design Cont…
• 1dB Gain Compression test result.
m1Ps_dBm=m1=10.738
-6.000
-15 -10 -5 0-20 5
0
5
10
-5
15
Ps_dBm
PL_
dBm
m1
Slope of 1Thus, P1dB ≅ 10.74 dBmmeeting our specs.
24
September 2008 2006 by Fabian Kung Wai Lee 47
Example 2.1 – Class-A Power Amplifier Design Cont…
• Snapshot of the completed hardware.
September 2008 2006 by Fabian Kung Wai Lee 48
Example 2.1 – Class-A Power Amplifier Design Cont…
• Measurement at 868 MHz.
Freq. = 868 MHz+10.5 dBm
1st harmonic-11.0 dBm
Output of the amplifier when driven with a frequency synthesizer with Pin = -3.0 dBm into 50Ω load, fin = 868.0 MHz. Averaging = 10
25
September 2008 2006 by Fabian Kung Wai Lee 49
Example 2.1 – Class-A Power Amplifier Design Cont…
• P1dB gain compression measurement.
+16 dB
+15 dB
1 dB Gain Compression point
September 2008 2006 by Fabian Kung Wai Lee 50
Typical Parameters for Medium Power Amplifiers
• Operating frequency range: 0.1-10GHz.
• Output power at 1dB gain compression: +15Bm (31.6mW) to +30dBm (1000mW).
• Power gain at 1dB gain compression: 12 - 20 dB.
• Furthermore VCE and IC will be specified for BJT and VDS and ID will be specified for FET. For MMIC, the supply voltage and current will be specified.
• Noise Figure: 3.0dB or greater.
• TOI input level: +10 to +15 dBm.
• TOI output level: +20 to +40 dBm.
• For MMIC, most of the time the source and load impedance is internally matched to 50Ω.
26
September 2008 2006 by Fabian Kung Wai Lee 51
3.0 Basic Mixer Design
September 2008 2006 by Fabian Kung Wai Lee 52
Mixers
• A mixer uses the nonlinearity of a diode, transistor or FET under large-signal operation to generate an output spectrum consisting of the sum and difference frequencies of two input signals.
• A mixer used for RF receiver usually consists of three ports, the RF, LO (Local Oscillator) and IF (Intermediate Frequency) ports.
• There are several types of mixers, the simplest being the Single-Ended Mixer. The single ended mixers are often used as components for more sophisticated mixers.
• The Balanced Mixer combines two or more identical single-ended mixer to give better input SWR or matching and higher isolation between the RF/LO ports.
RF
LO IF
Symbol andterminals ofa mixer
27
September 2008 2006 by Fabian Kung Wai Lee 53
Block Diagram of Single-Ended Mixer
Power supplyBiasing
InputMatchingNetwork
NonlinearElement
Low-pass FilterAndOutputMatchingNetwork
InputMatchingNetwork
PowerCombiner
RF
LO
IF
RF
LO IF
RFLOIF
LORFIF
fff
fff
−=−= or
PRF
PLO
PIF
RF
IF
PPAvailable
CG =Conversion Gain:
September 2008 2006 by Fabian Kung Wai Lee 54
Example of Single-Ended Diode Mixer
RFin1
Vcc
Rbias
Cc1Cc2
L2
L1
Cd
RL
Input matching network
Lumped version of Wilkinson Power Divider/Combiner (narrow band)
RFin2
Low-pass filter
RFC
RFC
28
Simplified Analysis of the Diode Mixer
• Under DC condition the diode voltage and current are VD and ID.
• Imagine the RF chokes (RFC) present a high impedance to the AC voltage and current.
• The input AC voltage vd will modulate the diode junction voltage, which results in variation of the diode current id.
• The current flowing across the RFC is assumed constant, thus the change in current id is forced through the output of the mixer.
• Due to the nonlinear nature of the PN junction, id contains the sum and difference components.
December 2010 2006 by Fabian Kung Wai Lee 55
L2
L1
Cd
RFC
RFC
VCC
VD + vd ID High impedanceHigh
impedance idID + id
−≅+
+
1TnVdvDV
eIiI sdD
−= 1TnV
DV
eII sD
21 vvvd +=
( ) ( )[ ]L++≅
−=
2
211
T
d
T
dTnVDV
TnVdv
TnVDV
nVv
nVv
ssd eIeeIi
( ) ( )[ ]L++≅ ++ 2
21 2121
TT
TnVDV
nVvv
nVvv
sd eIi
Causes mixing effectAffectsconversiongain
DC:
DC with RF and LO:
( )tAv 111 cosω= ( )tAv 222 cosω=
Mixer Types (1)
• Following the definition by [4], mixer can be classified depending on the signaling type on the RF terminals.
• By signaling type we imply whether the RF input signal is single-ended or differential (double-ended).
• Sometimes two or more mixers can be combined to form a Balancedarchitecture.
May 2009 2006 by Fabian Kung Wai Lee 56
Single-Ended Mixer
RF
LO IF
Double-Ended Mixer
RF
LO IF
+ -
Differential RF input
Note:The LO input can besingle-ended ordifferential.
29
Mixer Types (2)
• Balanced type mixers.
May 2009 2006 by Fabian Kung Wai Lee 57
RF
IF
Single-Ended Balanced Mixer(Single-balanced)
LO
PowerSplitter
PowerSplitter
PowerCombiner
Double-Ended Balanced Mixer(Double-balanced)
+
-RF
IF
LO
PowerSplitterwithbalun
PowerSplitter
PowerCombinerwith balun
May 2009 2006 by Fabian Kung Wai Lee 58
Conversion Gain and Leakage (1)
• If a diode is used for the nonlinear element, there is no gain, i.e. the conversion gain GC (dB) is negative. Sometimes this negative value is called conversion loss instead.
• If BJT or FET is used as the nonlinear element, there is usually a positive conversion gain GC (dB).
• A major issue with single-ended mixer is the leakage between the two RF inputs. This is due to the fact that the power combiner used is usually narrowband, and the frequency difference between RF and LO input is usually substantial.
RF
LO IF
Power Leakage
Power LeakageRF
LO IF
Power Leakage Power Leakage
Electrical energyinto LO terminalleaks out at RF andIF terminals.
Electrical energyinto RF terminalleaks out at LO andIF terminals.
30
Conversion Gain and Leakage (2)
• The simplicity and performance of single-ended mixer make it very attractive in terms of cost, productivity and conversion loss. However this type of mixer usually exhibits higher leakage (e.g. lower isolation between ports), spurious products and low operating bandwidth.
• Leakage due to LO can be reduced by using differential RF input and differential IF output.
• Balanced mixers have better isolation between ports (lower leakage), lower spurious products. But this comes in terms of higher complexity, and usually larger conversion loss.
• A single-ended signal can be converted into differential signal and vice versa by using a Balun (balanced-unbalanced converter).
• Examples of balun are center-tapped transformer, and various type of directional couplers (see notes on RF Passive Circuits Design).
May 2009 2006 by Fabian Kung Wai Lee 59
September 2008 2006 by Fabian Kung Wai Lee 60
Example 3.1 – 430 MHz Single-Ended Discrete BJT Mixer Design
NOTE:By convention for a successful analysis of mixer:1. Set the RF input to PORT 1, IF output to PORT 2 and LO input to PORT 3 (by editing the NUM property).2. Set the signal with largest amplitude to Freq[1] to ensure convergence of the HB method.
Input matching network
Output matching network
VARVAR1
RF_pow=-20freq_RF=430 Mhzfreq_LO=410 Mhz
EqnVar
CCc2C=15.0 pF
CCdecC=1000.0 pF
OptionsOptions1
MaxWarnings=10GiveAllWarnings=yesI_RelTol=1e-6V_RelTol=1e-6TopologyCheck=yesTemp=23.85
OPTIONS
HarmonicBalanceHB1
Other=OutVar="RF_pow"NoiseOutputPort=2NoiseInputPort=1FreqForNoise=freq_RF-freq_LONLNoiseMode=yesOrder[2]=5Order[1]=7Freq[2]=freq_RFFreq[1]=freq_LOMaxOrder=7
HARMONIC BALANCE
DCDC1
DC
RRbR=47 kOhm
RR2R=1000 Ohm
P_1TonePrf
Freq=freq_RFP=polar(dbmtow(RF_pow),0)Z=50 OhmNum=1
TermTerm3
Z=50 OhmNum=2
P_1TonePLO
Freq=freq_LOP=polar(dbmtow(0),0)Z=50 OhmNum=3
LLm1
R=L=68.0 nH
I_ProbeISource
CCm3C=270.5 pF
LLm3
R=L=800.0 nH
CCm2C=97.0 pF
I_ProbeILoadC
Cc3C=330.0 pF
CCm1C=0.33 pF
CCc1C=330.0 pF
LLb
R=L=220.0 nH
CCbyp1C=1000.0 pF
V_DCSRC1Vdc=3.0 V
RReR=330 Ohm
pb_phl_BFR92A_19921214Q1
For more information, please refer to the document entitled:“Designing A Single-Ended UHF BJT Mixer Using the ADS Software” Sep 2001 by F.Kung.http://pesona.mmu.edu.my/~wlkung/ADS/ads.htm
Adding a series LC network (from E to Gnd)tuned to IF frequency will boostthe conversion gain, at the expense of larger LO leakage through RF input.
RF = 430 MHzLO = 410 MHzIF = 20 MHz
IF
LO
RF
31
September 2008 2006 by Fabian Kung Wai Lee 61
Example 3.1 Cont...
RF source: frequency = 430.0MHz, Power = -20dBm into 50Ω load.LO source: frequency ≈ 410 MHz , Power = -5.48dBm into 50Ω load.Power supply for mixer: 3.0V.
Local Oscillator Input
RF InputIF Output
To 2.7-3.3V D.C. Source
1.57mm thick FR4 printed circuit board
BNC to PCB adapter
SMA to PCB adapter
Measurement at IF output, around 17MHz
≅60ns
Simplified Analysis of the BJT Mixer
• A similar analysis as in the diode mixer can be applied to the single-ended BJT mixer.
• Since there is current amplication (β), there is the possibility of conversion gain greater than unity.
• The variation in the BE voltage can be injected by the approach shown on the diagram or using a power combiner.
December 2010 2006 by Fabian Kung Wai Lee 62
−= 1TnV
BEV
eII EOC β
VBE+vRF-vLO vLO
vRF
High impedance
High impedanceICQ
ICQ+ic
ic
At DC:
DC with RF and LO:
−≅+
++
1TnVRFvLOvBEV
eIiI EOcC β
( ) ( )[ ]L++≅⇒++ 2
21
T
LORF
T
LORFTnVBEV
nVvv
nVvv
EOc eIi β
Transistor’s βand VBE
affects theconversiongain
Causes mixing effect
Let VBE be the DC bias, vRF and vLO are theAC RF and LO voltages:
( ) ( )( )
−+++≅+⇒ ++ 11
2
21
LT
LORF
T
LORFTnVBEV
nVvv
nVvv
EOcC eIiI β
Considering only the AC term (ic):
32
September 2008 2006 by Fabian Kung Wai Lee 63
Example 3.2 – 868 MHz Single-Ended Discrete BJT Mixer Design
CCc2C=470.0 pF
CCB1C=470.0 pF
CCB2C=100.0 pF
CCD1C=100.0 pF
CCD0C=2.2 uF
RRD1R=100 Ohm
PortVCCNum=4
RRD2R=4.7 kOhm
DiodeDD2Model=LSR976
DiodeDD1Model=BZX284-C3V3
PortIF_outNum=2
PortLO_inNum=3
PortRF_inNum=1
CC1BC=1.5 pF
CC1AC=1.5 pF
LL1
R=L=33.0 nH
CC2C=22.0 pF
CCc1C=3.3 pF
CC3C=4.7 pF
CC4C=1.5 pF
LL2
R=L=10.0 nH
RRCR=470 Ohm
pb_phl_BFR92A_19921214Q1
CC5C=100.0 pF
LLC
R=L=100.0 nH
RRB1R=470 Ohm
LLB
R=L=100.0 nH
RRB2R=1.8 kOhm
RRB3R=100 Ohm
RF = 868 MHzLO = 818 MHzIF = 50 MHz
Power Supply
LO Input
RF Input
IF Output
Power combiner
September 2008 2006 by Fabian Kung Wai Lee 64
Example 3.2 Cont…
• Snapshot of the Mixer prototype.
33
September 2008 2006 by Fabian Kung Wai Lee 65
Example 3.2 Cont…
• Measurement setup.
50.0 MHz, -22 dBm
A RF signal generator, IFR2023B supplies the RF signal to the mixer RF input, at 868.0 MHz and -20.0 dBmpower level (into 50Ω load). The frequency synthesizer built for this project drives the LO input, at 818.0 MHz and -2.4 dBm power level (into 50Ω load).
September 2008 2006 by Fabian Kung Wai Lee 66
Example 3.2 Cont…
• LO leakage at the RF terminal output.
818.0 MHz, -12 dBm
34
September 2008 2006 by Fabian Kung Wai Lee 67
Block Diagram of Single-Balanced Mixer (1)
RF and LO power isdivided equally to the two identical single-ended mixer.Hence the term ‘balanced’
RF
Rbias
Cc2
L1
Vcc
Cd
RL
Cc1
L2
Input matching network
LO
Cc3
L3
Cc4
Input matching network
Low-pass filter
Low-pass filter
PowerCombi-ner
3dB Hybrid(90o or 180o)
The RF and LO inputs aresplit into 2 equal halves andimposed on the 2 diodes.This type of configuration isbetter known as Single-BalancedMixer.
September 2008 2006 by Fabian Kung Wai Lee 68
Block Diagram of Single-Balanced Mixer (2)
• 3dB hybrid directional coupler or junction (either 90o or 180o) are used to combine two identical single-ended mixers.
• 90o hybrid junction gives better wideband input SWR at the RF and LO inputs (this principle is also used in balanced amplifier).
• 180o hybrid junction gives better RF/LO isolation. This balanced mixer can also suppress even harmonics of LO input.
• Both types can also give cancellation of AM noise from the local oscillator.
• For details of mathematical analysis see chapter 10 of Pozar [8].
35
September 2008 2006 by Fabian Kung Wai Lee 69
More on Mixer Types
• Double-Balanced Mixer - suppresses even harmonics of both LO and RF inputs. Give good conversion gain. Also has good RF/LO isolation. Can be implemented using diode ring or using differential amplifier on integrated circuit.
• Image Rejection Mixer.
• In integrated circuit, a double-balanced mixer can be implemented using the ‘Gilbert Cell’, which is a modification of the two-quadrant analog multiplier. The two-quadrant analog multiplier is essentially an emitter (or source coupled) differential amplifier. See Gray & Meyer [7]. Most commercial integrated circuit mixer uses this method.
Example 3.3 - Double-Ended Balanced Mixer in Integrated Circuit
• This type of mixer is called the Gilbert Cell/Mixer.
September 2008 2006 by Fabian Kung Wai Lee 70
Vcc
+
-
v2
-
+
v1
Vout = R(Ic1 - Ic2)+
-
R RIc1 Ic2
IEE
Differential input:Hence the termdouble-ended.
PopularGeneral purposeGilbert cellmixer ICs:MC1496 – 100 MHzSA602AD – 200 MHzSA612AD – 500 MHzAD8342 – 500 MHz
36
September 2008 2006 by Fabian Kung Wai Lee 71
Example 3.4 - Discrete Double-Ended Balanced Mixer Using Diode Ring
Bottom Side
Another varactor-tuned
BPFImplemented on the PCBitself
Implemented on the PCBitself
PortTP5003Num=5
JUNCAPD5005Model=JUNCAPM1
JUNCAPD5004Model=JUNCAPM1
Diode_ModelDIODEM1
PortPIFNum=3
LL5008
R=L=470.0 nH
CC5052C=82.0 pF
LL5051
R=L=150.0 nH
RR5051R=51 Ohm
LL5004b
CC5055
LL5004a
PortPRFE2Num=1
CC5019-23C=77.0 pF
CC5024C=1.0 nF
RR5012R=100 kOhm
RR5060R=330 kOhm
PortFECTRLNum=2
Juncap_ModelJUNCAPM1MSUB
MSub1
T=1.38 milCond=5.8E+7Er=4.5
MSub
RR5052R=0 Ohm
DiodeDIODE2Model=DIODEM1
DiodeDIODE1Model=DIODEM1
DiodeDIODE3Model=DIODEM1
DiodeDIODE4Model=DIODEM1
XFERTAPT5052
XFERPT5051a
XFERPT505b1
CC5030
CC5032C=8.2 pF
CCL5005
LL5005b
LL5005a
CC5053C=6.8 pF
LL5053
R=L=15.0 nH C
C5054C=16.0 pF
LL5054
R=L=15.0 nH
PortRXINJNum=4
LL5009
R=L=1.0 nH
CC5031C=1.0 pF
MLINTL1
L=100.0 mi lW=25.0 milSubst="MSub1"
CC5017-18
CC5029
RF power flow
IF power flow
Diode ring
Balun
IF trap, tuned to 44.85MHz, shunts IF leakage to ground
September 2008 2006 by Fabian Kung Wai Lee 72
Typical Performance Parameters for Commercial Mixers
• Parameters for an integrated circuit mixer in the 1-3GHz range (for RF power = -20dBm, LO power = -5dBm, Zo=50Ohm, VCC = 5.0V).
• Power supply: single polarity, 4.0-8.0V.
• Typical LO power requirement: -5dBm.
• Conversion gain GC: 6.5 - 10dB.
• Single Sideband (SSB) noise figure: 17dB.
• LO leakage at IF port: -25dBm.
• LO leakage at RF port: -30dBm.
• VSWR: RF - 1.5, LO - 2.0, IF - 1.5.