TUTORIAL FOR PRINTING “HELLO WORLD” USING NIOS|| PROCESSOR ON
ALTERA DE1 BOARD
VIVEK MURALIDHARAN
Mail Id:[email protected]
WHAT ARE THEY ??
QUARTUS-II:
• Software tool produced by Altera for analysis and synthesis of HDL designs.
NIOS-II PROCESSOR:
• Soft-core architecture implemented entirely on the programmable logic & memory blocks of Altera FPGAs.
QSYS:
• Automatically generates interconnect logic to connect intellectual property (IP) functions and subsystems.
NEW PROJECT WIZARD (1/5)
NEW PROJECT WIZARD (2/5)
NEW PROJECT WIZARD (3/5)
NEW PROJECT WIZARD (4/5)
NEW PROJECT WIZARD (5/5)
IMPORT NIOS || PROCESSOR
SELECT NIOS || ECONOMICAL VERSION
IMPORT ON-CHIP MEMORY
IMPORT JTAG/UART PORT, PERFORMANCE COUNTER(NOT SHOWN IN FIGURE)
CONNECTING THE SYSTEM
ASSIGNING RESET & EXCEPTION VECTOR MEMORY FOR NIOS||
ASSIGNING BASE ADDRESS TO SYSTEM COMPONENTS
GENERATING THE SYSTEM
GO BACK TO QUARTUS AND ADD QIP FILE GENERATED BY QSYS
COMPILE THE PROJECT ONCE & THEN PERFORM PIN ASSIGNMENT
ASSIGN CLOCK TO PIN_L1 OF FPGA
SAVE PIN ASSIGNMENT AND COMPILE THE PROJECT
OPEN NIOS|| S/W BUILDER FOR ECLIPSE
CREATE NEW NIOS || APPLICATION FROM TEMPLATE
INCLUDE .SOPCINFO FILE
SELECT THE PROJECT TEMPLATE
LOOK FOR THE HELLO WORLD PROGRAM AND BUILD THE PROJECT
CONNECT THE DE1 BOARD TO PC/LAPTOP & SELECT PROGRAMMER IN QUARTUS ||
ADD .SOF FILE INSIDE PROGRAMMER AND CLICK ON “START”
ADD .SOF FILE INSIDE PROGRAMMER AND CLICK ON “START”
GO BACK TO ECLIPSE WINDOW. RUN APPLICATION AS NIOS|| HARWARE
A NEW WINDOW WILL OPEN UP. SELECT THE TARGET CONNECTION TAB. CLICK ON REFRESH CONNECTIONS. CHECK ON SYSTEM ID CHECKS.
REFERENCES
• http://www.youtube.com/watch?v=1a_cD6FBROA
• http://www.altera.com/products/software/quartus-ii/about/qts-performance-productivity.html
• http://www.altera.com/support/software/system/qsys/sof-qsys-index.html
• http://www.altera.com/devices/processor/nios2/ni2-index.html