LCWS 2006, Bangalore,
Status of DEPFET sensors
JRA1 Design Review Meeting Geneva, 28.01.2007
Stefan Rummelon behalf of the DEPFET collaboration
JRA1 Design Review, 25.01.2007 Stefan Rummel; MPI for Physics
Overview
• DEPFET principle• Status of the PXD5 production• Goals of the new production• Wafer design, Chip overview• R&D towards an ILC module concept• System aspects - new Hybridboard
JRA1 Design Review, 25.01.2007 Stefan Rummel; MPI for Physics
DEPFET principle
• Combination of detector grade silicon with first p-FET amplification stage in each pixel
• Potential minimum for electrons is created under the channel by sideward depletion and an additional n-doping
• Electrons in the “internal gate” modulate the transistor current
• Signal charge is removed via a clear contact
• Large sensitive volume due to the fully depleted bulk
• Low noise caused by a small input capacitance and internal amplification
• Transistor can be switched off by external gate – charge collection is then still active!
JRA1 Design Review, 25.01.2007 Stefan Rummel; MPI for Physics
Production status - PXD5
• All implantations done
• Polysilicon layers are deposited and structured
• To be done:• Contact holes• Metal layer 1 and 2• Backside (double sided process)
New devices available around June 07!
JRA1 Design Review, 25.01.2007 Stefan Rummel; MPI for Physics
Goals of the PXD5 production
• Technological improvements
• Larger matrices
• Long matrices (full ILC drain length)
• Wide matrices (full Load for Switcher Gate / Clear chips)
• Performance improvements:
• Reduce clear voltages
• Charge collection
• Small pixels (20µm x 20µm)
• Increase internal amplification (gq)
• Bump bonding test structures
JRA1 Design Review, 25.01.2007 Stefan Rummel; MPI for Physics
• PXD4: matrices with 6µm gate length
• PXD5: matrices with gate length down to 4µm
New feature – smaller gates
PXD4
PXD5
• Aim for significant improvement in gain!• Less sensitive to external noise!
JRA1 Design Review, 25.01.2007 Stefan Rummel; MPI for Physics
PXD5 Wafer
wide arrays(512 x 512, full ILC)
various newstandard arrays(64 x 256 pixels,
down to 20x20µm2)
standard arrayscompatible to
existing hybrids
Rainer Richter, MPI HLL
long arrays(256 x 1024, ½ ILC)
JRA1 Design Review, 25.01.2007 Stefan Rummel; MPI for Physics
Standard detector
• 128 (x) x 64 (y) double pixels = 64 x 256 pixels• Various pixel sizes 32x24µm², 24x24µm², 20x20µm² chip size 7x10mm²• 2 x Switcher3, 1 x CURO• 50 devices per wafer• Provided in many design variations
JRA1 Design Review, 25.01.2007 Stefan Rummel; MPI for Physics
Standard detector compatible to old hybrids
• 64 (x) x 64 (y) double pixels = 64 x 128 pixels• Pixel size 32x24µm², chip size 7*7mm• 2 x Switcher2, 1 x CURO• 24 devices per wafer• Devices already incorporate new design features!
Working systems with this devices will be available soon after the production is completed!
JRA1 Design Review, 25.01.2007 Stefan Rummel; MPI for Physics
Wide detectors
• 512 (x) x 256 (y) double pixels = 512 x 512 pixels (full ILC width). Pixel size 32 x 24 µm²
• 2 x 2 x Switcher 3, 8 x CURO• 4 devices per wafer• Study full load on Switcher signals
JRA1 Design Review, 25.01.2007 Stefan Rummel; MPI for Physics
Long detectors
• 128 (x) x 1024 (y) double pixels = 128 x 2048 pixels (full ILC RO length). Pixel 24 x 24 µm²
• 2 x 8 x Switcher 3, 2 x CURO• 2 devices per wafer• Study full load on drain signals to CURO
JRA1 Design Review, 25.01.2007 Stefan Rummel; MPI for Physics
R&D towards an ILC module concept
• Thinning technology shows significant progress• Full scale mechanical samples • Thinned (50µm) diodes show excellent leakage currents• Thinned DEPFET devices within the PXD6 production are possible!
JRA1 Design Review, 25.01.2007 Stefan Rummel; MPI for Physics
Next generation steering chips
• CURO successor • Better noise performance• ADC for every channel
• In work
• Switcher3
• 128 channels
• Radiationhard design
• 10V voltage swing
• Already available!
JRA1 Design Review, 25.01.2007 Stefan Rummel; MPI for Physics
New Hybrid boards
• Larger devices need more steering- and readout chips
• Require changes on:
• Hybrid level
• System level
• Redesign of the Hybrid will start in February
Hybrid board V2.0
JRA1 Design Review, 25.01.2007 Stefan Rummel; MPI for Physics
Summary
• New production is approximately ready in June • Working systems with PXD5 devices will be
available soon after production is finished• DEPFET is on a good way towards measurements
with the Demonstrator
JRA1 Design Review, 25.01.2007 Stefan Rummel; MPI for Physics
Backup….
JRA1 Design Review, 25.01.2007 Stefan Rummel; MPI for Physics
The PXD5 Wafer
2 long arrays (256x1024 – half ILC length) 24x24 µm² cells, chip size 8.5x55mm²4 wide arrays (1024x256 – full ILC width) 32x24 µm² cells, chip size 21x20mm²50 128x128 test array for new hybrids 32x24µm², 24x24µm², 20x20µm² chip size 7x10mm² 1 128x128 bump bond test array 24x24 µm² cells, chip size 8.5x10mm²24 128x64 test arrays for old hybrids PXD4-cells, 32x24µm², 24x24µm²45 16x6 mini matrices 32x24µm², 24x24µm² chip size 3.5x4mm²7 different chips with double cells geometry var. of depmos and clear reg. chip size 7x4mm²2 mixed chips (double cells and 1 minimatrix) chip size 5x5mm²3 transistor chips, different p- and nMOS chip size 7x4mm²
10 technology chips test structures 23 G.L. chips 2 XEUS chips for simul. clear