TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Trimmed Offset Voltage:TLC27L9 . . . 900 µV Max at 25°C,VDD = 5 V
Input Offset Voltage Drif t . . . Typically0.1 µV/Month, Including the First 30 Days
Wide Range of Supply Voltages OverSpecified Temperature Range:
0°C to 70°C . . . 3 V to 16 V–40°C to 85°C . . . 4 V to 16 V–55°C to 125°C . . . 4 V to 16 V
Single-Supply Operation
Common-Mode Input Voltage RangeExtends Below the Negative Rail (C-Suffix,I-Suffix Types)
Ultra-Low Powe r . . . Typically 195 µWat 25°C, VDD = 5 V
Output Voltage Range includes NegativeRail
High Input Impedanc e . . . 1012 Ω Typ
ESD-Protection Circuitry
Small-Outline Package Option AlsoAvailable in Tape and Reel
Designed-In Latch-Up Immunity
description
The TLC27L4 and TLC27L9 quad operationalamplifiers combine a wide range of input offsetvoltage grades with low offset voltage drift, highinput impedance, extremely low power, and highgain.
These devices use Texas instruments silicon-gateLinCMOS technology, which provides offsetvoltage stability far exceeding the stabilityavailable with conventional metal-gate pro-cesses.
The extremely high input impedance, low biascurrents, and low-power consumption makethese cost-effective devices ideal for high-gain,low- frequency, low-power applications. Fouroffset voltage grades are available (C-suffix andI-suffix types), ranging from the low-cost TLC27L4(10 mV) to the high-precision TLC27L9 (900 µV).These advantages, in combination with goodcommon-mode rejection and supply voltagerejection, make these devices a good choice fornew state-of-the-art designs as well as forupgrading existing designs.
Copyright 1994, Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date.Products conform to specifications per the terms of Texas Instrumentsstandard warranty. Production processing does not necessarily includetesting of all parameters.
LinCMOS is a trademark of Texas Instruments Incorporated.
35
30
25
20
15
10
5
6000–600
40
1200
VIO – Input Offset Voltage – µV
Per
cent
age
of U
nits
– %
0–1200
N PackageTA = 25°CVDD = 5 V299 Units Tested From 2 Wafer Lots
DISTRIBUTION OF TLC27L9INPUT OFFSET VOLTAGE
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1OUT1IN–1IN+VDD
2IN+2IN–
2OUT
4OUT4IN–4IN+GND3IN+3IN–3OUT
D, J, N, OR PW PACKAGE(TOP VIEW)
3 2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
4IN+NCGNDNC3IN+
1IN+NC
VDDNC
2IN+
FK PACKAGE(TOP VIEW)
1IN
–1O
UT
NC
3OU
T3I
N –
4OU
T4I
N –
2IN
–2O
UT
NC
NC – No internal connection
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description (continued)
In general, many features associated with bipolar technology are available on LinCMOS operationalamplifiers, without the power penalties of bipolar technology. General applications such as transducerinterfacing, analog calculations, amplifier blocks, active filters, and signal buffering are easily designed with theTLC27L4 and TLC27L9. The devices also exhibit low voltage single-supply operation and ultra-low powerconsumption, making them ideally suited for remote and inaccessible battery-powered applications. Thecommon-mode input voltage range includes the negative rail.
A wide range of packaging options is available, including small-outline and chip-carrier versions for high-densitysystem applications.
The device inputs and outputs are designed to withstand –100-mA surge currents without sustaining latch-up.
The TLC27L4 and TLC27L9 incorporate internal ESD-protection circuits that prevent functional failures atvoltages up to 2000 V as tested under MIL-STD-883C, Method 3015.2; however, care should be exercised inhandling these devices, as exposure to ESD may result in the degradation of the device parametricperformance.
The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterizedfor operation from –40°C to 85°C. The M-suffix devices are characterized for operation from –55°C to 125°C.
AVAILABLE OPTIONS
PACKAGED DEVICESCHIP
TAVIOmaxAT 25°C
SMALL OUTLINE
(D)
CHIPCARRIER
(FK)
CERAMICDIP(J)
PLASTIC DIP(N)
TSSOP(PW)
CHIPFORM
(Y)
900 µV TLC27L9CD — — TLC27L9CN — —
0°C to 70°C2 mV TLC27L4BCD — — TLC27L4BCN — —
0°C to 70°C5 mV TLC27L4ACD — — TLC27L4ACN — —
10 mV TLC27L4CD — — TLC27L4CN TLC27L4CPW TLC27L4Y
900 µV TLC27L9ID — — TLC27L9IN — —
40°C to 85°C2 mV TLC27L4BID — — TLC27L4BIN — —
–40°C to 85°C5 mV TLC27L4AID — — TLC27L4AIN — —
10 mV TLC27L4ID — — TLC27L4IN — —
55°C to 125°C900 µV TLC27L9MD TLC27L9MFK TLC27L9MJ TLC27L9MN — —
–55°C to 125°C10 mV TLC27L4MD TLC27L4MFK TLC27L4MJ TLC27L4MN — —
The D package is available taped and reeled. Add R suffix to the device type (e.g., TLC27L9CDR).
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
equivalent schematic (each amplifier)VDD
P4P3
R6
N5R2
P2
R1
P1
IN–
IN+
N1
R3 D1 R4 D2
N2
GND
N3
R5C1
N4
R7
N6 N7
OUT
P6P5
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4Y chip information
These chips, when properly assembled, display characteristics similar to the TLC27L4C. Thermal compressionor ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted withconductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
CHIP THICKNESS: 15 TYPICAL
BONDING PADS: 4 × 4 MINIMUM
TJmax = 150°C
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
PIN (11) IS INTERNALLY CONNECTEDTO BACKSIDE OF CHIP.
+
–1OUT
1IN+
1IN–
VDD(4)
(6)
(3)
(2)
(5)
(1)
–
+(7) 2IN+
2IN–2OUT
(11)
GND
+
–3OUT
3IN+
3IN–
(13)
(10)
(9)
(12)
(8)
–
+(14)4OUT
4IN+
4IN–
68
108
(1) (2) (3) (4) (5) (6) (7)
(8)(9)(10)(11)(12)(13)(14)
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
5POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature (unless otherwise noted) †
Supply voltage, VDD (see Note 1) 18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Differential input voltage, VID (see Note 2) ±VDD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input voltage range, VI (any input) –0.3 V to VDD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input current, II ±5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output current, IO (each output) ±30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Total current into VDD 45 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Total current out of GND 45 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Duration of short-circuit current at (or below) 25°C (see Note 3) unlimited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous total dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating free-air temperature, TA: C suffix 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I suffix –40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . M suffix –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Case temperature for 60 seconds: FK package 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, N, or PW package 260°C. . . . . . . . . . . . Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package 300°C. . . . . . . . . . . . . . . . . . . . .
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, andfunctional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is notimplied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to network ground.2. Differential voltages are at IN+ with respect to IN–.3. The output may be shorted to either supply. Temperature and /or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded (see application section).
DISSIPATION RATING TABLE
PACKAGETA ≤ 25°C
POWER RATINGDERATING FACTORABOVE TA = 25°C
TA = 70°CPOWER RATING
TA = 85°CPOWER RATING
TA = 125°CPOWER RATING
D 950 mW 7.6 mW/°C 608 mW 494 mW —
FK 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW
J 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW
N 1575 mW 12.6 mW/°C 1008 mW 819 mW —
PW 700 mW 5.6 mW/°C 448 mW — —
recommended operating conditions
C SUFFIX I SUFFIX M SUFFIXUNIT
MIN MAX MIN MAX MIN MAXUNIT
Supply voltage, VDD 3 16 4 16 4 16 V
Common mode input voltage VICVDD = 5 V –0.2 3.5 –0.2 3.5 0 3.5
VCommon-mode input voltage, VICVDD = 10 V –0.2 8.5 –0.2 8.5 0 8.5
V
Operating free-air temperature, TA 0 70 –40 85 –55 125 °C
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, V DD = 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA†
TLC27L4CTLC27L4ACTLC27L4BCTLC27L9C
UNIT
MIN TYP MAX
TLC27L4CVO = 1.4 V, VIC = 0, 25°C 1.1 10
TLC27L4C O ,RS = 50 Ω,
IC ,RL = 1 MΩ Full range 12
mV
TLC27L4ACVO = 1.4 V, VIC = 0, 25°C 0.9 5
mV
VIO Input offset voltage
TLC27L4AC O ,RS = 50 Ω,
IC ,RL = 1 MΩ Full range 6.5
VIO Input offset voltage
TLC27L4BCVO = 1.4 V, VIC = 0, 25°C 240 2000
TLC27L4BC O ,RS = 50 Ω,
IC ,RL = 1 MΩ Full range 3000
µV
TLC27L9CVO = 1.4 V, VIC = 0, 25°C 200 900
µV
TLC27L9C O ,RS = 50 Ω,
IC ,RL = 1 MΩ Full range 1500
αVIOAverage temperature coefficient of inputoffset voltage
25°C to 70°C 1.1 µV/°C
IIO Input offset current (see Note 4) VO = 2 5 V VIC = 2 5 V25°C 0.1
pAIIO Input offset current (see Note 4) VO = 2.5 V, VIC = 2.5 V70°C 7 300
pA
IIB Input bias current (see Note 4) VO = 2 5 V VIC = 2 5 V25°C 0.6
pAIIB Input bias current (see Note 4) VO = 2.5 V, VIC = 2.5 V70°C 40 600
pA
VICRCommon mode input voltage range
25°C–0.2
to4
–0.3to
4.2V
VICRg g
(see Note 5)
Full range–0.2
to3.5
V
25°C 3.2 4.1
VOH High-level output voltage VID = 100 mV, RL = 1 MΩ 0°C 3 4.1 V
70°C 3 4.2
25°C 0 50
VOL Low-level output voltage VID = –100 mV, IOL = 0 0°C 0 50 mV
70°C 0 50
L i l diff ti l lt25°C 50 520
AVDLarge-signal differential voltageamplification
VO = 2.5 V to 2 V, RL = 1 MΩ 0°C 50 680 V/mVam lification
70°C 50 380
25°C 65 94
CMRR Common-mode rejection ratio VIC = VICRmin 0°C 60 95 dB
70°C 60 95
S l lt j ti ti25°C 70 97
kSVRSupply-voltage rejection ratio(∆VDD/∆VIO)
VDD = 5 V to 10 V, VO = 1.4 V 0°C 60 97 dB(∆VDD/∆VIO)
70°C 60 98
V 2 5 V V 2 5 V25°C 40 68
IDD Supply current (four amplifiers)VO = 2.5 V,No load
VIC = 2.5 V,0°C 48 84 µANo load
70°C 31 56
† Full range is 0°C to 70°C.NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
7POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, V DD = 10 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA†
TLC27L4CTLC27L4ACTLC27L4BCTLC27L9C
UNIT
MIN TYP MAX
TLC27L4CVO = 1.4 V, VIC = 0, 25°C 1.1 10
TLC27L4C O ,RS = 50 Ω,
IC ,RL = 1 MΩ Full range 12
mV
TLC27L4ACVO = 1.4 V, VIC = 0, 25°C 0.9 5
mV
VIO Input offset voltage
TLC27L4AC O ,RS = 50 Ω,
IC ,RL = 1 MΩ Full range 6.5
VIO Input offset voltage
TLC27L4BCVO = 1.4 V, VIC = 0, 25°C 260 2000
TLC27L4BC O ,RS = 50 Ω,
IC ,RL = 1 MΩ Full range 3000
µV
TLC27L9CVO = 1.4 V, VIC = 0, 25°C 210 1200
µV
TLC27L9C O ,RS = 50 Ω,
IC ,RL = 1 MΩ Full range 1900
αVIOAverage temperature coefficient of input offset voltage
25°C to 70°C 1 µV/°C
IIO Input offset current (see Note 4) VO = 5 V VIC = 5 V25°C 0.1
pAIIO Input offset current (see Note 4) VO = 5 V, VIC = 5 V70°C 7 300
pA
IIB Input bias current (see Note 4) VO = 5 V VIC = 5 V25°C 0.7
pAIIB Input bias current (see Note 4) VO = 5 V, VIC = 5 V70°C 50 600
pA
VICRCommon-mode input voltage range
25°C–0.2
to9
–0.3to
9.2V
VICRg g
(see Note 5)
Full range–0.2
to8.5
V
25°C 8 8.9
VOH High-level output voltage VID = 100 mV, RL = 1 MΩ 0°C 7.8 8.9 V
70°C 7.8 8.9
25°C 0 50
VOL Low-level output voltage VID = –100 mV, IOL = 0 0°C 0 50 mV
70°C 0 50
L i l diff ti l lt25°C 50 870
AVDLarge-signal differential voltageamplification
VO = 1 V to 6 V, RL = 1 MΩ 0°C 50 1020 V/mVam lification
70°C 50 660
25°C 65 97
CMRR Common-mode rejection ratio VIC = VICRmin 0°C 60 97 dB
70°C 60 97
S l lt j ti ti25°C 70 97
kSVRSupply-voltage rejection ratio(∆VDD/∆VIO)
VDD = 5 V to 10 V, VO = 1.4 V 0°C 60 97 dB(∆VDD/∆VIO)
70°C 60 98
V 5 V V 5 V25°C 57 92
IDD Supply current (four amplifiers)VO = 5 V,No load
VIC = 5 V,0°C 72 132 µA
No load70°C 44 80
† Full range is 0°C to 70°C.NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, V DD = 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA†
TLC27L4ITLC27L4AITLC27L4BITLC27L9I
UNIT
MIN TYP MAX
TLC27L4IVO = 1.4 V, VIC = 0, 25°C 1.1 10
TLC27L4I O ,RS = 50 Ω,
IC ,RL = 1 MΩ Full range 13
mV
TLC27L4AIVO = 1.4 V, VIC = 0, 25°C 0.9 5
mV
VIO Input offset voltage
TLC27L4AI O ,RS = 50 Ω,
IC ,RL = 1 MΩ Full range 7
VIO Input offset voltage
TLC27L4BIVO = 1.4 V, VIC = 0, 25°C 240 2000
TLC27L4BI O ,RS = 50 Ω,
IC ,RL = 1 MΩ Full range 3500
µV
TLC27L9IVO = 1.4 V, VIC = 0, 25°C 200 900
µV
TLC27L9I O ,RS = 50 Ω,
IC ,RL = 1 MΩ Full range 2000
αVIOAverage temperature coefficient of inputoffset voltage
25°C to 85°C 1.1 µV/°C
IIO Input offset current (see Note 4) VO = 2 5 V VIC = 2 5 V25°C 0.1
pAIIO Input offset current (see Note 4) VO = 2.5 V, VIC = 2.5 V85°C 24 1000
pA
IIB Input bias current (see Note 4) VO = 2 5 V VIC = 2 5 V25°C 0.6
pAIIB Input bias current (see Note 4) VO = 2.5 V, VIC = 2.5 V85°C 200 2000
pA
VICRCommon-mode input voltage range
25°C–0.2
to4
–0.3to
4.2V
VICRg g
(see Note 5)
Full range–0.2
to3.5
V
25°C 3.2 4.1
VOH High-level output voltage VID = 100 mV, RL = 1 MΩ –40°C 3 4.1 V
85°C 3 4.2
25°C 0 50
VOL Low-level output voltage VID = –100 mV, IOL = 0 –40°C 0 50 mV
85°C 0 50
L i l diff ti l lt25°C 50 480
AVDLarge-signal differential voltageamplification
VO = 0.25 V to 2 V, RL = 1 MΩ –40°C 50 900 V/mVam lification
85°C 50 330
25°C 65 94
CMRR Common-mode rejection ratio VIC = VICRmin –40°C 60 95 dB
85°C 60 95
S l lt j ti ti25°C 70 97
kSVRSupply-voltage rejection ratio(∆VDD/∆VIO)
VDD = 5 V to 10 V, VO = 1.4 V –40°C 60 97 dB(∆VDD/∆VIO)
85°C 60 98
V 2 5 V V 2 5 V25°C 39 68
IDD Supply current (four amplifiers)VO = 2.5 V,No load
VIC = 2.5 V,–40°C 62 108 µANo load
85°C 29 52
† Full range is –40°C to 85°C.NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
9POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, V DD = 10 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA†
TLC27L4ITLC27L4AITLC27L4BITLC27L9I
UNIT
MIN TYP MAX
TLC27L4IVO = 1.4 V, VIC = 0, 25°C 1.1 10
TLC27L4I O ,RS = 50 Ω,
IC ,RL = 1 MΩ Full range 13
mV
TLC27L4AIVO = 1.4 V, VIC = 0, 25°C 0.9 5
mV
VIO Input offset voltage
TLC27L4AI O ,RS = 50 Ω,
IC ,RL = 1 MΩ Full range 7
VIO Input offset voltage
TLC27L4BIVO = 1.4 V, VIC = 0, 25°C 260 2000
TLC27L4BI O ,RS = 50 Ω,
IC ,RL = 1 MΩ Full range 3500
µV
TLC27L9IVO = 1.4 V, VIC = 0, 25°C 210 1200
µV
TLC27L9I O ,RS = 50 Ω,
IC ,RL = 1 MΩ Full range 2900
αVIOAverage temperature coefficient of inputoffset voltage
25°C to 85°C 1 µV/°C
IIO Input offset current (see Note 4) VO = 5 V VIC = 5 V25°C 0.1
pAIIO Input offset current (see Note 4) VO = 5 V, VIC = 5 V85°C 26 1000
pA
IIB Input bias current (see Note 4) VO = 5 V VIC = 5 V25°C 0.7
pAIIB Input bias current (see Note 4) VO = 5 V, VIC =.5 V85°C 220 2000
pA
VICRCommon-mode input voltage range
25°C–0.2
to9
–0.3to
9.2V
VICRg g
(see Note 5)
Full range–0.2
to8.5
V
25°C 8 8.9
VOH High-level output voltage VID = 100 mV, RL = 1 MΩ –40°C 7.8 8.9 V
85°C 7.8 8.9
25°C 0 50
VOL Low-level output voltage VID = –100 mV, IOL = 0 –40°C 0 50 mV
85°C 0 50
L i l diff ti l lt25°C 50 800
AVDLarge-signal differential voltageamplification
VO = 1 V to 6 V, RL = 1 MΩ –40°C 50 1550 V/mVam lification
85°C 50 585
25°C 65 97
CMRR Common-mode rejection ratio VIC = VICRmin –40°C 60 97 dB
85°C 60 98
S l lt j ti ti25°C 70 97
kSVRSupply-voltage rejection ratio(∆VDD/∆VIO)
VDD = 5 V to 10 V, VO = 1.4 V –40°C 60 97 dB(∆VDD/∆VIO)
85°C 60 98
V 5 V V 5 V25°C 57 92
IDD Supply current (four amplifiers)VO = 5 V,No load
VIC = 5 V,–40°C 98 172 µA
No load85°C 40 72
† Full range is –40°C to 85°C.NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, V DD = 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA†TLC27L4MTLC27L9M UNITA
MIN TYP MAX
TLC27L4MVO = 1.4 V, VIC = 0, 25°C 1.1 10
mV
VIO Input offset voltage
TLC27L4M O ,RS = 50 Ω,
IC ,RL = 1 MΩ Full range 12
mV
VIO Input offset voltage
TLC27L9MVO = 1.4 V, VIC = 0, 25°C 200 900
µVTLC27L9M O ,RS = 50 Ω,
IC ,RL = 1 MΩ Full range 3750
µV
αVIOAverage temperature coefficient of inputoffset voltage
25°C to 125°C 1.4 µV/°C
IIO Input offset current (see Note 4) VO = 2 5 V VIC = 2 5 V25°C 0.1 pA
IIO Input offset current (see Note 4) VO = 2.5 V, VIC = 2.5 V125°C 1.4 15 nA
IIB Input bias current (see Note 4) VO = 2 5 V VIC = 2 5 V25°C 0.6 pA
IIB Input bias current (see Note 4) VO = 2.5 V, VIC = 2.5 V125°C 9 35 nA
VICRCommon-mode input voltage range
25°C–0.2
to4
–0.3to
4.2V
VICRg g
(see Note 5)
Full range–0.2
to3.5
V
25°C 3.2 4.1
VOH High-level output voltage VID = 100 mV, RL = 1 MΩ –55°C 3 4.1 V
125°C 3 4.2
25°C 0 50
VOL Low-level output voltage VID = –100 mV, IOL = 0 –55°C 0 50 mV
125°C 0 50
L i l diff ti l lt25°C 50 480
AVDLarge-signal differential voltageamplification
VO = 0.25 V to 2 V, RL = 1 MΩ –55°C 25 950 V/mVam lification
125°C 25 200
25°C 65 94
CMRR Common-mode rejection ratio VIC = VICRmin –55°C 60 95 dB
125°C 60 85
S l lt j ti ti25°C 70 97
kSVRSupply-voltage rejection ratio(∆VDD/∆VIO)
VDD = 5 V to 10 V, VO = 1.4 V –55°C 60 97 dB(∆VDD/∆VIO)
125°C 60 98
V 2 5 V V 2 5 V25°C 39 68
IDD Supply current (four amplifiers)VO = 2.5 V,No load
VIC = 2.5 V,–55°C 69 120 µA
No load125°C 27 48
† Full range is –55°C to 125°C.NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
11POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, V DD = 10 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA†TLC27L4MTLC27L9M UNITA
MIN TYP MAX
TLC27L4MVO = 1.4 V, VIC = 0, 25°C 1.1 10
mV
VIO Input offset voltage
TLC27L4M O ,RS = 50 Ω,
IC ,RL = 1 MΩ Full range 12
mV
VIO Input offset voltage
TLC27L9MVO = 1.4 V, VIC = 0, 25°C 210 1200
µVTLC27L9M O ,RS = 50 Ω,
IC ,RL = 1 MΩ Full range 4300
µV
αVIOAverage temperature coefficient ofinput offset voltage
25°C to 125°C 1.4 µV/°C
IIO Input offset current (see Note 4) VO = 5 V VIC = 5 V25°C 0.1 pA
IIO Input offset current (see Note 4) VO = 5 V, VIC = 5 V125°C 1.8 15 nA
IIB Input bias current (see Note 4) VO = 5 V VIC = 5 V25°C 0.7 pA
IIB Input bias current (see Note 4) VO = 5 V, VIC = 5 V125°C 10 35 nA
VICRCommon-mode input voltage range
25°C0to9
–0.3to
9.2V
VICRg g
(see Note 5)
Full range0to
8.5V
25°C 8 8.9
VOH High-level output voltage VID = 100 mV, RL = 1 MΩ –55°C 7.8 8.8 V
125°C 7.8 9
25°C 0 50
VOL Low-level output voltage VID = –100 mV, IOL = 0 –55°C 0 50 mV
125°C 0 50
L i l diff ti l lt25°C 50 800
AVDLarge-signal differential voltageamplification
VO = 1 V to 6 V, RL = 1 MΩ –55°C 25 1750 V/mVam lification
125°C 25 380
25°C 65 97
CMRR Common-mode rejection ratio VIC = VICRmin –55°C 60 97 dB
125°C 60 91
S l lt j ti ti25°C 70 97
kSVRSupply-voltage rejection ratio(∆VDD/∆VIO)
VDD = 5 V to 10 V, VO = 1.4 V –55°C 60 97 dB(∆VDD/∆VIO)
125°C 60 98
V 5 V V 5 V25°C 57 92
IDD Supply current (four amplifiers)VO = 5 V,No load
VIC = 5 V,–55°C 111 192 µA
No load125°C 35 60
† Full range is –55°C to 125°C.NOTES: 4. The typical values of input bias current and Input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, V DD = 5 V, TA = 25°C (unless otherwisenoted)
PARAMETER TEST CONDITIONSTLC27L4Y
UNITPARAMETER TEST CONDITIONSMIN TYP MAX
UNIT
VIO Input offset voltageVO = 1.4 V,RS = 50 Ω,
VIC = 0,RL = 1 MΩ 1.1 10 mV
αVIO Average temperature coefficient of input offset voltage TA = 25°C to 70°C 1.1 µV/°C
IIO Input offset current (see Note 4) VO = 2.5 V, VIC = 2.5 V 0.1 pA
IIB Input bias current (see Note 4) VO = 2.5 V, VIC = 2.5 V 0.6 pA
VICR Common-mode input voltage range (see Note 5)–0.2
to4
–0.3to
4.2V
VOH High-level output voltage VID = 100 mV, RL = 1 MΩ 3.2 4.1 V
VOL Low-level output voltage VID = –100 mV, IOL = 0 0 50 mV
AVD Large-signal differential voltage amplification VO = 0.25 V to 2 V, RL = 1 MΩ 50 520 V/mV
CMRR Common-mode rejection ratio VIC = VICRmin 65 94 dB
kSVR Supply-voltage rejection ratio (∆VDD/∆VIO) VDD = 5 V to 10 V, VO = 1.4 V 70 97 dB
IDD Supply current (four amplifiers)VO = 2.5 V,No load
VIC = 2.5 V,40 68 µA
electrical characteristics at specified free-air temperature, V DD = 10 V, TA = 25°C (unless otherwisenoted)
PARAMETER TEST CONDITIONSTLC27L4Y
UNITPARAMETER TEST CONDITIONSMIN TYP MAX
UNIT
VIO Input offset voltageVO = 1.4 V,RS = 50 Ω,
VIC = 0,RL = 1 MΩ 1.1 10 mV
αVIO Average temperature coefficient of input offset voltage TA = 25°C to 70°C 1 µV/°C
IIO Input offset current (see Note 4) VO = 5 V, VIC = 5 V 0.1 pA
IIB Input bias current (see Note 4) VO = 5 V, VIC = 5 V 0.7 pA
VICR Common-mode input voltage range (see Note 5)–0.2
to9
–0.3to
9.2V
VOH High-level output voltage VID = 100 mV, RL = 1 MΩ 8 8.9 V
VOL Low-level output voltage VID = –100 mV, IOL = 0 0 50 mV
AVD Large-signal differential voltage amplification VO = 1 V to 6 V, RL = 1 MΩ 50 870 V/mV
CMRR Common-mode rejection ratio VIC = VICRmin 65 97 dB
kSVR Supply-voltage rejection ratio (∆VDD/∆VIO) VDD = 5 V to 10 V, VO = 1.4 V 70 97 dB
IDD Supply current (four amplifiers)VO = 5 V,No load
VIC = 5 V,57 92 µA
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.5. This range also applies to each input individually.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
13POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
operating characteristics at specified free-air temperature, V DD = 5 V
PARAMETER TEST CONDITIONS TA
TLC27L4C TLC27L4ACTLC27L4BCTLC27L9C
UNIT
MIN TYP MAX
25°C 0.03
VIPP = 1 V 0°C 0.04
SR Slew rate at unity gainRL = 1 MΩ,CL 20 pF
70°C 0.03V/µsSR Slew rate at unity gain CL = 20 pF,
See Figure 1 25°C 0.03V/µs
See Figure 1VIPP = 2.5 V 0°C 0.03
70°C 0.02
Vn Equivalent input noise voltagef = 1 kHZ, See Figure 2
RS = 20 Ω,25°C 70 nV/√Hz
V V C 20 F25°C 5
BOM Maximum output-swing bandwidthVO = VOH,RL = 1 MΩ
CL = 20 pF,See Figure 1
0°C 6 kHzRL = 1 MΩ, See Figure 1
70°C 4.5
V 10 V C 20 F25°C 85
B1 Unity-gain bandwidthVI = 10 mV,See Figure 3
CL = 20 pF,0°C 100 kHz
See Figure 370°C 65
V 10 mV f B25°C 34°
φm Phase marginVI = 10 mV,CL = 20 pF,
f = B1,See Figure 3 0°C 36°CL = 20 F, See Figure 3
70°C 30°
operating characteristics at specified free-air temperature, V DD = 10 V
PARAMETER TEST CONDITIONS TA
TLC27L4C TLC27L4ACTLC27L4BCTLC27L9C
UNIT
MIN TYP MAX
25°C 0.05
VIPP = 1 V 0°C 0.05
SR Slew rate at unity gainRL = 1 MΩ,CL 20 pF
70°C 0.04V/µsSR Slew rate at unity gain CL = 20 pF,
See Figure 1 25°C 0.04V/µs
See Figure 1VIPP = 5.5 V 0°C 0.05
70°C 0.04
Vn Equivalent input noise voltagef = 1 kHz, See Figure 2
RS = 20 Ω,25°C 70 nV/√Hz
V V C 20 F25°C 1
BOM Maximum output-swing bandwidthVO = VOH,RL = 1 MΩ
CL = 20 pF,See Figure 1
0°C 1.3 kHzRL = 1 MΩ, See Figure 1
70°C 0.9
V 10 V C 20 F25°C 110
B1 Unity-gain bandwidthVI = 10 mV,See Figure 3
CL = 20 pF,0°C 125 kHz
See Figure 370°C 90
V 10 mV f B25°C 38°
φm Phase marginVI = 10 mV,CL = 20 pF,
f = B1,See Figure 3 0°C 40°CL = 20 F, See Figure 3
70°C 34°
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
operating characteristics at specified free-air temperature, V DD = 5 V
PARAMETER TEST CONDITIONS TA
TLC27L4I TLC27L4AITLC27L4BITLC27L9I
UNIT
MIN TYP MAX
25°C 0.03
VIPP = 1 V –40°C 0.04
SR Slew rate at unity gainRL = 1 MΩ,CL 20 pF
85°C 0.03V/µsSR Slew rate at unity gain CL = 20 pF,
See Figure 1 25°C 0.03V/µs
See Figure 1VIPP = 2.5 V –40°C 0.04
85°C 0.02
Vn Equivalent input noise voltagef = 1 HZ, See Figure 2
RS = 20 Ω,25°C 70 nV/√Hz
V V C 20 F25°C 5
BOM Maximum output-swing bandwidthVO = VOH,RL = 1 MΩ
CL = 20 pF,See Figure 1
–40°C 7 kHzRL = 1 MΩ, See Figure 1
85°C 4
V 10 V C 20 F25°C 85
B1 Unity-gain bandwidthVI = 10 mV,See Figure 3
CL = 20 pF,–40°C 130 kHz
See Figure 385°C 55
V 10 mV f B25°C 34°
φm Phase marginVI = 10 mV,CL = 20 pF,
f = B1,See Figure 3 –40°C 38°CL = 20 F, See Figure 3
85°C 28°
operating characteristics at specified free-air temperature, V DD = 10 V
PARAMETER TEST CONDITIONS TA
TLC27L4ITLC27L4AITLC27L4BITLC27L9I
UNIT
MIN TYP MAX
25°C 0.05
VIPP = 1 V –40°C 0.06
SR Slew rate at unity gainRL = 1 MΩ,CL 20 pF
85°C 0.03V/µsSR Slew rate at unity gain CL = 20 pF,
See Figure 1 25°C 0.04V/µs
See Figure 1VIPP = 2.5 V –40°C 0.05
85°C 0.03
Vn Equivalent input noise voltagef = 1 HZ, See Figure 2
RS = 20 Ω,25°C 70 nV/√Hz
V V C 20 F25°C 1
BOM Maximum output-swing bandwidthVO = VOH,RL = 1 MΩ
CL = 20 pF,See Figure 1
–40°C 1.4 kHzRL = 1 MΩ, See Figure 1
85°C 0.8
V 10 V C 20 F25°C 110
B1 Unity-gain bandwidthVI = 10 mV,See Figure 3
CL = 20 pF,–40°C 155 kHz
See Figure 385°C 80
V 10 mV f B25°C 38°
φm Phase marginVI = 10 mV,CL = 20 pF,
f = B1,See Figure 3 –40°C 42°CL = 20 F, See Figure 3
85°C 32°
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
15POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
operating characteristics at specified free-air temperature, V DD = 5 V
PARAMETER TEST CONDITIONS TA
TLC27L4MTLC27L9M UNITA
MIN TYP MAX
25°C 0.03
VIPP = 1 V –55°C 0.04
SR Slew rate at unity gainRL = 1 MΩ,CL 20 pF
125°C 0.02V/µsSR Slew rate at unity gain CL = 20 pF,
See Figure 1 25°C 0.03V/µs
See Figure 1VIPP = 2.5 V –55°C 0.04
125°C 0.02
Vn Equivalent input noise voltagef = 1 kHz,See Figure 2
RS = 20 Ω,25°C 70 nV/√Hz
V V C 20 F25°C 5
BOM Maximum output-swing bandwidthVO = VOH,RL = 1 MΩ
CL = 20 pF,See Figure 1
–55°C 8 kHzRL = 1 MΩ, See Figure 1
125°C 3
V 10 V C 20 F25°C 85
B1 Unity-gain bandwidthVI = 10 mV, See Figure 3
CL = 20 pF,–55°C 140 kHz
See Figure 3125°C 45
V 10 mV f B25°C 34°
φm Phase marginVI = 10 mV,CL = 20 pF,
f = B1,See Figure 3 –55°C 39°CL = 20 F, See Figure 3
125°C 25°
operating characteristics at specified free-air temperature, V DD = 10 V
PARAMETER TEST CONDITIONS TA
TLC27L4MTLC27L9M UNITA
MIN TYP MAX
25°C 0.05
VIPP = 1 V –55°C 0.06
SR Slew rate at unity gainRL = 1 MΩ,CL 20 pF
125°C 0.03V/µsSR Slew rate at unity gain CL = 20 pF,
See Figure 1 25°C 0.04V/µs
See Figure 1VIPP = 5.5 V –55°C 0.06
125°C 0.03
Vn Equivalent input noise voltagef = 1 kHz,See Figure 2
RS = 20 Ω,25°C 70 nV/√Hz
V V C 20 F25°C 1
BOM Maximum output-swing bandwidthVO = VOH,RL = 1 MΩ
CL = 20 pF,See Figure 1
–55°C 1.5 kHzRL = 1 MΩ, See Figure 1
125°C 0.7
V 10 V C 20 F25°C 110
B1 Unity-gain bandwidthVI = 10 mV, See Figure 3
CL = 20 pF,–55°C 165 kHz
See Figure 3125°C 70
V 10 mV f B25°C 38°
φm Phase marginVI = 10 mV,CL = 20 PF,
f = B1,See Figure 3 –55°C 43°CL = 20 PF, See Figure 3
125°C 29°
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
operating characteristics, V DD = 5 V, TA = 25°C
PARAMETER TEST CONDITIONSTLC27L4Y
UNITPARAMETER TEST CONDITIONSMIN TYP MAX
UNIT
SR Slew rate at unity gainRL = 1 MΩ,CL = 20 pF
VIPP = 1 V 0.03V/µsSR Slew rate at unity gain CL = 20 pF,
See Figure 1 VIPP = 2.5 V 0.03V/µs
Vn Equivalent input noise voltagef = 1 kHz,See Figure 2
RS = 20 Ω,70 nV/√Hz
BOM Maximum output-swing bandwidthVO = VOH,RL = 1 MΩ,
CL = 20 pF,See Figure 1
5 kHz
B1 Unity-gain bandwidthVI = 10 mV, See Figure 3
CL = 20 pF,85 kHz
φm Phase marginVI = 10 mV,CL = 20 pF,
f = B1,See Figure 3
34°
operating characteristics, V DD = 10 V, TA = 25°C
PARAMETER TEST CONDITIONSTLC27L4Y
UNITPARAMETER TEST CONDITIONSMIN TYP MAX
UNIT
SR Slew rate at unity gainRL = 1 MΩ,CL = 20 pF
VIPP = 1 V 0.05V/µsSR Slew rate at unity gain CL = 20 pF,
See Figure 1 VIPP = 5.5 V 0.04V/µs
Vn Equivalent input noise voltagef = 1 kHz,See Figure 2
RS = 20 Ω,70 nV/√Hz
BOM Maximum output-swing bandwidthVO = VOH,RL = 1 MΩ,
CL = 20 pF,See Figure 1
1 kHz
B1 Unity-gain bandwidthVI = 10 mV,See Figure 3
CL = 20 pF,110 kHz
φm Phase marginVI = 10 mV,CL = 20 pF,
f = B1,See Figure 3
38°
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
17POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
single-supply versus split-supply test circuits
Because the TLC27L4 and TLC27L9 are optimized for single-supply operation, circuit configurations used forthe various tests often present some inconvenience since the input signal, in many cases, must be offset fromground. This inconvenience can be avoided by testing the device with split supplies and the output load tied tothe negative rail. A comparison of single-supply versus split-supply test circuits is shown below. The use of eithercircuit gives the same result.
–
+
VDD
CL RL
VOVI VI
VO
RLCL
–
+
VDD+
VDD–(a) SINGLE SUPPLY (b) SPLIT SUPPLY
Figure 1. Unity-Gain Amplifier
VDD
–
+
VDD+
–
+1/2 VDD
20 Ω
VO
2 kΩ
20 Ω
VDD–
20 Ω 20 Ω
2 kΩ
VO
(b) SPLIT SUPPLY(a) SINGLE SUPPLY
Figure 2. Noise-Test Circuit
VDD
–
+
10 kΩ
VO
100 Ω
CL
1/2 VDD
VIVI
CL
100 Ω
VO
10 kΩ
–
+
VDD+
VDD–
(b) SPLIT SUPPLY(a) SINGLE SUPPLY
Figure 3. Gain-of-100 Inverting Amplifier
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
input bias current
Because of the high input impedance of the TLC27L4 and TLC27L9 operational amplifiers, attempts to measurethe input bias current can result in erroneous readings. The bias current at normal room ambient temperatureis typically less than 1 pA, a value that is easily exceeded by leakages on the test socket. Two suggestions areoffered to avoid erroneous measurements:
1. Isolate the device from other potential leakage sources. Use a grounded shield around and between thedevice inputs (see Figure 4). Leakages that would otherwise flow to the inputs are shunted away.
2. Compensate for the leakage of the test socket by actually performing an input bias current test (usinga picoammeter) with no device in the test socket. The actual input bias current can then be calculatedby subtracting the open-socket leakage readings from the readings obtained with a device in the testsocket.
One word of caution: many automatic testers as well as some bench-top operational amplifier testers use theservo-loop technique with a resistor in series with the device input to measure the input bias current (the voltagedrop across the series resistor is measured and the bias current is calculated). This method requires that adevice be inserted into the test socket to obtain a correct reading; therefore, an open-socket reading is notfeasible using this method.
V = VIC
148
17
Figure 4. Isolation Metal Around Device Inputs (J and N packages)
low-level output voltage
To obtain low-supply-voltage operation, some compromise was necessary in the input stage. This compromiseresults in the device low-level output being dependent on both the common-mode input voltage level as wellas the differential input voltage level. When attempting to correlate low-level output readings with those quotedin the electrical specifications, these two conditions should be observed. If conditions other than these are tobe used, please refer to Figures 14 through 19 in the Typical Characteristics of this data sheet.
input offset voltage temperature coefficient
Erroneous readings often result from attempts to measure temperature coefficient of input offset voltage. Thisparameter is actually a calculation using input offset voltage measurements obtained at two differenttemperatures. When one (or both) of the temperatures is below freezing, moisture can collect on both the deviceand the test socket. This moisture results in leakage and contact resistance, which can cause erroneous inputoffset voltage readings. The isolation techniques previously mentioned have no effect on the leakage since themoisture also covers the isolation metal itself, thereby rendering it useless. It is suggested that thesemeasurements be performed at temperatures above freezing to minimize error.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
19POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
full-power response
Full-power response, the frequency above which the operational amplifier slew rate limits the output voltageswing, is often specified two ways: full-linear response and full-peak response. The full-linear response isgenerally measured by monitoring the distortion level of the output while increasing the frequency of a sinusoidalinput signal until the maximum frequency is found above which the output contains significant distortion. Thefull-peak response is defined as the maximum output frequency, without regard to distortion, above which fullpeak-to-peak output swing cannot be maintained.
Because there is no industry-wide accepted value for significant distortion, the full-peak response is specifiedin this data sheet and is measured using the circuit of Figure 1. The initial setup involves the use of a sinusoidalinput to determine the maximum peak-to-peak output of the device (the amplitude of the sinusoidal wave isincreased until clipping occurs). The sinusoidal wave is then replaced with a square wave of the sameamplitude. The frequency is then increased until the maximum peak-to-peak output can no longer be maintained(Figure 5). A square wave is used to allow a more accurate determination of the point at which the maximumpeak-to-peak output is reached.
(a) f = 100 Hz (b) B OM > f > 100 Hz (c) f = B OM (d) f > B OM
Figure 5. Full-Power-Response Output Signal
test time
Inadequate test time is a frequent problem, especially when testing CMOS devices in a high-volume,short-test-time environment. Internal capacitances are inherently higher in CMOS than in bipolar and BiFETdevices and require longer test times than their bipolar and BiFET counterparts. The problem becomes morepronounced with reduced supply levels and lower temperatures.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
20 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
VIO Input offset voltage Distribution 6, 7
αVIO Temperature coefficient Distribution 8, 9
vs High-level output current 10, 11VOH High-level output voltage
gvs Supply voltage
,12OH g g g
vs Free-air temperature 13
vs Common-mode input voltage 14, 15
VOL Low level output voltage
vs Common mode in ut voltagevs Differential input voltage
14, 1516
VOL Low-level output voltageg
vs Free-air temperature 17vs Low-level output current 18, 19
vs Supply voltage 20AVD Differential voltage amplification
y gvs Free-air temperature 21VD gvs Frequency 32, 33
IIB / IIO Input bias and input offset current vs Free-air temperature 22
VIC Common-mode input voltage vs Supply voltage 23
IDD Supply currentvs Supply voltage 24
IDD Supply currenty g
vs Free-air temperature 25
SR Slew ratevs Supply voltage 26
SR Slew ratey g
vs Free-air temperature 27
Normalized slew rate vs Free-air temperature 28
VO(PP) Maximum peak-to-peak output voltage vs Frequency 29
B1 Unity gain bandwidthvs Free-air temperature 30
B1 Unity-gain bandwidthvs Supply voltage 31
φvs Supply voltage 34
φm Phase marginy g
vs Free-air temperature 35m gvs Capacitive loads 36
Vn Equivalent input noise voltage vs Frequency 37
φ Phase shift vs Frequency 32, 33
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
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21POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 6
–50
Per
cent
age
of U
nits
– %
VIO – Input Offset Voltage – mV5
70
–4 –3 –2 –1 0 1 2 3 4
10
20
30
40
50
60
905 Amplifiers Tested From 6 Wafer LotsVDD = 5 VTA = 25°CN Package
DISTRIBUTION OF TLC27L4INPUT OFFSET VOLTAGE
Figure 7
N PackageTA = 25°CVDD = 10 V905 Amplifiers Tested From 6 Wafer Lots
60
50
40
30
20
10
43210–1–2–3–4
70
5VIO – Input Offset Voltage – mV
Per
cent
age
of U
nits
– %
0–5
DISTRIBUTION OF TLC27L4INPUT OFFSET VOLTAGE
Figure 8
(1) 12.1 µV/°C(1) 19.2 µV/°COutliers:N PackageTA = 25°C to 125°CVDD = 5 V356 Amplifiers Tested From 8 Wafer Lots
60
50
40
30
20
10
86420–2–4–6–8
70
10αVIO – Temperature Coefficient – µV/°C
Per
cent
age
of U
nits
– %
0–10
DISTRIBUTION OF TLC27L4 AND TLC27L9INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
Figure 9
–100
Per
cent
age
of U
nits
– %
αVIO – Temperature Coefficient – µV/°C10
70
–8 –6 –4 –2 0 2 4 6 8
10
20
30
40
50
60
356 Amplifiers Tested From 6 Wafer LotsVDD = 10 VTA = 25°C to 125°CN PackageOutliers:(1) 18.7 µV/°C(1) 11.6 µV/°C
DISTRIBUTION OF TLC27L4 AND TLC27L9INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
22 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS †
Figure 10
00
IOH – High-Level Output Current – mA–10
5
–2 –4 –6 –8
1
2
3
4
VID = 100 mVTA = 25°C
VDD = 5 V
VDD = 3 V
VDD = 4 V
HIGH-LEVEL OUTPUT VOLTAGEvs
HIGH-LEVEL OUTPUT CURRENT
– H
igh-
Leve
l Out
put V
olta
ge –
VV O
H
Figure 11
00
IOH – High-Level Output Current – mA–40
16
–10 –20 –30
2
4
6
8
10
12
14 TA = 25°CVID = 100 mV
VDD = 16 V
VDD = 10 V
HIGH-LEVEL OUTPUT VOLTAGEvs
HIGH-LEVEL OUTPUT CURRENT
– H
igh-
Leve
l Out
put V
olta
ge –
VV O
H
–35–5 –15 –25
Figure 12
0VDD – Supply Voltage – V
162 4 6 8 10 12 14
14
12
10
8
6
4
2
16
0
VID = 100 mVRL = 1 MΩTA = 25°C
HIGH-LEVEL OUTPUT VOLTAGEvs
SUPPLY VOLTAGE
– H
igh-
Leve
l Out
put V
olta
ge –
VV O
H
Figure 13
VDD –1.7
VDD –1.8
VDD –1.9
VDD –2
VDD –2.1
VDD –2.2
VDD –2.3
1007550250–25–50
VDD –1.6
125TA – Free-Air Temperature – °C
VDD –2.4–75
IOH = –5 mAVID = 100 mV
VDD = 5 V
VDD = 10 V
HIGH-LEVEL OUTPUT VOLTAGEvs
FREE-AIR TEMPERATURE
– H
igh-
Leve
l Out
put V
olta
ge –
VV O
H
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
23POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS †
Figure 14
0300
– Lo
w-L
evel
Out
put V
olta
ge –
mV
VIC – Common-Mode Input Voltage – V4
700
1 2 3
400
500
600TA = 25°CIOL = 5 mAVDD = 5 V
VID = –100 mV
VID = –1 V
LOW-LEVEL OUTPUT VOLTAGEvs
COMMON-MODE INPUT VOLTAGE
VO
L
350
450
550
650
0.5 1.5 2.5 3.5
Figure 15
2500
VIC – Common-Mode Input Voltage – V
300
350
400
450
500
2 4 6 8 10
VDD = 10 VIOL = 5 mA
TA = 25°C
VID = –1 V
VID = –2.5 V
VID = –100 mV
LOW-LEVEL OUTPUT VOLTAGEvs
COMMON-MODE INPUT VOLTAGE
– Lo
w-L
evel
Out
put V
olta
ge –
mV
VO
L71 3 5 9
Figure 16
LOW-LEVEL OUTPUT VOLTAGEvs
DIFFERENTIAL INPUT VOLTAGE
0VID – Differential Input Voltage – V
–10–2 –4 –6 –8
800
700
600
500
400
300
200
100
0
IOL = 5 mAVIC = |VID/2 |TA = 25°C
VDD = 5 V
VDD = 10 V
– Lo
w-L
evel
Out
put V
olta
ge –
mV
VO
L
Figure 17
LOW-LEVEL OUTPUT VOLTAGEvs
FREE-AIR TEMPERATURE
–750
125
900
–50 –25 0 25 50 75 100
100
200
300
400
500
600
700
800
VIC = 0.5 VVID = –1 VIOL = 5 mA
VDD = 5 V
VDD = 10 V
TA – Free-Air Temperature – °C
– Lo
w-L
evel
Out
put V
olta
ge –
mV
V OL
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
24 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS †
Figure 18
0IOL – Low-Level Output Current – mA
1
80
1 2 3 4 5 6 7
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9VID = –1 VVIC = 0.5 VTA = 25°C
VDD = 3 V
VDD = 4 V
VDD = 5 V
LOW-LEVEL OUTPUT VOLTAGEvs
LOW-LEVEL OUTPUT CURRENT
– Lo
w-L
evel
Out
put V
olta
ge –
VV
OL
Figure 19
0IOL – Low-Level Output Current – mA
3
300
5 10 15 20 25
0.5
1
1.5
2
2.5TA = 25°CVIC = 0.5 V
VID = –1 V
VDD = 10 V
VDD = 16 V
LOW-LEVEL OUTPUT VOLTAGEvs
LOW-LEVEL OUTPUT CURRENT
– Lo
w-L
evel
Out
put V
olta
ge –
VV
OL
Figure 20
0VDD – Supply Voltage – V
2000
02 4 6 8 10 12 14
200
400
600
800
1000
1200
1400
1600
1800 RL = 1 MΩTA = –55°C
TA = –40°C
TA = 0°C
TA = 25°C
TA = 70°C
TA = 85°C
TA = 125°C
LARGE-SIGNALDIFFERENTIAL VOLTAGE AMPLIFICATION
vsSUPPLY VOLTAGE
AV
D –
Lar
ge-S
igna
l Diff
eren
tial
ÁÁÁÁ
AV
DVo
ltage
Am
plifi
catio
n –
V/m
V
16
Figure 21
1007550250–25–500
125TA – Free-Air Temperature – °C
–75
RL = 1 MΩ
VDD = 5 V
VDD = 10 V
1800
1600
1400
1200
1000
800
600
400
200
2000
LARGE-SIGNALDIFFERENTIAL VOLTAGE AMPLIFICATION
vsFREE-AIR TEMPERATURE
AV
D –
Lar
ge-S
igna
l Diff
eren
tial
ÁÁÁÁÁÁ
AV
DVo
ltage
Am
plifi
catio
n –
V/m
V
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
25POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS †
Figure 22
0.1125
10000
45 65 85 105
1
10
100
1000
25TA – Free-Air Temperature – °C
VDD = 10 VVIC = 5 VSee Note A
IIB
IIO
INPUT BIAS CURRENT AND INPUT OFFSET CURRENTvs
FREE-AIR TEMPERATURE
– In
put B
ias
and
Offs
et C
urre
nts
– pA
I IB
I IO
and
NOTE A: The typical values of input bias current and input offsetcurrent below 5 pA were determined mathematically.
Figure 23
0VDD – Supply Voltage – V
16
160
2 4 6 8 10 12 14
2
4
6
8
10
12
14TA = 25°C
COMMON-MODEINPUT VOLTAGE POSITIVE LIMIT
vsSUPPLY VOLTAGE
ICV
– C
omm
on-M
ode
Inpu
t Vol
tage
– V
Figure 24
No LoadVO = VDD/2
0VDD – Supply Voltage – V
180
160
2 4 6 8 10 12 14
20
40
60
80
100
120
140
160
ÌÌÌÌÌÌÌÌ
TA = –40°C
SUPPLY CURRENTvs
SUPPLY VOLTAGE
– S
uppl
y C
urre
nt –
I D
DA
µ
ÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌ
TA = 0°CTA = 25°CTA = 70°C
TA = 125°C
ÌÌÌÌÌÌÌÌ
TA = –55°C
Figure 25
VO = VDD/2No Load
VDD = 10 V
VDD = 5 V
–75TA – Free-Air Temperature – °C
120
1250
–50 –25 0 25 50 75 100
20
40
60
80
100
SUPPLY CURRENTvs
FREE-AIR TEMPERATURE
– S
uppl
y C
urre
nt –
I D
DA
µ
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
26 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS †
Figure 26
CL = 20 pFRL = 1 mΩVIPP = 1 VAV = 1
See Figure 1TA = 25°C
0VDD – Supply Voltage – V
0.07
160.00
2 4 6 8 10 12 14
0.01
0.02
0.03
0.04
0.05
0.06
SLEW RATEvs
SUPPLY VOLTAGE
µsS
R –
Sle
w R
ate
– V
/
Figure 27
VIPP = 5.5 VVDD = 10 V
VDD = 5 VVIPP = 1 V
VDD = 5 VVIPP = 2.5 V
VDD = 10 VVIPP = 1 V
–75TA – Free-Air Temperature – °C
0.07
1250.00
–50 –25 0 25 50 75 100
0.01
0.02
0.03
0.04
0.05
0.06CL = 20 pFRL = 1 MΩ
See Figure 1AV = 1
SLEW RATEvs
FREE-AIR TEMPERATURE
µsS
R –
Sle
w R
ate
– V
/
Figure 28
–75
Nor
mal
ized
Sle
w R
ate
TA – Free-Air Temperature – °C
1.4
1250.5
–50 –25 0 25 50 75 100
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3AV = 1VIPP = 1 VRL = 1 MΩCL = 20 pF
VDD = 10 V
VDD = 5 V
NORMALIZED SLEW RATEvs
FREE-AIR TEMPERATURE
Figure 29
0.1f – Frequency – kHz
10
1000
1
2
3
4
5
6
7
8
9
1 10
VDD = 10 V
VDD = 5 V
See Figure 1RL = 1 MΩ
TA = 125°CTA = 25°CTA = –55°C
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGEvs
FREQUENCY
– M
axim
um P
eak-
to-P
eak
Out
put V
olta
ge –
VV O
(PP
)
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
27POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS †
Figure 30
VDD = 5 V
VI = 10 mVCL = 20 pF
See Figure 3
–75TA – Free-Air Temperature – °C
150
12530
–50 –25 0 25 50 75 100
50
70
90
110
130
UNITY-GAIN BANDWIDTHvs
FREE-AIR TEMPERATURE
– U
nity
-Gai
n B
andw
idth
– k
Hz
B1
Figure 31
0VDD – Supply Voltage – V
140
1650
2 4 6 8 10 12 14
60
70
80
90
100
110
120
130
See Figure 3TA = 25°CCL = 20 pFVI = 10 mV
UNITY-GAIN BANDWIDTHvs
SUPPLY VOLTAGE
– U
nity
-Gai
n B
andw
idth
– k
Hz
B1
1f – Frequency – Hz
1 M0.1
10 100 1 k 10 k 100 k
1
101
102
103
104
105
106
150°
120°
90°
60°
30°
0°
180°
TA = 25°CRL = 1 MΩVDD = 5 V
AVD
Phase Shift
107
LARGE-SIGNAL DIFFERENTIAL VOLTAGEAMPLIFICATION AND PHASE SHIFT
vsFREQUENCY
Pha
se S
hift
AV
D –
Lar
ge-S
igna
l Diff
eren
tial
ÁÁÁÁÁÁ
AV
DVo
ltage
Am
plifi
catio
n
Figure 32
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
28 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS †
Phase Shift
AVD
VDD = 10 VRL = 1 MΩTA = 25°C
180°
0°
30°
60°
90°
120°
150°
106
105
104
103
102
101
1
100 k10 k1 k100100.1
1 Mf – Frequency – Hz
1
107
LARGE-SIGNAL DIFFERENTIAL VOLTAGEAMPLIFICATION AND PHASE SHIFT
vsFREQUENCY
Pha
se S
hift
AV
D –
Lar
ge-S
igna
l Diff
eren
tial
ÁÁÁ
AV
DVo
ltage
Am
plifi
catio
n
Figure 33
Figure 34
0VDD – Supply Voltage – V
42°
1630°
2 4 6 8 10 12 14
32°
34°
36°
38°
40°
See Figure 3
VI = 10 mV
TA = 25°CCL = 20 pF
PHASE MARGINvs
SUPPLY VOLTAGE
– P
hase
Mar
gin
φ m
Figure 35
See Figure 3
VI = 10 mVCL = 20 pF
VDD = 5 mV
–75TA – Free-Air Temperature – °C
40°
12520°
–50 –25 0 25 50 75 100
24°
28°
32°
36°
PHASE MARGINvs
FREE-AIR TEMPERATURE
– P
hase
Mar
gin
φ m
30°
34°
38°
26°
22°
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
29POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 36
VDD = 5 mV
TA = 25°CSee Figure 3
VI = 10 mV
0CL – Capacitive Load – pF
37°
10025°
20 40 60 80
27°
29°
31°
33°
35°
PHASE MARGINvs
CAPACITIVE LOAD
– P
hase
Mar
gin
φ m
Figure 37
See Figure 2TA = 25°CRS = 20 ΩVDD = 5 V
1f – Frequency – Hz
200
10000
25
50
75
100
125
150
175
10 100
EQUIVALENT INPUT NOISE VOLTAGEvs
FREQUENCY
– E
quiv
alen
t Inp
ut N
oise
Vol
tage
–nV
/H
zV
n
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
30 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
single-supply operation
While the TLC27L4 and TLC27L9 perform well using dual power supplies (also called balanced or splitsupplies), the design is optimized for single-supply operation. This design includes an input common-modevoltage range that encompasses ground as well as an output voltage range that pulls down to ground. Thesupply voltage range extends down to 3 V (C-suffix types), thus allowing operation with supply levels commonlyavailable for TTL and HCMOS; however, for maximum dynamic range, 16-V single-supply operation isrecommended.
Many single-supply applications require that a voltage be applied to one input to establish a reference level thatis above ground. A resistive voltage divider is usually sufficient to establish this reference level (see Figure 38).The low input bias current of the TLC27L4 and TLC27L9 permits the use of very large resistive values toimplement the voltage divider, thus minimizing power consumption.
The TLC27L4 and TLC27L9 work well in conjunction with digital logic; however, when powering both lineardevices and digital logic from the same power supply, the following precautions are recommended:
1. Power the linear devices from separate bypassed supply lines (see Figure 39); otherwise, the lineardevice supply rails can fluctuate due to voltage drops caused by high switching currents in the digitallogic.
2. Use proper bypass techniques to reduce the probability of noise-induced errors. Single capacitivedecoupling is often adequate; however, high-frequency applications may require RC decoupling.
R4
VO
VDD
R2R1
VI
VREFR3 C
0.01 µF
–
+
VREF = VDDR3
R1 + R3
VO = (VREF – VI )R4R2
+ VREF
Figure 38. Inverting Amplifier With Voltage Reference
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
31POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
single-supply operation (continued)
LogicLogicLogic
–
+
–
+
(a) COMMON SUPPLY RAILS
(b) SEPARATE BYPASSED SUPPLY RAILS (preferred)
Logic Logic LogicPowerSupply
PowerSupply
Output
Output
Figure 39. Common Versus Separate Supply Rails
input characteristics
The TLC27L4 and TLC27L9 are specified with a minimum and a maximum input voltage that, if exceeded ateither input, could cause the device to malfunction. Exceeding this specified range is a common problem,especially in single-supply operation. Note that the lower range limit includes the negative rail, while the upperrange limit is specified at VDD – 1 V at TA = 25°C and at VDD – 1.5 V at all other temperatures.
The use of the polysilicon-gate process and the careful input circuit design gives the TLC27L4 and TLC27L9very good input offset voltage drift characteristics relative to conventional metal-gate processes. Offset voltagedrift in CMOS devices is highly influenced by threshold voltage shifts caused by polarization of the phosphorusdopant implanted in the oxide. Placing the phosphorus dopant in a conductor (such as a polysilicon gate)alleviates the polarization problem, thus reducing threshold voltage shifts by more than an order of magnitude.The offset voltage drift with time has been calculated to be typically 0.1 µV/month, including the first month ofoperation.
Because of the extremely high input impedance and resulting low bias current requirements, the TLC27L4 andTLC27L9 are well suited for low-level signal processing; however, leakage currents on printed circuit boardsand sockets can easily exceed bias current requirements and cause a degradation in device performance. Itis good practice to include guard rings around inputs (similar to those of Figure 4 in the Parameter MeasurementInformation section). These guards should be driven from a low-impedance source at the same voltage levelas the common-mode input (see Figure 40).
The inputs of any unused amplifiers should be tied to ground to avoid possible oscillation.
noise performance
The noise specifications in operational amplifier circuits are greatly dependent on the current in the first-stagedifferential amplifier. The low input bias current requirements of the TLC27L4 and TLC27L9 result in a very lownoise current, which is insignificant in most applications. This feature makes the devices especially favorableover bipolar devices when using values of circuit impedance greater than 50 kΩ, since bipolar devices exhibitgreater noise currents.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
32 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
noise performance (continued)
VI
(a) NONINVERTING AMPLIFIER (c) UNITY-GAIN AMPLIFIER
–
+
(b) INVERTING AMPLIFIER
VI
–
+
–
+VIVO VO VO
Figure 40. Guard-Ring Schemes
output characteristics
The output stage of the TLC27L4 and TLC27L9 is designed to sink and source relatively high amounts of current(see typical characteristics). If the output is subjected to a short-circuit condition, this high current capability cancause device damage under certain conditions. Output current capability increases with supply voltage.
All operating characteristics of the TLC27L4 and TLC27L9 were measured using a 20-pF load. The devicesdrive higher capacitive loads; however, as output load capacitance increases, the resulting response poleoccurs at lower frequencies, thereby causing ringing, peaking, or even oscillation (see Figure 41). In manycases, adding a small amount of resistance in series with the load capacitance alleviates the problem.
–
+
2.5 V
VO
CL
–2.5 V
VI
(a) CL = 20 pF, RL = NO LOAD (b) CL = 260 pF, RL = NO LOAD
(c) CL = 310 pF, RL = NO LOAD (d) TEST CIRCUIT
TA = 25°Cf = 1 kHzVIPP = 1 V
Figure 41. Effect of Capacitive Loads and Test Circuit
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
33POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
output characteristics (continued)
Although the TLC27L4 and TLC27L9 possess excellent high-level output voltage and current capability,methods for boosting this capability are available, if needed. The simplest method involves the use of a pullupresistor (Rb) connected from the output to the positive supply rail (see Figure 42). There are two disadvantagesto the use of this circuit. First, the NMOS pulldown transistor N4 (see equivalent schematic) must sink acomparatively large amount of current. In this circuit, N4 behaves like a linear resistor with an on-resistancebetween approximately 60 Ω and 180 Ω, depending on how hard the operational amplifier input is driven. Withvery low values of RP, a voltage offset from 0 V at the output occurs. Second, pullup resistor RP acts as a drainload to N4 and the gain of the operational amplifier is reduced at output voltage levels where N5 is not supplyingthe output current.
Figure 42. Resistive Pullup to Increase V OH
–
+VI
VDD
RP
VO
R2R1 RL
IP
IF
IL
IP = Pullup currentrequired by theoperational amplifier(typically 500 µA)
Rp =VDD – VOIF + IL + IP
Figure 43. Compensation for Input Capacitance
–
+
C
VO
feedback
Operational amplifier circuits nearly always employ feedback, and since feedback is the first prerequisite foroscillation, some caution is appropriate. Most oscillation problems result from driving capacitive loads(discussed previously) and ignoring stray input capacitance. A small-value capacitor connected in parallel withthe feedback resistor is an effective remedy (see Figure 43). The value of this capacitor is optimized empirically.
electrostatic discharge protection
The TLC27L4 and TLC27L9 incorporate an internal electrostatic discharge (ESD) protection circuit thatprevents functional failures at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015.2. Careshould be exercised, however, when handling these devices, as exposure to ESD may result in the degradationof the device parametric performance. The protection circuit also causes the input bias currents to betemperature dependent and have the characteristics of a reverse-biased diode.
latch-up
Because CMOS devices are susceptible to latch-up due to their inherent parasitic thyristors, the TLC27L4 andTLC27L9 inputs and outputs were designed to withstand –100-mA surge currents without sustaining latch-up;however, techniques should be used to reduce the chance of latch-up whenever possible. Internal protectiondiodes should not, by design, be forward biased. Applied input and output voltage should not exceed the supplyvoltage by more than 300 mV. Care should be exercised when using capacitive coupling on pulse generators.Supply transients should be shunted by the use of decoupling capacitors (0.1 µF typical) located across thesupply rails as close to the device as possible.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
34 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
latch-up (continued)
The current path established if latch-up occurs is usually between the positive supply rail and ground and canbe triggered by surges on the supply lines and/or voltages on either the output or inputs that exceed the supplyvoltage. Once latch-up occurs, the current flow is limited only by the impedance of the power supply and theforward resistance of the parasitic thyristor and usually results in the destruction of the device. The chance oflatch-up occurring increases with increasing temperature and supply voltages.
–
+
–
+
500 kΩ
500 kΩ
5 V
500 kΩ
0.1 µF
500 kΩ
VO2
VO1
1/4TLC27L4
TLC27L41/4
Figure 44. Multivibrator
TLC27L41/4–
+
100 kΩ
VDD
33 kΩ
100 kΩ
100 kΩ
Set
Reset
VO
NOTE: VDD = 5 V to 16 V
Figure 45. Set/Reset Flip-Flop
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
35POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
–
+
VDD
VO
90 kΩ
9 kΩ
X1
11 B
TLC4066
VDD
VI
S1
S2
C
A
C
A2
X22 B
1 kΩ
AnalogSwitch
1/4TLC27L9
SELECT
AV
S1 S210 100
NOTE: VDD = 5 V to 12 V
Figure 46. Amplifier With Digital Gain Selection
–
+
10 kΩ
VO
100 kΩ
VDD
20 kΩVI
1/4TLC27L4
NOTE: VDD = 5 V to 16 V
Figure 47. Full-Wave Rectifier
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
36 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
–
+
5 V
0.016 µF
10 kΩ10 kΩ
VO0.016 µF
VI
1/4TLC27L4
NOTE: Normalized to FC = 1 kHz and RL = 10 kΩ
Figure 48. Two-Pole Low-Pass Butterworth Filter
VIA
VDD
–
+
VIB
R2100 kΩ
10 kΩR1
100 kΩR2
TLC27L91/4
VO
R110 kΩ
NOTE: VDD = 5 V to 16 V
VOR2R1VIB VIA
Figure 49. Difference Amplifier
PACKAGE OPTION ADDENDUM
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Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status(1)
Package Type PackageDrawing
Pins PackageQty
Eco Plan(2)
Lead/Ball Finish(6)
MSL Peak Temp(3)
Op Temp (°C) Device Marking(4/5)
Samples
TLC27L4ACD ACTIVE SOIC D 14 50 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 27L4AC
TLC27L4ACDR ACTIVE SOIC D 14 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 27L4AC
TLC27L4ACN ACTIVE PDIP N 14 25 Green (RoHS& no Sb/Br)
CU NIPDAU N / A for Pkg Type 0 to 70 TLC27L4ACN
TLC27L4ACNE4 ACTIVE PDIP N 14 25 Green (RoHS& no Sb/Br)
CU NIPDAU N / A for Pkg Type 0 to 70 TLC27L4ACN
TLC27L4AID ACTIVE SOIC D 14 50 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 85 27L4AI
TLC27L4AIDG4 ACTIVE SOIC D 14 50 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 85 27L4AI
TLC27L4AIDR ACTIVE SOIC D 14 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 85 27L4AI
TLC27L4AIN ACTIVE PDIP N 14 25 Green (RoHS& no Sb/Br)
CU NIPDAU N / A for Pkg Type -40 to 85 TLC27L4AIN
TLC27L4BCD ACTIVE SOIC D 14 50 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 27L4BC
TLC27L4BCDR ACTIVE SOIC D 14 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 27L4BC
TLC27L4BCN ACTIVE PDIP N 14 25 Green (RoHS& no Sb/Br)
CU NIPDAU N / A for Pkg Type 0 to 70 TLC27L4BCN
TLC27L4BID ACTIVE SOIC D 14 50 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 85 27L4BI
TLC27L4BIDG4 ACTIVE SOIC D 14 50 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 85 27L4BI
TLC27L4BIDR ACTIVE SOIC D 14 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 85 27L4BI
TLC27L4BIDRG4 ACTIVE SOIC D 14 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 85 27L4BI
TLC27L4BIN ACTIVE PDIP N 14 25 Green (RoHS& no Sb/Br)
CU NIPDAU N / A for Pkg Type -40 to 85 TLC27L4BIN
TLC27L4CD ACTIVE SOIC D 14 50 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 TLC27L4C
PACKAGE OPTION ADDENDUM
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Addendum-Page 2
Orderable Device Status(1)
Package Type PackageDrawing
Pins PackageQty
Eco Plan(2)
Lead/Ball Finish(6)
MSL Peak Temp(3)
Op Temp (°C) Device Marking(4/5)
Samples
TLC27L4CDR ACTIVE SOIC D 14 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 TLC27L4C
TLC27L4CN ACTIVE PDIP N 14 25 Green (RoHS& no Sb/Br)
CU NIPDAU N / A for Pkg Type 0 to 70 TLC27L4CN
TLC27L4CNSR ACTIVE SO NS 14 2000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 TLC27L4
TLC27L4CPW ACTIVE TSSOP PW 14 90 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 P27L4C
TLC27L4CPWR ACTIVE TSSOP PW 14 2000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 P27L4C
TLC27L4CPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 P27L4C
TLC27L4ID ACTIVE SOIC D 14 50 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 85 TLC27L4I
TLC27L4IDG4 ACTIVE SOIC D 14 50 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 85 TLC27L4I
TLC27L4IDR ACTIVE SOIC D 14 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 85 TLC27L4I
TLC27L4IN ACTIVE PDIP N 14 25 Green (RoHS& no Sb/Br)
CU NIPDAU N / A for Pkg Type -40 to 85 TLC27L4IN
TLC27L4INE4 ACTIVE PDIP N 14 25 Green (RoHS& no Sb/Br)
CU NIPDAU N / A for Pkg Type -40 to 85 TLC27L4IN
TLC27L4IPW ACTIVE TSSOP PW 14 90 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 85 P27L4I
TLC27L4IPWR ACTIVE TSSOP PW 14 2000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 85 P27L4I
TLC27L4IPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 85 P27L4I
TLC27L9CD ACTIVE SOIC D 14 50 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 TLC27L9C
TLC27L9CDR ACTIVE SOIC D 14 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 TLC27L9C
TLC27L9CDRG4 ACTIVE SOIC D 14 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 TLC27L9C
TLC27L9CN ACTIVE PDIP N 14 25 Green (RoHS& no Sb/Br)
CU NIPDAU N / A for Pkg Type 0 to 70 TLC27L9CN
PACKAGE OPTION ADDENDUM
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Addendum-Page 3
Orderable Device Status(1)
Package Type PackageDrawing
Pins PackageQty
Eco Plan(2)
Lead/Ball Finish(6)
MSL Peak Temp(3)
Op Temp (°C) Device Marking(4/5)
Samples
TLC27L9CNSR ACTIVE SO NS 14 2000 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM 0 to 70 TLC27L9
TLC27L9ID ACTIVE SOIC D 14 50 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 85 TLC27L9I
TLC27L9IDG4 ACTIVE SOIC D 14 50 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 85 TLC27L9I
TLC27L9IDR ACTIVE SOIC D 14 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 85 TLC27L9I
TLC27L9IN ACTIVE PDIP N 14 25 Green (RoHS& no Sb/Br)
CU NIPDAU N / A for Pkg Type -40 to 85 TLC27L9IN
(1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substancedo not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI mayreference these types of products as "Pb-Free".RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide basedflame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuationof the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finishvalue exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on informationprovided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
PACKAGE OPTION ADDENDUM
www.ti.com 24-Aug-2018
Addendum-Page 4
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device PackageType
PackageDrawing
Pins SPQ ReelDiameter
(mm)
ReelWidth
W1 (mm)
A0(mm)
B0(mm)
K0(mm)
P1(mm)
W(mm)
Pin1Quadrant
TLC27L4ACDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLC27L4ACDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLC27L4AIDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLC27L4BCDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLC27L4BIDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLC27L4CDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLC27L4CDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLC27L4CNSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1
TLC27L4CPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
TLC27L4IDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLC27L4IPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
TLC27L9CDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLC27L9CNSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1
TLC27L9IDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Jul-2013
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TLC27L4ACDR SOIC D 14 2500 367.0 367.0 38.0
TLC27L4ACDR SOIC D 14 2500 333.2 345.9 28.6
TLC27L4AIDR SOIC D 14 2500 367.0 367.0 38.0
TLC27L4BCDR SOIC D 14 2500 367.0 367.0 38.0
TLC27L4BIDR SOIC D 14 2500 367.0 367.0 38.0
TLC27L4CDR SOIC D 14 2500 367.0 367.0 38.0
TLC27L4CDR SOIC D 14 2500 333.2 345.9 28.6
TLC27L4CNSR SO NS 14 2000 367.0 367.0 38.0
TLC27L4CPWR TSSOP PW 14 2000 367.0 367.0 35.0
TLC27L4IDR SOIC D 14 2500 367.0 367.0 38.0
TLC27L4IPWR TSSOP PW 14 2000 367.0 367.0 35.0
TLC27L9CDR SOIC D 14 2500 367.0 367.0 38.0
TLC27L9CNSR SO NS 14 2000 367.0 367.0 38.0
TLC27L9IDR SOIC D 14 2500 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Jul-2013
Pack Materials-Page 2
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TLC27L4CN TLC27L4IN TLC27L4ID TLC27L4CD TLC27L4CDR TLC27L4IPW TLC27L4IDR TLC27L4CPWR
TLC27L4CDG4 TLC27L4CDRG4 TLC27L4CNSR TLC27L4CPW TLC27L4CPWG4 TLC27L4CPWRG4
TLC27L4IDG4 TLC27L4IDRG4 TLC27L4INE4 TLC27L4IPWR TLC27L4IPWRG4 TLC27L4CNSG4