Release Notes
HI-TECH PICC-18 STDRelease Notes for Version 9.52
Copyright (C) 2010 HI-TECH Software.All Rights Reserved. Printed in Australia.
PICC-18 is licensed exclusively to HI-TECH Softwareby Microchip Technology Inc.
Produced on: December 7, 2010
HI-TECH Software Pty. Ltd.ACN 002 724 549
45 Colebard Street WestAcacia Ridge QLD 4110
Australia
email: [email protected]: http://microchip.htsoft.com
ftp: ftp://www.htsoft.com
THIS FILE CONTAINS IMPORTANT INFORMATION RELATING TO THIS COMPILER.PLEASE READ IT BEFORE RUNNING THIS SOFTWARE.
3
Chapter 1
Description
This is a minor update release for version 9.51.
1.1 NotesDriver options Please note that version 9.xx compilers have a new command line driver which
accepts a different format for options compared with previous versions. Please refer to theuser manual for details on using the command line options. During the transitional period, thenew command line driver will accept the old-style options, but this should not be relied uponfor future versions.
HI-TIDE If using this version of the compiler with HI-TIDE, version 3.13 of the IDE is required.HI-TIDE is a free product. If using an older version, there is no charge to update to this versionof HI-TIDE.
MPLAB IDE If using this compiler within MPLAB IDE, select HI-TECH Universal Toolsuite asyour language toolsuite. The same universal toolsuite can be used to drive other version9.xx HI-TECH Software C compilers. It is not neccessary to change or modify the lan-guage toolsuite if a project changes to a chip supported by a different HI-TECH Softwarecompiler (eg. moving from a PIC16Fxxx to PIC18Fxxx to PIC24FJxxx). The universaltoolsuite manages this change and automatically selects that appropriate compiler for eachdevice. If multiple versions of the same compiler are installed on the one machine, selec-tion of which version to use for a particular build can be made on the driver tab of theproject settings. The HI-TECH Universal Toolsuite included with this installer is version 1.23.The latest version of the toolsuite can be downloaded from our MPLAB Integration webpagehttp://microchip.htsoft.com/support/mplab.php.
4
Description Previous Versions
1.2 Previous VersionsVersion 9.51PL2 was released on the 5th of August 2008.Version 9.51PL1 was released on the 21st of February 2008.Version 9.51 was released on the 2nd of November 2007.Version 9.50PL3 was released on the 4th of December 2006.Version 9.50PL2 was released on the 10th of October 2006.Version 9.50PL1 was released on the 23rd of March 2006.Version 9.50 was released on the 3rd of February 2006.
1.3 Support patchesSupport Patches are intermediate component updates which may be available from time to timeproviding fixes to reported bugs or additional device support. These patches can be made availablein a timely manner, but may not have been subjected to the same level of testing as a Patch LevelRelease, or Base Release product.
Support Patches can be downloaded from this compiler’s Known issues section of our on-linesupport forums http://forum.htsoft.com/. Note that the Known issues area will only becomeaccessible to members once they are logged in.
5
Chapter 2
New Features
The following are new features the compiler now supports. The version number in brackets indicatesthe first compiler version to support the feature.
2.1 GeneralNew Processors (9.52) The following devices are now supported: 18F23K22, 18F24K22, 18F25K22,18F25K80, 18F26J13, 18F26J53, 18F26K22, 18F26K80, 18F27J13, 18F27J53, 18F43K22, 18F44K22,18F45K22, 18F45K80, 18F46J13, 18F46J53, 18F46K22, 18F46K80, 18F47J13, 18F47J53, 18F65K22,18F65K80, 18F65K90, 18F66K22, 18F66K80, 18F66K90, 18F67K22, 18F67K90, 18F85K22, 18F85K90,18F86J72, 18F86K22, 18F86K90, 18F87J72, 18LF23K22, 18LF24K22, 18LF25K22, 18LF25K80,18LF26J13, 18LF26J53, 18LF26K22, 18LF26K80, 18LF27J13, 18LF27J53, 18LF43K22, 18LF44K22,18LF45K22, 18LF45K80, 18LF46J13, 18LF46J53, 18LF46K22, 18LF46K80, 18LF47J13, 18LF47J53and 18LF65K80.
New Processors (9.51PL3) The following devices are now supported: 18F13K20, 18F13K22, 18F14K20,18F14K22, 18F24J11, 18F24J50, 18F25J11, 18F25J50, 18F26J50, 18F44J11, 18F44J50, 18F45J11,18F45J50, 18F46J50. 18F66J90, 18F66J93, 18F67J90, 18J67J93, 18F86J90, 18F86J93, 18F87J90,18F87J93, 18F87K22, 18F87K90, 18LF13K22, 18LF13K50, 18LF14K22, 19LF14K50, 18LF24J10,18LF24J11, 18LF24J50, 18LF25J10, 18LF25J11, 18LF25J50, 18LF26J11, 18LF26J50, 18LF44J10,18LF44J11, 18LF44J50, 18LF45J10, 18LF45J11, 18LF45J50, 18LF46J11 and 18LF46J50
New Processors (9.51PL2) This version adds support for the PIC18F13K50 and PIC18F14K50devices.
6
New Features Driver
Windows Vista64 support (9.51PL1) This release adds support for installation on the 64 bit ver-sion of Microsoft Windows Vista operating system.
Windows Vista support (9.51) This release adds support for installation on the 32 bit version ofMicrosoft Windows Vista operating system (Vista 64 bit version not yet supported).
Microchip MPLAB plug-in (9.51) Windows versions of the compiler now ships with and installsa plug-in for the Microchip MPLAB IDE. This enables the IDE to support the features of thiscompiler more accurately. It is recommended to close MPLAB IDE during the installationof the compiler. The plug-in installation is silent and once the compiler has been installed,you will now be able to select HI-TECH Universal Toolsuite as your toolsuite within MPLABIDE.
New Processors (9.51) This version adds support for the processors: 18F23K20, 18F2458, 18F24K20,18F2553, 18F25K20, 18F26K20, 18F43K20, 18F4458, 18F44K20, 18F4553, 18F45K20,18F46K20, 18F65J50, 18F66J11, 18F66J16, 18F66J50, 18F66J55, 18F67J11, 18F67J50, 18F85J50,18F86J11, 18F86J16, 18F86J50, 18F86J55, 18F87J11, 18F87J50, 18F6393, 18F6493, 18F8393and 18F8493.
2.2 DriverNew option –RUNTIME=+download (9.51) The Intel hex file that is generated when this option is
used will be conditioned in a way that is preferred by bootloaders. This option is recommendedif the application being built is expected to be downloadable by bootloader.
New option –RUNTIME=+ramtest (9.51) If this option is specified, the driver-generated runtimestartup code will include a built-in RAM integrity test. The test can be customized and will beexecuted before RAM is initialized.
New option –RUNTIME=+checksum (9.51) This mode is enabled by default and can be disabledusing --RUNTIME=-checksum. When this mode is enabled, and /dname’s --checksum optionis used, the generated runtime startup code will include built-in verification of that checksum.The checksum will have been verified prior to entering the main function. If the built-inchecksum verification is unwanted (ie. you prefer to use your own verification routine), it canbe disabled. If the --checksum option is not used, no additional code will be imported intothe startup routine.
New option –CALLGRAPH (9.51) This option allows control over the level of information that isdisplayed in the call graph section of the map file.
7
New Features Hexmate
New symbol definition _HTC_EDITION_ (9.51) A new preprocessor symbol is defined by thedriver in all builds. _HTC_EDITION_ will define whether the compiler building this programis a PRO, STD or Lite edition. The value of _HTC_EDITION_ can be compared with sym-bols __PRO__, __STD__ or __LITE__ which are defined in htc.h. This facilitates conditionalcompilation of code based on which compiler technology is used.
2.3 Hexmate-FIND,DELETE (9.51PL1) Similar to -FIND,REPLACE but will remove sequences that match
the given conditions. This option should be used with extreme caution and is intended to aidstatistical analysis of hex images.
-SIZE option (9.51PL1) This option will return the size (in bytes) contained in data records in ahex image.
-STRPACK option (9.51PL1) This option was now been enabled to compress and store characterpairs of a string in a 14 bit wide program space. This feature, however is not at all useful forthis compiler.
-BREAK=address_list option (9.51) This option will cause a continuous stream of data to termi-nate and recommence with a new data record beginning at the address(es) specified. This canbe used to create a distinction between adjacent but functionally separable regions of programmemory.
-ADDRESSING=size option (9.51) This option specifes the byte size of each addressable unit thatwill be specified to hexmate on the command line. This permits addresses to be entered ina device’s native addressing mode where that addressing mode is other than byte addressing.The PIC18 architecture does use byte addressing and does not require the use of this option.
2.4 Chip Configuration FileFlash writing with 18F87J10 family (9.51) The ability to write to flash was disabled for this fam-
ily of devices. This feature has now been enabled.
RESETRAM errata (9.51) The RESETRAM errata has now been enabled by default for the 18F6527,18F8527, 18F6622 and 18F8622.
8
New Features Libraries
2.5 LibrariesBuilt-in delay routines (9.51) A simple delay routine is now available through the pre-compiled li-
braries. The recommended interface to this routine is through the macro interface __delay_ms(n)which will delay for the prescribed number of milliseconds. The user should define the pre-processor symbol _XTAL_FREQ with the system oscillator frequency (in Hertz) before usingthis interface.
2.6 Header filesMacro __delay_ms(n) (9.51) This macro interfaces with pre-compiled library delay routines
and will provide a delay for the number of milliseconds specified. The preprocessor symbol_XTAL_FREQ should be defined with the system oscillator frequency (in Hertz) before usingthis interface.
New file usbregs18.h (9.51) This header file creates bitfield definitions for USB endpoints andbuffer descriptors. This file is included by all PICC-18 header files which describe USBrelated PIC18 devices.
2.7 DocumentationArchived release notes (9.51) The release notes for the compiler are used to announce features,
changes and bug fixes introduced since the final patch level release of the previous version ofthe compiler. If upgrading by more than one version, the current release notes do not cover anychanges pertaining to any intermediate versions that have been skipped. If porting an olderproject to a newer version of the compiler, it is important to consult to the current releasenotes and the notes from any intermediate versions to learn of any potential impact on existingprojects. To facilitate this, an archive of release notes are now distributed with the compilerand can be found in the compiler’s docs\release_archives directory.
2.8 HI-TIDE 3C-Wiz: New peripherals (9.51) The standard PIC18 USART has been added to the peripherals
supported by C-Wiz. This does not include support for the enhanced USART.
9
Chapter 3
Changes
3.1 DriverDriver option --CHAR (FUTURE) This option is expected to be discontinued in the the next mi-
nor version update. This option is used to change the signed characteristic of the char typewhen this has not been made explicit in the variable’s definition. It is recommended thatprojects using this option, discontinue the use of this option. If using --char=unsigned,simply drop this option as the undesignated char will default to unsigned in this compiler.If using --char=signed then any undesignated char should be explictly defined as signedchar.
–CHECKSUM option (9.51) By default, the generated startup code now includes a built-in verifi-cation of the checksum specified using the --checksum option. The verification assumes thatthe checksum result will be stored in program memory and not in EEPROM. If the checksumverification fails, the C function called __checksum_failed() is called. The precompiledlibrary contains a simple implementation of this routine, which is expected to be replaced by acustom version. The automatic --checksum verification can be disabled by adding the driveroption --runtime=-checksum.
–CHECKSUM option (9.51) By default, this option will now prefill unused memory locationswithin the range of calculation with value FFh. This will avoid a warning and will ensure morereliable runtime verification of the checksum. This prefilling will not occur if the --FILL op-tion is also specified to the driver. This is allows specification of a custom value or instructionto fill the unused locations.
–RUNTIME=+stack sub-option (9.51) The stack sub-option to --runtime had no effect in this
10
Changes Assembler
compiler and has now been removed.
–MAPFILE option (9.51) This option has now been removed. Previously --mapfile and -m<filename>both existed and performed the same function. To reduce confusion, now only the -m<filename>variant exists.
3.2 AssemblerObject file format (9.51) The object file format has changed since version 9.50 (which used version
3.7). The new object file version is 3.8. The consequence of this is an object file compiled fromthe version 9.51 toolsuite cannot be linked by the version 9.50 (or prior) toolsuite. Howeverobjects compiled by a version 9.50 toolsuite can be linked by the 9.51 toolsuite. If you aredistributing objects or library files containing objects compiled by the version 9.51 compiler,be aware that if your customers are using a lesser version of the toolsuite they may also needto obtain an updated linker.
3.3 Header filesConfiguration bit macro (9.51PL3) The way how the configurations bits are programmed has changed.
So now you can’t use the litteral value of the word you want to program in the __CONFIGmacro. You need to use the configuration words defined in the header file of the device se-lected.
pic18fxx22.h (9.51PL1) Added alternate definitions for SFR bits SSP1IE/F/P and BCL1IE/F/Pwithout the numeric identifier to allow code compatibility with older devices.
Microchip errata changes (9.51) Recent Microchip errata documents have noted additional SFRbits and changes to existing SFR bits. The files affected by this change are: pic18f2x1x.h,pic18f4520.h, pic18f4523.h, pic18f4620.h, pic18f85j90.hOld definitions have been retained for backwards compatibility.
Errata definitions (9.51) The symbols defined in errata.h were defined in an enumeration. Thesesymbols are now defined using preprocessor #defines so that the become visible at the prepro-cessor level as well.
READTIMERx macros (9.51) The macros, READTIMER0, READTIMER1 and READTIMER3 (definedin pic18.h) are now called READTIMER0(), READTIMER1() and READTIMER3().
11
Changes Demo files
3.4 Demo filesDelay sample (9.51PL2) The preprocessor symbol to define the system frequency, XTAL_FREQ
has now been deprecated. The symbol to use in its place is _XTAL_FREQ. The old symbol isat this time still accepted will produce a warning.
Delay sample (9.51) The sample which provides the DelayMs() function has been updated to usethe new __delay_ms() routine as it is easier to use and more accurate over a greater range ofoscillator frequencies.
Checksum sample (9.51) As the checksum verification process is now built-in, this sample codeis now deprecated. It will still exist for a time for backwards compatibility with any existingprojects that are reliant on this source.
Flash storage example (9.51) The example which demonstrated using flash memory for non-volatilestorage has been updated to use the library functions that come with the compiler.
3.5 ObjtohexUpper address zero initialization (9.50PL1) Objtohex previously generated an extended address
record at the beginning of the hex file, even if the upper address value was zero. This func-tionality has been reverted. Unless running Objtohex directly, this change will be irrelevant asHexmate post-processes the Objtohex output anyway.
12
Chapter 4
Limitations
4.1 ParserMissing parenthesis not detected A missing end parenthesis is not detected in variable declara-
tions when the variable is type cast. For example,
static char C @ ((unsigned)&PORTA;
This problem does not appear to affect any output code, but may cause problems when usingthird-party software tools.
Qualified arrays generate error The compiler generates an error when compiling complicatedqualified arrays, e.g.:
const char * const * const listnames[] = {menu0, menu1};
The error is not issued if the array is not qualified, or for arrays of more basic types.
Multiple block variable declaration Functions which have variables declared within multiple blockswhere code within the block requires the use of temporary memory, may get corrupted whencompiled with global optimizations. A workaround is to move the inner variable declarationoutsize of the block.
Structure initialization Locally defined structures cannot be initialized.
Returning structures A function cannot return a copy of structure which resides in ROM.
13
Limitations Preprocessor
Divide-assign/Modulus-assign by over-sized constant Using the /= or %= operators to assign aquotient or remainder to a variable, where the divisor in the operation is a constant valuewhich exceeds the maximum capacity of the resultant data type will parse incorrectly andcould result in an error. If the division and the assignment appear as two separate operators,the problem does not occur. eg.:
unsigned char x; // maximum value for this data type is 255unsigned int y; // maximum value for this data type is 65535x /= 9999; // Div-assign with over-sized constant, result may be in errory /= 9999; // Constant is within capacity of ’y’, will parse correctlyx = x / 9999; // Assignment, division separate, will parse correctly
4.2 PreprocessorSizeof pointers The result of the sizeof preprocessor operator when applied to a pointer will always
return 1. Use of the C sizeof operator will return the correct value.
4.3 Code generatorSFRs at shared addresses Some PIC18 devices locate multiple SFRs at the same address location.
Selection between which SFR is accessible at any time is configured by the ADSHR bit. Atpresent the compiler does not automatically manage the ADSHR state in accordance with SFRaccesses. For now, ADSHR must be managed in user code.
Extended PIC18 instruction set Presently the extended PIC18 instruction set and indexed address-ing mode are not supported by the PICC-18 compiler. If using a device which is equipped withthe extended instruction set, it can be configured for legacy mode (extended instructions dis-abled) with the following configuration setting:__CONFIG(4, XINSTDIS);Other configuration word 4 parameters are inherently ANDed into this directive as required.
16 Bit const pointers and >64K devices If pointing to objects in code space (be they functions orconstant data) on a device that has >64K of program memory, ensure that the object beingpointed to is linked below the 64K address limit. To ensure this, the lowtext psect has beendefined and will only be linked below the 64K boundary. If you are pointing to functions orcalling functions indirectly in –CP=16 mode, move these functions into their own module andassign them to the lowtext psect using the #pragma psect text=lowtext directive. Notethat the library function, printf() involves an indirect function call to the putch() routine.
14
Limitations Code generator
Persistent variables The nvram psect used to store variables declared as persistent should befully contained within one RAM bank. By default the nvram psect will be linked to the upper-most bank of general purpose RAM. If reservations are required within this bank for the ICD2,SFRs or RESRAM option then the default resources for the nvram psect will be less than anentire RAM bank.
Global optimizer The global optimizer should not be used with C code that accesses the TABLPTR,FSR or PROD special function registers. The global optimizer may use these registers for tem-porary variable placement and currently cannot detect the use of these registers in user code.
Functions as arguments to printf The argument list to printf or sprintf should not include functioncalls. For example,
printf(“x = %f, sin(x) = %f\n”, x, sin(x*3.141592/180.0));
This code demonstrates a workaround:
y = sin(x*3.141592/180.0);printf(“x = %f, sin(x) = %f\n”, x, y);
Error on initialization of complex bitfields Any structure using bitfields within a structure or unioncannot be initialized. For example, using the following types where a structure is a memberof a union, initialization of the structure’s bitfields will generate an error.
typedef struct {unsigned b0:1, b1:1, b2:1, b3:1, b4:1, b5:1, b6:1, b7:1
} byte_bits;typedef union {
byte_bits bits;char byte;
} byte_or_bits;
This will generate a compiler error:
byte_or_bits example = { {1,0,1,1,0,1,0,0 } };
Instead, use a single value:
byte_or_bits example = { 0b10110100 };
15
Limitations Libraries
Auto aggregate initialization Variables of an aggregate type with auto storage initialised on def-inition with an initialization list shorter than its number of members will only have thosemembers corresponding in the list initialized. The remaining members in the aggregate willnot be cleared. Example:
void main(void) {int foo[0] = { 42 };...
}
Here foo[0] will be initialised with 42, but the remaining members of foo will not be cleared.
Char to float cast Type casting a char to float may result in lost of sign of the value.
Indirect calls from ISRs Indirect calls made in interrupt service routines to functions that are alsocalled from main-line code may fail. This does not affect direct calls made for an ISR. A warning isnow issued if this situation is encountered.
4.4 LibrariesPrintf with >64K program space If using 16 bit code pointers on a chip with >64K of program
space, ensure that the putch() routine is linked below the 64K address boundary. The easiestway to do this is to use #pragma psect to assign putch() to the lowtext psect.
Floating point accuracy The floating point math routines, despite DBL_MIN being defined as1.17549435E-38, cannot perform operations predictably on numbers below the order of 1e-35.The result is either correct OR zero.
4.5 Linker and psectsLocal/auto variables The total size of data that can be used for function parameters and local/auto
variables at any time cannot exceed the size of a RAM bank. If this limit is exceeded, a“Can’t find ??? words for psect param” error will result. The critical path of function callsthat caused the error can be identified in the call graph section of a map file. An asteriskdenotes a function is on the critical path. Reducing the ammount of local data or parameterspassed through these functions can help rectify this error.
16
Limitations HI-TIDE 3
Global variables Any C module cannot allocate more than 256 bytes of global data. Single dataentities which exceed this limit (eg. large arrays/structures) are excluded. If this limit isexceeded, a “Can’t find ??? words for psect bss” error will result. This can be corrected bymoving some variable declarations to a new module.
Data psect Any program’s data psect cannot exceed 256 bytes in size. This means across the scopeof an entire program up to 256 bytes of data can be initialized through the data psect. Ifthis limit is exceeded, a “Can’t find ??? words for psect data” error will result. Note thereare certain types of variables that will not contribute toward the size of the data psect. Suchvariables include data objects one byte in size or greater than 256 bytes in size, variablesqualified with either const, persistent, near or far and uninitialized variables or variablesinitialized to zero. If you see this error, the solution might be to try and and classify some ofthe program’s initialized global variables into one of the above exemption categories or assignthe initial value at runtime. Be aware that the affects of applying any of the above qualifiersshould be understood before doing so.
4.6 HI-TIDE 3Peripheral simulation HI-TIDE’s device simulation presently includes support for interrupts, Timer0,
Timer1, Timer2, Timer3, Timer4, EEPROM and Flash runtime access. Simulation of otheron-board peripherals and features will be added in subsequent revisions.
C-Wiz “Can’t find pin information” C-Wiz will respond with a warning about not finding pininformation if using some newer PIC18 devices. This warning can be ignored as there willbe no adverse affects to C-Wiz or its generated code for the list of peripherals it currentlysupports.
4.7 Microchip debug limitationsICE2000/4000 Users of the Microchip ICE2000/4000 should be aware of a documented limitation
of these tools concerning side-effects when reading particular SFRs. Reading the followingSFRs can affect a STATUS bit, but due to a limitation of the ICE some general purpose regis-ters will also be affected. Reading from the following SFRs can affect the GPRs as follows:
• PORTB - x81 (081, 181, 281, 391 etc.)
• RCREG1 - xAE
• RCREG2 - x6E
17
Limitations Microchip debug limitations
• PORTD - x83
• SSPBUF - xC9
It is advised to reserve the corresponding locations using a -RESRAM
option (while debugging) if your program reads from the above registers.
More information can be found in MPLAB via the ICE2000/4000 help
topics under Limitations: PIC18XXXX General Limitations.
COF debug limitation For users of MPLAB debugging tools please be aware that due to a lim-itation in the COF debugging format, pointers are assumed to be 16-Bits in length. Thislimitation will mean that 24-Bit pointers (-CP24 enabled) will appear truncated in the variablewatch window. The actual contents of the pointer and program execution are not affected.
18
Chapter 5
Bug Fixes
The following are descriptions of bugs that were present in the previous versions of this compiler,and which have been fixed in this release. Fixes for new bugs which have been reported since therelease of this compiler can be downloaded from the Known issues forum relevant to this compiler.The on-line support forums can be found at http://forum.htsoft.com/. Note that the knownissues section will only become accessable to forum users once they have logged-in.
5.1 GeneralLinux64 Product activation (9.51PL1) Attempting to install and activate this product on a 64 bit
Linux operating system sometimes resulted in a “Floating-point exception”. This has nowbeen fixed.
5.2 Command Line DriverCompiler crash in last 10 days of evaluation (9.51PL3) If the compiler is activated as part of a
45-day evaluation, the compiler may cease to operate during the last 10 days of the evaluationperiod. This has now been corrected.
–FILL ranges (9.51PL1) If the --FILL option was used without specifying an address range andthe --ROM=default,-range was used to exclude a program memory address range, the mem-ory fill may appear in the reserved program memory range.
Checksum verification #1 (9.51PL1) If the range specified in the –checksum option began at anaddress greater or equal to 100h, the built-in verification of that checksum may fail.
19
Bug Fixes Command Line Driver
Checksum verification #2 (9.51PL1) If the last byte of the checksum result was at address FFFFh,the built-in verification of the checksum left the TBLPTRU register with value 01 whichcaused strange behaviour if –CP=16 mode was being used.
Can’t find space for 0 words in FARRAM (9.51PL1) This linker error occurred if project was builtfor a device which can access external program memory, and no external memory had beenadded and the –RAM option was used to reserve a portion of on-chip RAM.
Psect jflash_buffer overlap (9.51PL1) In some projects that use the flash_write() routine, compil-ing for a PIC18FxxJxx device in –CP=16 mode may have generated a message Warning[596]0 : segment "jflash_buffer" (400-7FF) overlaps segment "const" or similar. This has now beencorrected.
Error with –codeoffset > 64K (9.51PL1) If specifying an offset greater than 64K via the --codeoffsetoption resulted in a linker error (498) psect “lowtext” exceeds address limit. The error oc-curred even if the lowtext psect was not in use.
Variable initialization (9.51) In a few circumstances the generated startup code applied an opti-mization which simplified handling of TBLPTR during initialization of variables. It was pos-sible (although incredibly unlikely) that if a project used both –ROM and –RAM options andthe optimization occurred, the initial conditions that permitted the optimization could havebeen invalidated. If this happened, the variables would not have been initialized. This op-timization has been withdrawn and some projects will now gain a few bytes in code size,although this does not indicate that the project was affected by this problem.
Configuration memory summary (9.51) Corrected the calculation for presenting used configura-tion words. The used memory summary indicated only half of the configuation memory thatwas actually being used. The fault was in the presentation only and there was no risk to theactual configuration data.
RESET errata (9.51) Some devices are affected by the RESET errata condition (requiring a NOP atthe reset vector if this location would otherwise contain a GOTO instruction). A GOTO wouldappear at address zero without the preceding NOP if ALL of the following conditions weretrue:
• The program did not define an interrupt function
• The program did not define a custom powerup routine
• The program contained no global variables OR all of the global variables were qualified aspersistent.
20
Bug Fixes Chip Configuration File
Missing symbol __MPLAB_ICD__ (9.51) The manual documented that this preprocessor symbolcould be used for source code to detect whether it is being compiled for the MPLAB ICD2,however, this symbol was not being defined.
Crash on ROMless parts (9.51) If compiling for a ROMless device, the driver will crash if certaincommand line options were specified.
Psect lowtext (9.51) Using the #pragma psect directive to re-assign content from a text psect to thelowtext psect would result in a linker error: Error[484] : psect "lowtext" can’t be in classes"CODE" and "LOWCODE"
Default optimizations (9.51) If the default sub-option was used with –opt, the sub components ofdefault could not be turned off. For example, –opt=default,-asm would not actually turn offassembler optimization.
5.3 Chip Configuration File18F87J11 family (9.51PL1) The RAM range for these devicee included a small section of unim-
plemented memory in bank 15.
18F97J60 ICD2_RAM (9.51) This device family reserved an incorrect RAM memory range whendebugging for the MPLAB ICD2.
5.4 ParserRedeclaration within enum (9.51PL2) The parser would crash when generating an error if an enu-
meration member was redeclared within the same enum.
Parameters to indirectly called functions (9.51PL1) Some details given to the code generator bythe parser were out of sequence causing the code generator to not properly prepare a functionto be called indirectly if the function took more than one byte of parameters.
#Pragma regsused (9.50PL1) The parser was interpretting this pragma incorrectly which resultedin errors (254) unknown function and (335) unknown pragma.
5.5 Code GeneratorNon-deterministic register selection (9.51PL3) Fixed a bug where auto variables could be allo-
cated to inconsistent registers in Windows when global optimization was enabled. Although
21
Bug Fixes Code Generator
the generated code was functionally correct, this may have resulted in non-identical binariesbeing produced when the code was compiled on differing operating systems or on differingWindows installations.
Signed int += unsigned char (9.51PL2) The code generated for signed_int += signed_charwas not correct when these object were not allocated to near memory.
Volatile code optimizations (9.51) There were some instances where the code generator was notproducing the special comment strings needed for the assembler to observe that an assembleroperand was volatile. The absence of these marks could have allowed the assembler to usecertain optimizations that should not be permitted for a volatile variable.
Modulus with power of 2 (9.51) The code generator reduced a modulus operation between a vari-able and a literal value to a logical AND operation if the literal was a power of two. Thisshould only have been permitted if the variable was unsigned, however this reduction wasperformed even for signed variables. This meant that the the result of the modulus would nothave been negated when required.
Bank selection in cond?true:false (9.51) If the ternary operation was used and either the true orfalse conditions required a change in bank, the following code would assume that the bankselection was always taken. This could have resulted in a missing bank selection dependingon the selection needed for the next banked access.
Excessive context save on interrupt (9.51) If building a project using the fast 32 bit floating pointlibraries, an extra byte of data will be saved and restored during ISR context switching. Thismay cause a problem if the program also declares a volatile near global variable and thatvariable is modified during the interrupt service routine and the variable happens to be linkedat the first memory address after the temp psect. If all of these conditions are true, then thechanges to the volatile variable will be reverted upon exit from the ISR.
Sign extending byte (9.51) In a case where a global signed char was added to a global int, the signof the byte was not extended.
Const bitfield (9.51) In some cases where a const bitfield was accessed, an intermediate assignmentselected a banked-access instruction where a common-access instruction was required. Theassignment did not succeed.
Char to float assignment (9.51) An assignment from a char data type to a float data type performedan integral assignment rather than a floating point assignment. The value assigned to the floatwas incorrect.
22
Bug Fixes Assembler
SFR array (9.51) If an array was declared at an absolute address in the upper-common-access bank(ie. overlaying SFRs), accesses to the array did not correctly set the upper byte of the FSR toselect the upper-access-bank.
5.6 AssemblerLong delays when compiling (9.51PL2) If compiling a project for a PIC18 CAN or ECAN device
and requesting an assembler list file to be produced, the build times per source module thatincluded htc.h were observed to increase greatly. If building under MPLAB, the assembler listfile was always requested.
RETFIE optimization (9.51PL2) Potentially the assembler optimizer could have switched a RET-FIE instruction with RETLW. This would have inhibited any further interrupts from occuring.
MOVFF removal (9.51) An optimization exists which removes a repeated and non-essential MOVFFA,B instruction if A and B had not changed between the two MOVFF instructions. This opti-mization did not detect changes to A or B in some circumstances. This could have resulted inthe removal of an essential MOVFF.
Bit-test-skip optimizations on volatiles (9.51) Code where a bit-test-skip instruction tested a volatilelocation and both possible paths from the test-skip ended up in the same location, would havebeen completely optimized away. This optimization should not have been permitted for avolatile variable.
Goto here optimization (9.51) If a GOTO or BRA instruction only advanced the program counterto the next executable address this instruction is usually unnecessary and in many cases wouldhave been removed. This instruction should not be removed however if the instruction preced-ing it was a test-skip instruction. Removing the redundant instruction would cause the nextinstruction to become skipped. The optimizer now considers this and will first try to removethe preceding and possibly ineffectual the test-skip instruction before the the GOTO becomeseligible for optimization.
5.7 Librariesflash_write() on 18FxxJxx devices (9.51PL1) For projects which target PIC18FxxJxx devices that
have more than 64K of on chip program memory and are being built with 24 bit code pointersenabled, it was possible to get the link error, (498) psect “jflash_buffer exceeds” address limit:01FC00h > 07C00h. This error was not required.
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Bug Fixes Cromwell
idloc_read()/idloc_write() (9.51) If either of these functions were called for a PIC18FxxJxx device(which has no ID location memory), a linker error would have resulted claiming that it cannotfind space for psect param. Now a more helpful, undefined symbol error will be produced.
5.8 CromwellExtended instruction set in MPLAB (9.51) If compiling for a PIC18FxxJxx part within the MPLAB
IDE, it was common for the IDE to warn that extended instruction mode had been selectedeven if the project’s configuration selected the legacy instruction set. This was due to an ambi-guity in the Microchip COFF file produced by cromwell which caused MPLAB to not detectthe user’s configuration settings and default to using the enhanced instruction mode.
Common object file format (9.51) When selecting to build a standard COFF file (–output=+cof),cromwell would result in a build failure due to an error (601). Note, the building of a Mi-crochip COFF file was not affected. It is the Microchip COFF file that is required for use inMPLAB etc. Standard COFF is almost never used for this architecture.
5.9 LinkerCrashing on errors (9.50PL1) In some unusual circumstances the linker crashed when attempting
to issue a warning or error message.
5.10 CromwellInvalid array (9.51PL1) If source uses an extern declaration for an array which is defined in an-
other module and the debug file type being generated is COFF (or MCOFF), the descriptionof this array in the debug file may be poor. Debug tools which attempt to display this arraymay fail to do so.
5.11 Hexmate-STRING option (9.51PL1) The -STRING option as shipped with PICC-18 STD version 9.51
stored the wrong string at the wrong address.
24
Bug Fixes Header files
5.12 Header filespic18f85j90.h (9.51PL3) Corrected configuration mask definitions for WDTDIS, INTOSC and EXTOSC.
Assembler headers (9.51PL2) Assembler header files which defined a device’s SFRs and bits wouldredefined some symbols (resulting in an error) if the complimentary C header file containedpreprocessor tests to allow an SFR or bit to be defined multiple ways. The pic18f97j60.h/as18f97j60.hpair were an example of this.
pic18f4520.h (9.51PL1) The PLLEN bit (OSCCON register) was not defined for devices 18F2420or 18F2520.
pic18f87j10.h, pic18f97j60.h (9.51) Config mask definitions for the address bus width (if using theexternal memory interface) were wrong. Note that the XMCUnn definitions in these files will bedeprecated in favour of the more consistent ABWnn definitions.
pic18f87j10.h (9.51) This file was missing definitions for EECONx registers.
pic18f2320.h, pic18f4520.h (9.51) Table read protection masks TRPx (TRP0, TRP1, TRPA...) wereincorectly named TRx.
pic18xx2.h (9.51) Removed unimplemented bit definitions in PORTE register.
5.13 Demo filesDelay (9.51PL2) Improved accuracy of sample routine DelayUs() in delay.h. The built-in library
delay routine was not affected.
Bootloader (9.51) If building the bootloader in compact mode and not selecting to debug with theICD2, bootloader self-protection was done by enabling write protection of the boot sector thethe device’s configuration bits. If the boot sector for the device being compiled for was greaterthan 512 bytes in size, a section of program memory that should have been writable by thebootloader would have been write protected, causing some of the incoming program to readback as unprogrammed.
5.14 HI-TIDENew project selection (9.51PL1) When creating a new HI-TIDE project, this compiler would be
listed as PICC-18 STD (9.51 candidate) rather than PICC-18 STD (9.51). This was merely anaesthetic flaw and the project operation was not affected.
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Chapter 6
Addendum
6.1 List of Supported DevicesThe following is the full list of all devices supported by this version of HI-TECH C Compiler forPIC18 MCUs (PRO) sorted alpha-numerically.
18C242, 18C252, 18C442, 18C452, 18C601, 18C658, 18C801, 18C858, 18F1220,18F1230, 18F1320, 18F1330, 18F13K20, 18F13K22, 18F13K50, 18F14K20, 18F14K22,18F14K50, 18F2220, 18F2221, 18F2320, 18F2321, 18F2331, 18F23K20, 18F23K22,18F2410, 18F242, 18F2420, 18F2423, 18F2431, 18F2439, 18F2450, 18F2455, 18F2458,18F248, 18F2480, 18F24J10, 18F24J11, 18F24J50, 18F24K20, 18F24K22, 18F2510,18F2515, 18F252, 18F2520, 18F2523, 18F2525, 18F2539, 18F2550, 18F2553, 18F258,18F2580, 18F2585, 18F25J10, 18F25J11, 18F25J50, 18F25K20, 18F25K22, 18F25K80,18F2610, 18F2620, 18F2680, 18F2682, 18F2685, 18F26J11, 18F26J13, 18F26J50,18F26J53, 18F26K20, 18F26K22, 18F26K80, 18F27J13, 18F27J53, 18F4220, 18F4221,18F4320, 18F4321, 18F4331, 18F43K20, 18F43K22, 18F4410, 18F442, 18F4420, 18F4423,18F4431, 18F4439, 18F4450, 18F4455, 18F4458, 18F448, 18F4480, 18F44J10, 18F44J11,18F44J50, 18F44K20, 18F44K22, 18F4510, 18F4515, 18F452, 18F4520, 18F4523,18F4525, 18F4539, 18F4550, 18F4553, 18F458, 18F4580, 18F4585, 18F45J10, 18F45J11,18F45J50, 18F45K20, 18F45K22, 18F45K80, 18F4610, 18F4620, 18F4680, 18F4682,18F4685, 18F46J11, 18F46J13, 18F46J50, 18F46J53, 18F46K20, 18F46K22, 18F46K80,18F47J13, 18F47J53, 18F6310, 18F6390, 18F6393, 18F63J11, 18F63J90, 18F6410,18F6490, 18F6493, 18F64J11, 18F64J90, 18F6520, 18F6525, 18F6527, 18F6585, 18F65J10,18F65J11, 18F65J15, 18F65J50, 18F65J90, 18F65K22, 18F65K80, 18F65K90, 18F6620,18F6621, 18F6622, 18F6627, 18F6628, 18F6680, 18F66J10, 18F66J11, 18F66J15,
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Addendum Microchip errata
18F66J16, 18F66J50, 18F66J55, 18F66J60, 18F66J65, 18F66J90, 18F66J93, 18F66K22,18F66K80, 18F66K90, 18F6720, 18F6722, 18F6723, 18F67J10, 18F67J11, 18F67J50,18F67J60, 18F67J90, 18F67J93, 18F67K22, 18F67K90, 18F8310, 18F8390, 18F8393,18F83J11, 18F83J90, 18F8410, 18F8490, 18F8493, 18F84J11, 18F84J90, 18F8520,18F8525, 18F8527, 18F8585, 18F85J10, 18F85J11, 18F85J15, 18F85J50, 18F85J90,18F85K22, 18F85K90, 18F8620, 18F8621, 18F8622, 18F8627, 18F8628, 18F8680,18F86J10, 18F86J11, 18F86J15, 18F86J16, 18F86J50, 18F86J55, 18F86J60, 18F86J65,18F86J72, 18F86J90, 18F86J93, 18F86K22, 18F86K90, 18F8720, 18F8722, 18F8723,18F87J10, 18F87J11, 18F87J50, 18F87J60, 18F87J72, 18F87J90, 18F87J93, 18F87K22,18F87K90, 18F96J60, 18F96J65, 18F97J60, 18LF13K22, 18LF13K50, 18LF14K22,18LF14K50, 18LF23K22, 18LF24J10, 18LF24J11, 18LF24J50, 18LF24K22, 18LF25J10,18LF25J11, 18LF25J50, 18LF25K22, 18LF25K80, 18LF26J11, 18LF26J13, 18LF26J50,18LF26J53, 18LF26K22, 18LF26K80, 18LF27J13, 18LF27J53, 18LF43K22, 18LF44J10,18LF44J11, 18LF44J50, 18LF44K22, 18LF45J10, 18LF45J11, 18LF45J50, 18LF45K22,18LF45K80, 18LF46J11, 18LF46J13, 18LF46J50, 18LF46J53, 18LF46K22, 18LF46K80,18LF47J13, 18LF47J53, 18LF65K80, 18LF66K80
6.2 Microchip errataThis release of the PICC-18 compiler recognises the published silicon errata issues listed in the tablebelow. Some of these issues have been corrected and no longer apply in recent silicon revisions.Refer to Microchip’s device errata documents for details on which issues are still pertinent for yoursilicon revision. The compiler’s chip configuration file records which issues are applicable to eachdevice. Specific errata workarounds can be selectively enabled or disabled via the driver’s --erratacommand line option.
Errata name Errata description Workaround details4000 Execution of some flow control opera-
tions may yeild unexpected results whencertain instructions vector code execu-tion across the 4000h address boundary.
A continuous block of program codeis not allowed to grow over the 4000haddress boundary. Additional NOP in-structions are inserted at prescribed lo-cations.
LFSR Using the LFSR instruction to load avalue into a specified FSR register mayalso corrupt a RAM location.
The compiler will load FSR registerswithout using the LFSR instruction.
DAW The DAW instruction may improperlyclear the CARRY bit (STATUS<0>) whenexecuted.
The compiler is not affected by this is-sue.
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Addendum Microchip errata
MINUS40 Table read operations above the userprogram space (>1FFFFFh) may yielderroneous results at the extreme low endof the device’s rated temperature range(-40oC).
Affected library sources config.c,idloc.c and devread.c employ additionalNOP instructions at prescribed locations.
EEPROMRD When reading EEPROM, the contentsof the EEDATA register may become cor-rupted in the second instruction cycleafter setting the RD bit (EECON1<0>).
The EEPROM_READ macro andeeprom_read library function readEEDATA immeadiately.
EEPROMADR The result returned from an EEPROMread operation can be corrupted if theRD bit is set immediately following theloading of the EEADR register.
The compiler is not affected by this is-sue.
EEPROMLVD Writes to EEPROM memory may notsucceed if the internal voltage referenceis not set.
No workaround applied
FLASHLVD Writes to program memory may notsucceed if the internal voltage referenceis not set.
No workaround applied
RESET A GOTO instruction placed at the resetvector may not execute.
Additional NOP instruction inserted atreset vector if following instruction isGOTO.
FASTINTS If a high-priority interrupt occurs duringa two-cycle instruction which modifiesWREG, BSR or STATUS, the fast-interruptreturn mechanism (via shadow regis-ters) will restore the value held by theregister before the instruction.
Additional code reloads the shadow reg-isters with the correct values of WREG,STATUS and BSR.
BSR15 Peripheral flags may be erroneously af-fected if the BSR register holds the value15, and an instruction is executed thatholds the value C9h in its 8 least signif-icant bits.
A warning will be issued if the instruc-tion MOVLB 15 instruction is detected inthe execuble code.
TBLWTINT If a peripheral interrupt occurs during aTBLWT operation, data can be corrupted.
Library routine flash_write() will tem-porarily disable all applicable interrupt-enable bits before execution of a TBLWTinstruction.
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Addendum Updates
FW4000 Self write operations initiated from andacting upon a range within the same sideof the 4000h boundary may fail basedon sequences of instructions executedfollowing the write.
No workaround applied
6.3 UpdatesMonitor HI-TECH Software’s web site or subscribe to Announcements on HI-TECH Software’s on-line forums for information relating to new versions or patches. Intermediate fixes to issues reportedwithin this release will be posted to the Known issues forum relevant to this compiler. Note that theknown issues will only be accessable to forum users once they have logged-in.
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