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The top documents tagged [chip topologies]
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chip topologies
Designing Regular Network-on-Chip Topologies under Technology, Architecture and Software Constraints F.Gilabert, D.Ludovici §, S.Medardoni, D.Bertozzi,
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F.Gilabert †, D.Ludovici § , S.Medardoni ‡, D.Bertozzi ‡, L.Benini †† , G.N.Gaydadjiev §
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CACTI-IO: CACTI With Off-Chip Power-Area-Timing Models Norman P. Jouppi ¥, Andrew B. Kahng †‡, Naveen Muralimanohar ¥, Vaishnav Srinivas † November 6 th,
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