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The top documents tagged [energydelay product]
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energydelay product
Presentation STT-RAM Survey
1.290 views
A Design Technique for Energy Reduction in NORA CMOS Logic Konstantinos Limniotis, Yiorgos Tsiatouhas, Member, IEEE, Themistoklis Haniotakis, Member, IEEE,
214 views
Device and Architecture Co-Optimization for FPGA Power Reduction Lerong Cheng, Phoebe Wong, Fei Li, Yan Lin, and Prof. Lei He EE Department, UCLA Partially.
217 views
Electronics Ch14
44 views
IEEE 2013-2014 Project titles
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Energy Prediction for I/O Intensive Workflow Applications 1 Hao Yang, Lauro Beltrão Costa, Matei Ripeanu NetSysLab Electrical and Computer Engineering.
223 views
Compressed Tag Architecture for Low-Power Embedded Cache Systems
31 views
Low-Power Design Techniques in Digital Systems
40 views
2013/01/14 Yun-Chung Yang Energy-Efficient Trace Reuse Cache for Embedded Processors Yi-Ying Tsai and Chung-Ho Chen 2010 IEEE Transactions On Very Large.
214 views
Area Delay Power Efficient Fixed Point LMS
4 views
Bulbul Rath EEL 6935- Embedded System Seminar Memory/Cache Optimization Techniques 04/02/2013 1.
217 views