3. Fundamental MOS Configurations and Discrete...

transcript

3. Fundamental MOS Configurations and

Discrete MOS Amplifiers

ECE 102, Winter 2011, F. Najmabadi

Reading: Sedra & Smith: Secs. 5.6 & 5.7

Voltage Amplifier Model

Input Resistance: Ri = vi/iiOpen-loop gain: Avo = vo/vi with no loadOutput resistance: Ro (resistance seen between

output terminals with vi= 0 )

We focus on Unilateral amplifiers (i.e., Ri is independent of Load)

+⋅==

+⋅⋅

Cascaded Amplifiers

91.0100k1M

9.91k100k

100k10

+⋅==

RAvvA100k 2121 === iLio RRvv

9.901k10k

10k100

+⋅==

RAvvA10k 3232 === iLio RRvv

909.010100

+⋅==

8183211

=⋅⋅== vvvi

Lv AAA

vvA 74491.0 x 8181 ==⋅=

MOS Fundamental Configurations

MOS fundamental amplifier configurations

Common-Source Common-Gate Common-Drain

Since PMOS has the same signal model, configurations and results are exactly the same

Common Source Configuration

Small Signal Circuit:

Small Signal Circuit with MOS SSM

Common Source Configuration (Gain)

)||||(

LDomin

LDogsmo

RRrgvvA

RRrvgv

Relevant circuit forGain calculation

Common Source Configuration (Ri)

Relevant circuit forRi calculation

Common Source Configuration (Ro)

Doo RrR ||=Current source becomes open circuit

Relevant circuit forRo calculation (set vi = 0)

Common Source with Source Resistor

∞==⇒=i

vRi 0Input Resistance

Common Source with Source Resistor (Gain*)

* Text book ignore ro

LDSomo

rRRgRgA

rRRRgRRgA

RRRrgrRRrg

/)||(1)||(

)||()1()||(

++−=

++−≈

+++−==

=−+−

=−−−

Node voltage method:

Node vs

Node vo

Common Source with Source Resistor (Ro*)

DSomoo RRrgrR ||])1([ ++=

=−−−

Node vs

set vi = 0 Attach ix and compute vx

2121 ||111 :Noting

RRRR=+

Common Gate Configuration

Common Gate Configuration (Gain*)

)||()||||(

)||||(1

RrgARRrgA

≈≈

=−+−

Node vo

Common Gate Configuration (Ri and Ro*)

)||()1(

)||()(

LDoiomi

LDiogsmii

RRrirgvRRirvgiv

++=KVL:

Doo RrR ||=

Current source becomes open circuit

Output Resistance (set vi = 0)

Input Resistance

Common Drain Configuration (Source Follower)

)||(1)||(

RrgRrgA

Note: This circuit needs a load as it is really a current amplifier.

=−−+

Node vs

Common Drain Configuration (Source Follower)

/1+=−=

Input Resistance

Output Resistance (set vi = 0)

R 1||1≈=

∞==i

Summary of MOS Amp. Fundamental Forms(PMOS circuits are identical)

Common Source with RS

LDmv rRRRg

RRgA/)||(1

)||(++

Common Drain/Source Follower

)||(1)||(

Lomv Rrg

Common Source

)||||( LDomv RRrgA −=

Common Gate

)||||( LDomv RRrgA =

Transistor can be configured to act as a resistor for small signals!

Doo RrR ||=Set vi = 0, current source becomes open circuit

Ex: Output resistance of a CS Amplifier

Do Rr ||

If we connect any two terminals of a MOS, we get a two-terminal device.o For Small Signals, this two terminal device can be replaced with its

Thevenin equivalent circuit.o As there is NO independent sources present, the Thevenin

equivalent circuit is reduced to a resistor.

Transistor can be configured to act as a resistor for small signals!

But, MOS should be in saturation for small signal model to work!o Connection between MOS terminals are, therefore, made through

ground for small signals.o In fact, one or both MOS terminals have to be connected to bias power

supplies to ensure that MOS is in saturation

Notation: ro is the small-signal resistance between the point and ground

Small Signal CircuitReal Circuit

No Small Signal circuitMOS is NOT in saturation

Elementary Configuration for MOS resistance(PMOS circuits are identical)

Input resistanceof CS Amp

Above configurations are for Small Signal. Typically one or both grounds are connected to bias voltage sources to ensure that MOS is in saturation!

Output resistance of CS Amp with Rs

)1()1(Rgr

+≈++

Input resistance of CG Amp

+≈++ 1

or Diode-connectedTransistorAlways in saturation!m

1||1≈

Gain, input and output resistances of MOS amplifiers can be found

usingthe fundamental amplifiers and

elementary R configurations

Discrete MOS Amplifiers(Analysis using the fundamental Amplifiers

and elementary R configurations)

Stable Bias circuits for discrete MOS amplifiers

Drain Feedback

Will Discuss later

Identical small-signal circuit if

21 || RRRG =

One power supply

DSGGS IRVV −=

Two power supplies

DSSSGS IRVV −=

We will do analysis for this configuration

Signal is typically coupled to discreteamplifiers via coupling capacitors

We assume that the small signals of interest are at sufficiently high frequencies, such that the (large) capacitors can be approximated as shorts.o A lower cut-off frequency for Amplifier

These capacitors can be added at input, output, and between amplifier stages.

These capacitor can also be used to “by-pass” resistors needed for bias but not for small-signal.

Discrete CS Amplifier

Real Circuit

Test book uses current source for biasing(not a practical discrete circuit)

Fundamental CS form

Derivation of small-signal circuit for Discrete CS Amplifier

Real Circuit

Short capsZero bias supplies

Rearrange

Discrete CS Amplifier

)||||( LDomv RRrgA −=

Fundamental CS form

Elementary R Configuration

Gi RR =

Doo RrR ||=

Discrete CS Amplifier with RS

Real Circuit

Small Signal Circuit

Discrete CS Amplifier with RS

Fundamental CS form with RS

Gi RR =

DSmoo RRgrR ||)]1([ +=)1( smo Rgr +

LDmv rRRRg

RRgA/)||(1

)||(++

Discrete CG Amplifier

Real Circuit

Discrete CG Amplifier

Fundamental CSGform

Doo RrR ||=

grgRRr ||1

+≈++

LDoSi rg

RRrRR1

)||||( LDomv RRrgA =

Discrete CD Amplifier (Source Follower)

Real Circuit

Discrete CD Amplifier (Source Follower)

Fundamental CD form

Gi RR =

R ||1=

)||||(1)||||(

LSomv RRrg

RRrgA+

3. Fundamental MOS Configurations and Discrete...

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