2. Introduction to MOS Amplifiers: Concepts and MOS Small...

2. Introduction to MOS Amplifiers: Concepts and

MOS Small-Signal-Model

Sedra & Smith Sec. 5.4 & 5.6

(S&S 5th Ed: Sec. 4.4 & 4.6)

ECE 102, Fall 2012, F. Najmabadi

NMOS Transfer Function (1)

F. Najmabadi, ECE102, Fall 2012 (2/26)

Transfer Function: Relation between output and input voltages.

vi =

Circuit Equations:

o NMOS iv characteristics: iD = f (vGS , vDS ) o KVL: vo = vDS = VDD − RD iD



2) Just to the right of point A: o VOV = vGS − Vt is small, so iD

is small. o vDS = VDD − RD iD is close to VDD

o Thus, vDS > VOV and NMOS is in saturation.

1) For vGS < Vt , NMOS is in cutoff: iD = 0 & vDS = VDD − RD iD = VDD



3) As vGS increases: o VOV = vGS − Vt and iD become larger;

o vDS = VDD − RD iD becomes smaller.

o At point B, vDS = VOV

4) To the right of point B, vDS < VOV = vGS − Vt and NMOS enters triode.

Point B is called the “Edge of Saturation”



2) Just to the right of point A: o VOV = vGS − Vt is small, so iD

is small. o vDS = VDD − RD iD is close to VDD

o Thus, vDS > VOV and NMOS is in saturation.

3) As vGS increases: o VOV = vGS − Vt and iD become larger;

o vDS = VDD − RD iD becomes smaller.

o At point B, vDS = VOV

1) For vGS < Vt , NMOS is in cutoff: iD = 0 & vDS = VDD − RD iD = VDD

4) To the right of point B, vDS < VOV = vGS − Vt and NMOS enters triode.

Point B is called the “Edge of Saturation”

Graphical analysis of NMOS Transfer Function (1)

KVL equation is a plane in this space.

Intersection of KVL plane with the iv characteristics surface is a line.

NMOS operating point is on this line (depending on the value of vGS.)

vi =

DSDDDD

DSGSD

viRVvvfii-v

+==

:KVL),( :siticsCharacteri NMOS

If we look from the bottom (iD axis out of the paper), we can see the transfer function.


Graphical analysis of NMOS Transfer Function (6)

Every point on the load line corresponds to a specific vGS value.

As vGS increases, NMOS moves “up” the load line.


Looking from the bottom

Looking parallel to vGS axis

Foundation of Transistor Amplifiers (1)


MOS transfer function is NOT linear

In saturation, however, transfer function looks linear (but shifted)

A voltage amplifier requires vo/vi = const. (2 examples below)

vo/vi can be negative (minus sign represents a 180o phase shift)



In saturation, transfer function appear to be linear

Approximate the transfer function with a tangent line at point Q (with a slope of − G):

vDS − VDS = − G (vGS − VGS )

vds = − G vgs (linear relationship)

for vds = vDS − VDS and vgs = vGS − VGS



Let us consider the response if NMOS remains in saturation at all times and vGS is a combination of a constant value (VGS) and a signal (vgs).

gsGSGS vVv +=

The response to a combination of vGS = VGS + vgs can be found from the transfer function


Response to the signal appears to be linear


Response (vo = vDS ) is also made of a constant part (VDS ) and a signal response part (vds).

Constant part of the response, VDS , is ONLY related to VGS , the constant part of the input (Q point on the transfer function of previous slide). o i.e., if vgs = 0, then vds = 0

The shape of the time varying portion of the response (vds) is similar to vgs. o i.e., vds is proportional to the input

signal, vgs

Although the overall response is non-linear, the transfer function for the signal is linear!


vgs

vds

vGS = VGS + vgs vDS = VDS + vds iD = ID + id

Signal and response

Constant: Bias

Non-linear relationship among these parameters

Approximately Linear relationship among these parameters

Important Points and Definitions!


Signal: We want the response of the circuit to this input.

Bias: State of the system when there is no signal. o Bias is constant in time (may vary extremely slowly compared to signal)

o Purpose of the bias is to ensure that MOS is in saturation at all times.

Response of the circuit (and its elements) to the signal is different than its response to the Bias (or to Bias + signal): o Signal iv characteristics of elements are different, i.e. relationships

among vgs , vds , id is different from relationships among vGS , vDS , iD . o Signal transfer function of the circuit is different from the transfer

function for total input (Bias + signal).

Issues in developing a MOS amplifier:


1. Find the iv characteristics of the elements for the signal (which can be different than their characteristics equation for bias). o This will lead to different circuit configurations for bias versus

signal

2. Compute circuit response to the signal o Focus on fundamental MOS amplifier configurations

3. How to establish a Bias point (bias is the state of the system when there is no signal). o Stable and robust bias point should be resilient to variations in

µnCox (W/L),Vt , … due to temperature and/or manufacturing variability.

o Bias point details impact small signal response (e.g., gain of the amplifier).

Signal Circuit

1) We will find signal iv characteristics of various elements.

2) In order to use circuit theory tools, we will use the signal iv characteristics of various elements to assign a circuit symbol. e.g., o We will see that the diode signal iv characteristics is linear so

for signals, diode can be modeled as a “circuit theory” resistor.

o In this manner, we will arrive at a signal circuit.

Bias and Signal Circuits


Bias & Signal

.....

:

,...)( ,,, : MOS

rRR

rRRD

gsGSGS

DDSGS

iIivVvR

vVvivv

+=+=

+=

....., :

,,, : MOS

RRD

DDSGS

IVR

IVV

....., :

,,, : MOS

rrD

ddsgs

ivR

ivv

+

Bias Signal only = (Bias + Signal) - Bias

?

Finding signal circuit elements -- Resistor


)( RRRRRRr IiRRIRiVvv −=−=−=

Resistor Voltage Current iv Equation

Bias + Signal: vR iR vR = R iR

Bias: VR IR VR = R IR

Signal: vr = vR − VR ir = iR − IR ??

rr Riv =

A resistor remains as a resistor in the signal circuit.

Finding signal circuit elements – IVS & ICS


0=−=−= DDDDIVSIVSivs VVVvv

Independent voltage source

Voltage Current iv Equation

Bias + Signal: vIVS iIVS vIVS = VDD = const

Bias: VIVS IIVS VIVS = VDD = const

Signal: vivs = vIVS − VIVS iivs = iIVS − IIVS ??

0 ,0 ≠= ivsivs iv

An independent voltage source becomes a short circuit!

An independent current source becomes an open circuit!

Similarly:

Exercise: Show that dependent sources remain as dependent sources

Summary of signal circuit elements

Resistors& capacitors: The Same o Capacitor act as open circuit in the bias circuit.

Independent voltage source (e.g., VDD) : Effectively grounded

Independent current source: Effectively open circuit o Careful about current mirrors as they are NOT “ideal” current sources (early

effect and/or channel width modulation was ignored!)

Dependent sources: The Same

Non-linear Elements: Different! o Diodes & transistors ?


Formal derivation of small signal model


2)2(

)1(

!2)()( a

AaA vVfvVf ⋅>>⋅

)()(2 )2(

)1(

A

Aa Vf

Vfv ⋅<<

Small signal means:

aAaa vVfvgi ⋅== )()( )1(

Signal + Bias for element A (iA, vA) : iA = f (vA) Bias for element A (IA, VA) : IA = f (VA) Signal for element A (ia, va) : ia = g (va)

( ) ( )

aAA

aA

aAA

AAA

AAAA

AA

vVfVf

vVfvVfVf

VvVfVvVfVf

vfi

⋅+≈

+⋅+⋅+=

+−⋅+−⋅+=

=

)()(

...!2

)()()(

...!2

)()()(

)(

)1(

2)2(

)1(

2)2(

)1( (Taylor Series Expansion)

aAAAaA vVfIIii ⋅+=+= )()1(

Small signal model vs iv characteristics


Small signal model is equivalent to approximating the non-liner iv characteristics curve by a line tangent to the iv curve at the bias point

D

T

Dd

dDd

InV

Vfr

vVfi

≈=

×=

)(1

)(

)1(

)1(

Derivation of MOS small signal model (1)


Signal + Bias for MOS (iD, vGS , vDS) : iD = f (vGS, vDS), iG = 0 Bias for MOS (ID, VGS , VDS) : ID = f (VGS, VDS), IG = 0 Signal for MOS (id, vgs , vds) : id = g (vgs , vds), ig = 0

MOS iv equations: iD = f (vGS, vDS) iG = 0

dsVVDS

gsVVGS

D

DSDSVVDS

GSGSVVGS

DSGS

DSGSDdD

vvfv

vfI

VvvfVv

vfVVf

vvfiiI

DSGSDSGS

DSGSDSGS

×∂∂

+×∂∂

+≈

+−⋅∂∂

+−⋅∂∂

+=

==+

,,

,,

...)()(),(

),(

,,

dsVVDS

gsVVGS

d vvfv

vfi

DSGSDSGS

×∂∂

+×∂∂

≈

(Taylor Series Expansion in 2 variables)

Derivation of MOS small signal model (2)


dsVVDS

gsVVGS

d vvfv

vfi

DSGSDSGS

⋅∂∂

+⋅∂∂

=,,

),()1()( 5.0 2DSGSDStGSoxnD vvfvVv

LWCi =+−= λµ

mOV

D

tGS

DStGSoxn

VVDStGSoxnVVGS

gV

IVV

VVVL

WC

vVvL

WCvf

DSGS

DSGS

≡=−

+−×=

+−×=∂∂

2)(

)1()( 5.02

)1)(( 5.02

2

,,

λµ

λµ

oD

DS

D

DS

DStGSoxn

VVtGSoxn

VVDS

rI

VI

V

VVVL

WC

VvL

WCvf

DSGSDSGS

1)1()1(

)1()( 5.0

)( 5.0

2

,

2

,

≡≈+

=+

+−×=

−×=∂∂

λλ

λλ

λµλ

µλ

0 =+⋅= go

dsgsmd i

rvvgi

MOS small signal “circuit” model


and 0 o

dsgsmdg r

vvgii +⋅==

Do I

r⋅

≈λ

1

OV

Dm V

Ig ⋅=

2 122>>==

OV

A

OVom V

VV

rgλ

Statement of KCL Two elements in parallel Input open circuit

PMOS small signal model is identical to NMOS


=

PMOS small-signal circuit model is identical to NMOS o We will use NMOS circuit model for both!

o For both NMOS and PMOS, while iD ≥ 0 and ID ≥ 0, signal quantities: id, vgs, and vds , can be negative!

PMOS* NMOS

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