DisplayPort TX & RX Testing Solutions over... · Protocol TX RX DisplayPort 1.4 Electrical DP 1.2...

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DisplayPort TX & RXTesting Solutions

Agenda• DP Technology Overview

• DPC TX Solution

• DPC RX Solution

DP Technology Overview

DisplayPort Standards

• Standards

◦ DP 1.2 – May, 2012

◦ DP over Type-C Spec – Aug, 2015

◦ DP 1.4 Spec – Feb, 2016

• Hot Plug Detect (HPD) signal line

◦ Initiates communication

• Main-Link

◦ Uncompressed video and audio

• Auxiliary channel (AUX CH)

◦ Link management and device control

Consortium Updates – DP over Type-C

• Spec released on Aug 10, 2015

• Draft CTS available

• Alternate Mode functional extension of the USB-C interface

• Developed in liaison with the USB 3.0 Promoter Group

• Crosstalk Eye and Jitter measurement (new)

◦ Effect of 2 x lanes USB and 2 x lanes DP

◦ Applies to sources that support HBR2 or higher data rates

◦ The PD controller needs to configure DUT to 2xDP/2xUSB

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Consortium Updates – DP 1.4

• Spec released on March 1st 2016

• Timelines of CTS release – Q1 2017

• Incorporates Display Stream Compression (DSC) technology for visually lossless transmission

• Supports display resolution support up to 5K x 3K at HBR3 (8.1Gbps)

• Supports Forward Error Correction (FEC)

◦ Addresses the transport error resiliency needed for compressed video transport to

external displays

• HDR meta transport

◦ Useful for DP to HDMI 2.0a protocol conversion

3 MAY 2018 6

DP 1.4 vs DP 1.2 Comparison

Test ID DP 1.2 DP 1.4

Highest Speed 5.4 Gbps (HBR2) 8.1 Gbps (HBR3)

Recommended scope bandwidth 12.5 GHz 16 GHz (min 12.5 GHz)

3.1 Eye Diagram Test

Test Point TP3_Eq TP3_Eq

Pattern Comp Eye TPS4

CTLE SingleMultiple, optimized CTLE + DFE setting

to be used for measurement

DFE No Yes

Cable Model HBR2 Cable Model (s4p) , ~17dB loss HBR3 Cable Model (s4p), ~11dB loss

Eye Opening 90 mV 90 mV

Maximum TX Total Jitter 0.62 UI 0.5 UI

DPC Tx Solutions

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典型的串行总线测试位置

Measurement Test Points

• TP1: at the pins of the transmitter device.

• TP2: at the test interface on a test access fixture near end

• TP3: at the test interface on a test access fixture far end

• TP3_EQ: TP3 with equalizer applied.

• TP4: at the pins of a receiving device

NORMATIVE test points INFORMATIVE test points

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Measurement List

• Standard Tests:

◦ Eye Diagram

◦ Frequency Accuracy

◦ Rise/Fall time

◦ Unit Interval

◦ TJ/RJ

◦ Non ISI Jitter

• Multi-Lane Tests:

◦ Inter-pair Skew

◦ Intra-pair Skew

• Amplitude Tests:

◦ Non Pre-Emphasis Level Verification

◦ Pre-Emphasis Level Verification

• SSC Tests:

◦ Modulation Frequency

◦ Deviation and Variation

• Dual-Mode Tests: (If DUT supports)

◦ Clock Jitter

◦ Eye Diagram

• Aux Tests:

◦ Sensitivity Test

◦ Eye Diagram

3 MAY 2018 11

Testing Challenges – Acquisition

• Bit Rates: RBR, HBR, HBR2

• Patterns: D10.2,PRBS7, COMP, PLTPAT, PCTPAT

• Pre-Emphasis: 0dB, 3.5dB, 6dB, 9.5dB

• Output Levels: 400mV, 600mV, 800mV, 1200mV

• SSC (Spread Spectrum): On/Off

• Lane Width: 1,2,4

~432 Acquired signals for DP1.2 Normative Measurements per lane.

X4 lanes results in 1728 Automated acquisitions per DUT

3 MAY 2018 12

Waveforms

(SSC, 4 Lanes Possible Combinations)

Eye Diagram Test 80

Pre-Emphasis Test 240

Non-Pre-Emphasis 32

Total Jitter 80

Eye Diagram

• Eye Diagram is measured at TP3_EQ point

• Eye Diagrams generated for:

◦ Best case cable (Zero cable)

◦ Worst case cable

• Adaptive Mask Generation at HBR2 and HBR3

◦ Width Along 0mV

◦ Height Passing location: 0.375 to 0.625UI

3 MAY 2018 13

Voltage Swing and Pre-Emphasis

• Non Pre-Emphasis test must measure a region after the signal is settled. (V-Diff)

• Pre-Emphasis test must measure the region where its being applied. (V-Diff-Pre)

• RBR/HBR – PRBS7 pattern

• HBR2 – PLTPAT (Pre-Emphasis Level Test Pattern)

3 MAY 2018 14

Type-C Solution Overview

3 MAY 2018 15

Type-C

Gen-1 (5G)

Gen-2 (10G)

USB PD

DP TBT

DP Type-C

DP 1.4 (HBR3)

DisplayPort Mode (Alt mode)

Unigraf DPR-100

(AUX Controller)

Why We Recommend DPR-100?• Unigraf serves as a worldwide leader of DisplayPort

compliance testing tools

• Working with all major companies in display industry

• Officially recommended by competitors – KS and LeCroy (now Tek)

• Tools are certified for official compliance testing

• Their Compliance test tools

◦ Implement a set of tests specified in the DP standard

◦ Implementation certified by the VESA standard body

◦ Always updating their firmware to stay current in

industry

3 MAY 2018 18

Capabilities DPR-100 DP-Aux

DP Link Core CTS YES NO

HDCP CTS YES NO

Audio CTS YES NO

PHY CTS (AUX Controller) YES YES

R&D Debug GUI YES NO

Test Automation YES NO

Introducing… DPR-100 Utility

• Comes bundled with TekExpress DP 1.4 installer

• Controls DPR-100 aux controller to change the DUT settings like data rates, patterns and levels

• Helps verify setup connections and DUT behaviors before running compliance tests

• Controls GRL Alt-mode controller as part of Type-C setup

• Competition does not offer this level of support

3 MAY 2018 19

Automating DisplayPort 1.4 TX Tests

Connector Type – Standard or Type-C

CTS versions : DP1.4, DP 1.2

Execution mode : Live or pre-recorded

DUT Settings

DUT Automation – Manual or DPR-100

Lane selection or switch matrix

Optional Signal Validation

TEKEXPRESS DP1.4 UPDATES

TekExpress Report

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Summary of runs

Detailed images with histogram

and bit stream data

Bathtub and histogram plot

for TJ measurement

Dynamic mask generation

with auto-fit mask hits

Why Test Times Matter in DP Testing?

Test Waveforms

Eye Diagram 88

Pre-Emphasis 320

Non-Pre-Emphasis 32

Total Jitter 112

~126 acquired signals for DP1.4 Normative

Measurements per lane.

X4 lanes results in 504 automated acquisitions

per DUT

Parameters Combinations

Bit Rates RBR, HBR, HBR2, HBR3

Patterns D10.2, PRBS7, COMPEYE, PLTPAT

Pre-Emphasis 0dB, 3.5dB, 6dB,9.5dB

Levels 400mV, 600mV, 800mV, 1200mV

Lane Width 1,2,4

SSC On (If DUT supports)Real world benchmarking

HBR2 Test times > 11 hoursTektronix Results

HBR2 Test times ~ 6 hours

Testing Beyond Compliance

TekScope SDLA TekExpressDPOJET

• Basic signal analysis

• Rise/Fall Times

• Amplitude

• Frequency

• Advanced signal

analysis

• Standard specific

modules

• Perform statistical

analysis

• Eye-diagram and

histogram plots

• Detailed Reports

• Understand channel

behavior

• Understand

component change

effects

• Virtual test point

probing

• Open a closed eye

• Analyze up to 8

cascaded blocks

• Automated

Compliance test

application software

• Incorporates the

latest MOIs

• Fast test execution

• Elaborate reports

with results and plots

Putting It All Together

Processor Switch

ConnectorRe-Timer

Use DPOJET plugins to quickly measure DP tests

Use SDLA to de-embed each test point along the signal trace

Solder-in tip of P7720 probe

Browser tip of P7720 probe

DisplayPort Sample Circuit

DisplayPort fixture TekExpress DP application to

perform compliance measurements

P7720 probe

SMA adapter

DP 1.4 and SDLA

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The HBR3 Reference Receiver Equalizer is

modeled as a first-order CTLE cascaded

with a one-tap Decision Feedback

Equalizer (DFE).

The HBR3 Reference equalizer includes a CTLE cascaded with a one-tap adaptive DFE with a feedback coefficient limited to < 50mV.

The TekExpress automates the DFE operation by interacting with SDLA application. The DFE taps, Amplitude and Threshold values are reported under Eye diagram test.

DPC Tx Test Setup

3 MAY 2018 26TEKTRONIX DISPLAY SOLUTIONS

DPC Tx Instrument List

• > 16GHZ Scope with DJA, DP12(RBR/HBR/HBR2), DP14(add HBR3 supporting based on DP12)

• Wilder TEK-DPC-TPA-PCB (Plug & Control Board)

• P7720 + P77C292MM (Optional)

或 P7313SMA > 2 (Optional)

或 PMCABLE1M *2

• DPR-100 with Software License

• DC Block *8 (Optional)

• P6247 – For AUX Channel Testing

Standard DP Tx Instrument List

• > 16GHZ Scope with DJA, DP12(RBR/HBR/HBR2), DP14(add HBR3 supporting based on DP12)

• TF-DP-TPA-P Standard DP Plug Adapter

• DP-TPA-A DisplayPort Aux Control Adapter

• P7720 + P77C292MM (Optional)

或 P7313SMA > 2 (Optional)

或 PMCABLE1M *2

• DPR-100 with Software License

• DC Block *8 (Optional)

• P6247 – For AUX Channel Testing

DPC Rx Solutions

RX Test Challenges• Calibration

◦ Frequency Range (SJ): 2MHz, 10MHz, 20MHz,

100MHz

◦ Injected Jitter: ISI, RJ and SJ

• TP3 for RBR and TP3_Eq for HBR/HBR2

• Uni-direction without Loopback

• Link Training

◦ Frequency and Symbol lock

• Jitter Tolerance Testing

RX Test Procedure

Step-1 : Calibration Step-2 : Sink Testing

Key Features

• VESA approved automated calibration and compliance testing solution

• 100% coverage as per DP PHY 1.2b CTS

• Automated DDJ (ISI) calibration & Jitter Margin testing at user-defined Jitter Frequency Steps

• Simple Setup, Test Execution, and Reporting in HTML and .csv formats

• Fully integrated with Unigraf DPT-200 controller

• Automates checking of DisplayPort Configuration Data (DPCD) registers for BER validation

DP 1.4 RX Configuration• Stressed Signal Generator : BERTScope (BSX125 series)

• 70K series Oscilloscope

◦ DPO 71254C/DX (or above) with DPOJET option DJA

• GRL-DP-SINKSW compliance test software

• Unigraf DPT-200 Aux controller reference Source

• Variable ISI Generator - Artek CLE1000-A2

• Wilder DP-TPA-PR fixtures (plug and receptacle)

• DP Sink accessories (refer configurator on Tek.com solutions page)

DP Solutions Portfolio

Tektronix DP Portfolio

3 MAY 2018 36

DisplayPort

Standards

Protocol

DisplayPort 1.4

Electrical

DP 1.2 RX

DP 1.2

Protocol

decode

Specification Roadmap Tektronix Latest Releases

TekExpress

DP 1.2 Type-C

TekExpress DP

1.4 (HBR3)

eDP 1.4

DisplayPort Type-C

DP 1.4/Type-C

Info @ Tek.com• http://www.tek.com/displayport-0

• Webinars

• Application Notes

• Methods of Implementation

• Product & Software Datasheets

• Software Download Trials

Q and A

3 MAY 2018 TEKTRONIX DISPLAY SOLUTIONS 38

DisplayPort TX & RX Testing Solutions over... · Protocol TX RX DisplayPort 1.4 Electrical DP 1.2...

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