L29 MOS Current Mirrors and Gain Cell V2€¦ · 1 ECE 255 MOS Current Mirrors and Basic Gain Cell...

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ECE 255

MOS Current Mirrors and Basic Gain Cell

(Sedra and Smith, 7th Ed., Secs. 8.1-8.3)

Mark Lundstrom School of ECE

Purdue University West Lafayette, IN USA

Lundstrom: Fall 2019

ECE 255: Fall 2019 Purdue University

IC Amplifiers

For the rest of the course, we will shift our focus to integrated circuit electronics.

First question: How do we bias a MOSFET when it’s on an a Si chip?

ID = 100 µA

Classic 4-resistor bias circuit

RD RG1

RG2 RS

Not suitable because large resistors are

required.

Why avoid large resistors?

4 http://www.computerhistory.org/revolution/digital-logic/12/281

µA 709 op amp Designed by Robert Widlar

2 transistors 2 resistors

Principles of IC Design

5 Lundstrom: Fall 2019

1)  Avoid large value resistors

2)  Avoid large value capacitors

3)  Use low voltage power supplies

4)  Exploit the ability to “size” transistors (W/L for MOSFETs, AE for bipolar)

5)  Use CMOS unless bipolar is essential

Outline

1)  Introduction

2)  MOS Current Mirrors

3)  CS Amplifiers with Active Loads

Review: MOSFET DC Design

VDD = +5 V

R1 = ?kΩ

2VGS −Vtn( )2

ID = 0.1 VGS −1( )2mA

Design for: ID = 0.5 mA

What region is this MOSFET operating in?

Is VDS ≥ VGS −Vtn( )

VD ≥ VD −1( ) ✓

saturation region

Review: MOSFET DC Design

VDD = +5 V

R1 = ?kΩ

ID = 0.1 VGS −1( )2

ID = 0.1 VGS −1( )2= 0.5

Design for: ID = 0.5 mA

VGS = 3.24 V

5− 3.240.5

= 3.53 kΩ

VD =VGS = 3.24 V

VD =VGS

Review: MOSFET DC Analysis

VDD = +5 V

R1 = 3.53kΩ

ID = 0.1 VGS −1( )2

ID = ? mA

VGS =VDD − ID R1

2 equations in 2 unknowns

Solve quadratic eqn.

MOSFET “current mirror”

IG = 0

VDD = +5 V

R1 = 3.53kΩ

ID = 0.1 VGS −1( )2

ID1 = 0.5 mA

+VGS = 3.24 V−

ID2 = ?

ID = 0.1 VGS −1( )2

ID2 = ID1 if

VD2 > VGS –Vtn

VD2 > 2.24 V

VD = 3.24 V

MOSFET current source

IO = 0.5 mA

VO >VGS −Vtn

VO =VDS2

IO = 0.5 mA

2.24 V

“sizing” transistors

⎛⎝⎜

⎞⎠⎟ 1

2VGS −Vtn( )2

IG = 0

⎛⎝⎜

⎞⎠⎟ 2

2VGS −Vtn( )2

=W L( )2

W L( )1

VD2 >VGS −Vtn( ) ID2

Now, let’s look more

closely at the effect of VD2.

MOSFETs

“saturation”

VDS > VGS −Vtn( )

VGS −Vtn

“triode”

VDSsat

Q1 VDS1 =VGS

⎛⎝⎜

⎞⎠⎟

VGS −Vtn( )2

MOSFETs with output conductance

VDS > VGS −Vtn( )

VGS −Vtn

VDSsat

⎛⎝⎜

⎞⎠⎟

VGS −Vtn( )21+VDS VA( )

Q1 VDS1 =VGS Q2 VDS2 ≠VDS1

Real MOSFET current mirror

IG = 0

⎛⎝⎜

⎞⎠⎟ 1

VGS −Vtn( )21+VDS1 VA( )

⎛⎝⎜

⎞⎠⎟ 2

VGS −Vtn( )21+VD2 VA( )

=W L( )2

W L( )11+VD2 VA( )1+VGS VA( )

VDS1 =VGS

IREF =

⎛⎝⎜

⎞⎠⎟ 1

VGS −Vtn( )21+VGS VA( )

Real MOSFET current mirror

IG = 0

=W L( )2

W L( )11+VD2 VA( )1+VGS VA( )

=W L( )2

W L( )11+

VD2 −VGS( )VA

⎝⎜

⎠⎟

Real MOSFET current source

Lundstrom: Fall 2019 See Sec. 8.6

RO = ro

VO >VGS −Vtn

NMOS vs. PMOS

VGS −Vtn( )2

R1 IREF

VSG − Vtp( )2

PMOS Current Mirror

19 Lundstrom: Fall 2019

VO <VSG − Vtp

Outline

1)  Introduction

2)  MOS Current Mirror

Common Source amplifier

Aυo= υo

= −gmRD

Rin = ∞

Ro = RD

MOSFETs have modest gm, so we need a very large drain resistor.

Basic IC gain cell

Aυo= υo

Rin = ?

Rout = ?

Ideal current source

RO = ∞

Draw s.s. circuit

Lundstrom: Fall 2019 *

Basic IC gain cell: Results

Aυo= υo

= −gmro

Rin = ∞

Ro = ro

RO = ∞

Maximum gain (“intrinsic gain” / “self gain”)

Aυo= −gmro

RO = ∞

ro =VAID

= 1λID

A0 = Aυo= gmro

VA = ′VAL ∝ LLundstrom: Fall 2019

gm = IDVGS −Vtn( ) 2(1)

gm = 2knID(2)

Maximum (intrinsic/self) gain

RO = ∞

A0 =VA

VGS −Vtn( ) 2 =′VAL

VGS −Vtn( ) 2

A0 =VA2knID

= ′VAL2knID

Low currents and long channels give high gain

But, they give low transconductance and bandwidth

10 < A0 < 40Lundstrom: Fall 2019

Non-ideal current source

Real current source

Aυo= −gm ro || RO( )

How do we implement the current source?

Implementation

R1 IREF

Q2 Q3 Aυo

= −gm roN || roP( )

roN ≈ roP = ro

Aυo= −gmro = − A0

Half of the self-gain

Example 8.4 (p. 453 in Sedra and Smith)

IREF = 0.1mA

kn = 2 mA V2

kp = 0.65 mA V2

Vtn = Vtp = 0.6 V

VAn = 20 V

VAp = 10 V

Voltage gain

Aυo= −gm1 roN || roP( )

gm1 = 2knID= 2 × 2 × 0.1 = 0.63mS

ron =VANID

= 200.1

= 200 kΩ

rop =VAPID

= 100.1

= 100 kΩ

Aυo= −0.63 200 ||100( ) = −42

Min and Maximum output voltages

VDS1 >VGS1 −Vtn

υo >VGS1 −Vtn

VSD2 >VSG2 − Vtp

VDD −υo( ) >VSG2 − Vtp

υo <VSS −VSG2 + Vtp

Min and Maximum output voltages

There is a minimum output voltage to keep Q1 in saturation.

There is a maximum output voltage to keep Q2 in saturation.

Basic gain cell

Aυo= −gm roN || roP( )

Question: How can we increase the gain of the basic cell? Answer: Cascode

Summary

Current mirrors are used extensively in analog IC design.

The basic common source amplifier suffers from low gain when implemented in Si. A solution must be found.

Current Mirrors and Basic Gain Cell

Lundstrom: Fall 2019 34

1)  Introduction

2)  MOS Current Mirror

L29 MOS Current Mirrors and Gain Cell V2€¦ · 1 ECE 255 MOS Current Mirrors and Basic Gain Cell...

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