Post on 13-Apr-2015
description
transcript
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-5752P 0.3
Cover Sheet
Custom
1 51Thursday, October 29, 2009
2008/03/25 2008/04/
Compal Electronics,Ltd.
REV:0.3
Compal Confidential
Arrandale
with Intel IBEX PEAK-M core logic
NIWE2Schematics Document
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
MB Block Diagram
Custom
2 51Thursday, October 29, 2009
2008/03/24 2008/04/Compal Electronics, Inc.
LA-5752P
File Name :
Compal confidential
SPI ROM
SPI ROMBIOS page13
CAP SENSOR BD:LS-5752P
VOLUME UP
VOLUME DOWN
MUTE
AUDIO ENHANCE
BUTTON & LED
ESATA HDD AND USB CONN
page38
HDMI
USB PORT X1(Left)page37
page32
37.5mm*37.5mm
25mm*25mm
USB(WWAN)
SATA HDD CONN
SATA ODD CONN
DDR3-1067(1.5V)
Card Reader/Audio Jack SB
CONN
RTL8111DL-VB-GR
ICS9LRS3199AKLFT
6*PCI-E BUSpage28
PCI Express
Mini card Slot 1
CARD READER BD:
LS-5753P
RTS5138
HP JACK
MIC JACK
10/100/1G LAN
USB CONN X1(Right)page37
level shift IC
page25ASM1442
FDI *8100MHz 2.7GT/s
intelDDR3*4
6*SATA serial
UP TO 8G
NVidia N11M-GE1
Realtek 5138
MS/MS
pro/SD/SD
pro/mmc/XD
Analog MIC_Intpage33
HP X 1+
MIC_Ext X1
New Card X1page28
WWANpage28
SIM Card
PCI-E X16
page28
page28
page32
page37
POWER BD: LS-5754P
POWER BT
NOVO BT
POWER MANAGE BT
(UMA/DIS)
BlueTooth CONN
CMOS Camera
Conexant
CX20671
Audio Codec
2Channel Speaker
LPC BUS
CRT Connector
AZALIA
RJ45 CONN Int.KBD
ENE KB926D
Touch Pad
BANK 0, 1, 2, 3
DDR3-SO-DIMM X2
DDR3-800(1.5V)
Dual Channel
14*USB2.0
LVDS
Connector
EC
page26
page27
page29
page30
page34
page35page36
page35
page37
page27
page33
page33
page 10,11
Clock Generator
page12
page5~9
page 13~18
Arrandale
Socket-rPGA989
DMI *4
FCBGA 951
Intel Ibex Peak M
VRAM 64*16
page20
page19~23
CONNpage24
PCI Express
Mini card Slot 2
ZZZ
15.6W_PCB_LA5752P
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
MB Notes List
B
3 51Thursday, October 29, 2009
2008/03/24 2008/04/Compal Electronics, Inc.
LA-5752P
O
X
S3
+3VS
X
X
+3VALW
+5VS
O
+CPU_CORE
OO
X
X X
+VCCP
powerplane
O
O
O
O
X
S5 S4/ Battery only
X X X
+B
State
+1.5VS
+1.5V
S5 S4/AC & Batterydon't exist
S5 S4/AC
+5VALW
S0
O
O
+VGA_CORE
+1.8VS
DDR3 Voltage Rails
+0.75VS
Cap sensor board
X
X
XX
NEWCARD PCH
X X
X
X
N10x ThermalSensor
X
X
X
SML0CLK
SML0DATAPCH X
+3VS
X XSMB_EC_CK2
SOURCE
KB926
RAMM2
BATT KE926 SODIMM CLK CHIP
SMBUS Control Table
SMBCLK
SMBDATAPCH
WLANWWAN
SMB_EC_DA2
SMB_EC_CK1
SMB_EC_DA1
N10x
X V
V V
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
KB926
SML1CLK
SML1DATAPCH XXX X X X X X
1 0 1 0 0 1 0 0A4
I2C / SMBUS ADDRESSING
1 0 1 0 0 0 0 0
D2
A0
CLOCK GENERATOR (EXT.)
HEX
DDR SO-DIMM 1
ADDRESS
DDR SO-DIMM 0
1 1 0 1 0 0 1 0
DEVICE
5
BT
3G
6
4
CMOS
RIGHT SIDE
RIGHT SIDE0
DEVICEPORT
3
2
11
NEW CARD
USB PORT LIST
WIRELESS8
10
1WLAN
NEW CARD
CARD READER
3G
9
7
LAN
LEFT SIDE
6
4
DEVICEPORT
5
3
2
PCIE PORT LIST
1
12
13
7
8
+1.05VS
X
V
X
+3VALW+3VALW
+3VALW
+3VALW
+3VALW
+3VALW
+3VALW
V+3VALW
X X
+3VALWV
+3VS
+3VSV
+3VSV
V+3VS
LEFT SIDE10M@11M@
FOR 10M CHIPFOR 11M CHIP
100@ 10/100 LAN
BT@ Blue Tooth
ESATA@
UMA@DIS@
UMA only (Arranddale)
HU@HD@
SWITCHABLE or UMA onlySWITCHABLE or DIS only
SKU
Arrandale(dGPU)
Arrandale(iGPU)
Arrandale(iGPU+dGPU)
DIS@ / 100@ for EVT
UMA@ / 100@ for EVT
VGA@+HD@+HU@+HYBRID@
DIS only
UMA only
SWITCHABLE
DIS only (Arranddale)
HYBRID@ FOR SWITCHABLE
@ FUNCTION
45@
X76@
GIGA@UMA_HDMI@
HDMI@3G@
GIGA LANFOR UMA HDMI componentsFOR HDMI components3G(WWAN) function(X76 BOM)
(45 BOM)
EVT NON-USE
VGA@ FOR NVIDIA PART
CMOS@ESATA functionCamera function
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
VGA Notes List
B
4 51Thursday, October 29, 2009
2009/03/16 2010/03/15Compal Electronics, Inc.
LA-5752P
(+3VS)
FBVDDQ
(+VGA_CORE)
(1.05VS)
tNVVDD
PEX_VDD can ramp up any time
VDD33
NVVDD
The ramp time for any rail must be more than 40us
(1.5VS)
Performance Mode P0 TDP at Tj = 102 C* (DDR3)VGA and DDR3 Voltage Rails (N10x GPIO)
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
IN
OUT
OUT
OUT
OUT
OUT
OUT
I/O
OUT
OUT
I/O
IN
OUT
OUT
Panel Back-Light brightness(PWM capable)
Panel Power Enable
Panel Back-Light On/Off (PWM)
GPU VID0
GPU VID1
GPU VID2
Thermal Catastrophic Overtemp
Thermal Alert
Memory VREF switch
SLI raster sync
AC power detect pin
MEM_VID orPower supply control
N/A
-
H
H
H
L
L
Hot plug detect for IFP link C
GPIO I/O ACTIVE Function Description
N/A
-
-
-
L
-
-
- Power supply control
IN
OUT
IN
IN
IN
IN
IN
IN
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO22
GPIO23
-
-
-
-
-
-
-
-
Hot plug detect for IFP Link E
Programmable Fan Control
Hot plug detect for IFP link F
SLI swap ready signal
I/O
Products
GPU Mem NVCLK/MCLK NVVDD
FBVDDFBVDDQ PCI Express I/O and
PLLVDDI/O andPLLVDD
Other
(3.3V)(1.05V)(1.8V)(1.05V)
(1.5V)(1.5V)(GPU+Mem)
(4) (1,5) (6)
(V) (A) (W) (A) (W) (A) (W) (W)(mA) (W) (W) (W)(mA) (mA) (mA)
N10P-GS
N10P-GE128bit1024MBDDR3
128bit1024MBDDR3
21.07
(W) (W)
20.97
128bitN10P-LP
1024MBDDR3
15.48
6.67
6.73
6.44
(MHz)
TBD
TBD
TBD
TBD
TBD
TBD
18.25
19.17
13.95
17.34
17.25
11.86
2.06
2.03
1.90
3.09
3.05
2.85
4.09
3.99
6.14
5.99
850 75 0.14
63 0.07
55 0.18
4.09 6.14
0.89
0.85
0.88840
810
75 0.14
75 0.14
63 0.07
63 0.07
55 0.18
55 0.18
Products
GPU Mem NVCLK/MCLK NVVDD
FBVDDFBVDDQ PCI Express I/O and
PLLVDDI/O andPLLVDD
Other
(3.3V)(1.05V)(1.8V)(1.05V)
(1.5V)(1.5V)(GPU+Mem)
(4) (1,5) (6)
(V) (A) (W) (A) (W)
Performance Mode P0 TDP at Tj = 102 C* (DDR3)
(A) (W) (W)(mA) (W) (W) (W)(mA) (mA) (mA)
N10M-GE64bit512MBDDR3
13.36
(W) (W)
14.29
8.28
2.93
3.10
2.91
(MHz)
TBD
TBD
TBD
TBD
TBD
TBD
11.89
11.53
6.60
10.70
11.53
5.61
0.66
0.70
0.62
0.99
1.05
0.93
2.16
2.20
3.24
3.3
792 75 0.14
63 0.07
100 0.33
2.28 3.42
0.83
0.82
0.86817
782
75 0.14
75 0.14
63 0.07
63 0.07
64bitN10M-GS
512MBDDR3
64bitN10M-LP
512MBDDR3
100 0.33
100 0.33
Hot plug detect for IFP Link D
PEX_VDD
(1.8VS)IFPAB_IOVDD
tNV-IFPAB_IOVDD
tNV-FBVDDQ
Power Sequence
0 1
12
0.85V 12
GPIO6
P-State
0,10
GPU_VID1 GPU_VID0 VGA_CORE
0.8V
1 0
00
0.9V
GPIO5 N10M-GS N10P-GS
1 1 1.0V (N10M-GS)
0.925V (N10P-GS)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
XDP_TRST#
XDP_TDO
COMP3
COMP2
COMP1
COMP0
TP_SKTOCC#
H_PECI_ISO
H_THERMTRIP#
H_P M_SYNC_R
VCC PWRGOOD_0
VDDPW RGOOD_R
PLT_RST#_R
SM_RCOMP0SM_RCOMP1SM_RCOMP2
PM_EXTTS#0
PM_EXTTS#1
PM_EXTTS#0
SM_RCOMP0
SM_RCOMP1
H_ CPURST#_R
SM_RCOMP2
PM_EXTTS#1
CLK_CPU_BCLK#
CLK_EXP#CLK_EXP
C LK_CPU_BCLK
XDP_PREQ#
XDP_TDI
XDP_TMSXDP_TCK
H _CATERR#
VCC PWRGOOD_1
XDP_BPM#3XDP_BPM#4
XDP_BPM#0
XDP_BPM#2
XDP_BPM#5
XDP_BPM#1
XDP_BPM#6XDP_BPM#7
H _PROCHOT#
XDP_DBRESET#
XDP_PREQ#
XDP_TMS
XDP_TDO
XDP_TDI
XDP_DBRESET#
XDP_TCK
XDP_TRST#
DRA M_PWRGD
DRAMRST_CNTRL_R
DRAMRST# SM_DRAMRST#
SM_DRAMRST#
VTT_POK
CLK_CPU_ITP#CLK_CPU_ITP
XDP_PRDY#
VCCP_POK
S3_0.75V_EN
VDDPW RGOOD_R
CLK_CPU_BCLK# <16>CLK_CPU_BCLK <16>
CLK_EXP# <14>CLK_EXP <14>
H_PECI<16>
H_PROCHOT#<34,48>
H_PM_SYNC<15>
H_THERMTRIP#<16>
PM_DRAM_PWRGD<15>
BUF_PLT_RST#<16,19,28,29>
H_CPUPW RGD<16>
PM_EXTTS#1_R <10,11>
VCCP_POK<46>
DRAMRST_CNTRL_EC<34>
DRAMRST#<10,11>
DRAMRST_CNTRL_PCH<16>
VCCP_POK<46>
S3_0.75V_EN <44>
+VCCP
+VCCP
+VCCP
+VCCP
+3VS
+3VALW
+1.5V
+5VALW
+1.5V
Title
Size Document Number R e v
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
Arrandale(1/5)-Thermal/XDPCus tom
5 51Thursday, October 29, 2009
2008/10/31 2009/10/31Compal Electronics, Inc.
LA-5752P
Layout Note:Please theseresistors near Processor
DDR3 Compensation Signals
Layout rule 10mil width : tracelength < 0.5", spacing 20mil
pins unused by
Clarksfield on the
rPGA989 Package
CHECK INTEL DOCUMENT #385422Debug Port Design Guide Rev1.3
5
EC GPIO CONTROL
6
PCH GPIO CONTROL
DDR3 CONNECTER
3
3
For Intel S3 Power Reduction.
For Intel S3 Power Reduction.
FROM POWER VTT
POWER GOOD SIGNAL
R1870_0402_5%
1 2
R1371K_0402_5%@1 2
R569 68_0402_5%12
R138 51_0402_1%@1 2
R566 24.9_0402_1%1 2
R301
1K_0402_1%
12
R281 0_0402_5%1 2
R61010K_0402_5%
12
R55749.9_0402_1% 1 2
R1900_0402_5%
1 2
C3380.01U_0402_16V7K
1
2
G
D S
Q272N7002_SOT23 2
1 3
R54849.9_0402_1% 1 2
R195
1.5K_0402_1%
1 2
R1910_0402_5%
1 2
G
D
SQ422N7002_SOT23
2
13
R186
750_0402_1%
12
R567 100_0402_1%1 2
R282 0_0402_5%@1 2
R565 130_0402_1%1 2
T18 P AD
R564 0_0402_5%
1 2
R1841K_0402_1%
12
R56020_0402_1% 1 2
R57 51_0402_1%@1 2
R192
3K_0402_1%@
12
R556 51_0402_1%@1 2
R1931.1K_0402_1%@
12
R283 100K_0402_5%12
R13568_0402_5%12
U8
MC74VHC1G08DFT2G SC70 5P
B2
A1
Y4
P5
G3
R185
1.5K_0402_5%
1 2
R555 0_0402_5%12
R561 10K_0402_5%1 2
R16349.9_0402_1%12
R3000_0402_5%
@
1 2
T17 P AD
R55820_0402_1% 1 2
R134 51_0402_5%1 2
R136 51_0402_1%@1 2
R562 10K_0402_5%1 2
T19 P AD
CLOCKS
MISC
THERMAL
PWR MANAGEMENT
DDR3
MISC
JTAG & BPM
JCPU1B
IC,AUB_CFD_rPGA,R1P0ME@
SM_RCOMP[1]AM1
SM_RCOMP[2]AN1
SM_DRAMRST#F6
SM_RCOMP[0]AL1
BCLK#B16
BCLKA16
BCLK_ITP#AT30
BCLK_ITPAR30
PEG_CLK#D16
PEG_CLKE16
DPLL_REF_SSCLK#A17
DPLL_REF_SSCLKA18
CATERR#AK14
COMP3AT23
PECIAT15
PROCHOT#AN26
THERMTRIP#AK15
RESET_OBS#AP26
VCCPWRGOOD_1AN14
VCCPWRGOOD_0AN27
SM_DRAMPWROKAK13
VTTPWRGOODAM15
RSTIN#AL14
PM_EXT_TS#[0]AN15
PM_EXT_TS#[1]AP15
PRDY#AT28
PREQ#AP27
TCKAN28
TMSAP28
TRST#AT27
TDIAT29
TDOAR27
TDI_MAR29
TDO_MAP29
DBR#AN25
BPM#[0]AJ22
BPM#[1]AK22
BPM#[2]AK24
BPM#[3]AJ24
BPM#[4]AJ25
BPM#[5]AH22
BPM#[6]AK23
BPM#[7]AH23
COMP2AT24
PM_SYNCAL15
TAPPWRGOODAM26
COMP1G16
COMP0AT26
SKTOCC#AH24
R183
560_0402_5%
12
R194
750_0402_1%
12
R563 0_0402_5%1 2
R133 51_0402_5%1 2
R1390_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CFG0
CFG7
CFG4CFG3
CFG0
CFG3
EXP_ICOMPI
EXP_RBIAS
CFG4
H_R SVD17_RH_R SVD18_R
RS VD64_RRS VD65_R
FDI_CTX_PRX_N0FDI_CTX_PRX_N1FDI_CTX_PRX_N2FDI_CTX_PRX_N3FDI_CTX_PRX_N4FDI_CTX_PRX_N5FDI_CTX_PRX_N6FDI_CTX_PRX_N7
FDI_CTX_PRX_P0FDI_CTX_PRX_P1FDI_CTX_PRX_P2FDI_CTX_PRX_P3FDI_CTX_PRX_P4FDI_CTX_PRX_P5FDI_CTX_PRX_P6FDI_CTX_PRX_P7
FDI_LSY NC0
FDI_FSYN C0
FDI_LSY NC1
FDI_FSYN C1
FDI _INT
FDI_FSYN C0
FDI_LSY NC1
FDI_FSYN C1
FDI _INT
FDI_LSY NC0
PCIE_CRX_GTX_N15
PCIE_CRX_GTX_N10
PCIE_CRX_GTX_N14
PCIE_CRX_GTX_N0
PCIE_CRX_GTX_N8
PCIE_CRX_GTX_N6PCIE_CRX_GTX_N7
PCIE_CRX_GTX_N4PCIE_CRX_GTX_N3
PCIE_CRX_GTX_N9
PCIE_CRX_GTX_N12PCIE_CRX_GTX_N13
PCIE_CRX_GTX_N5
PCIE_CRX_GTX_N2PCIE_CRX_GTX_N1
PCIE_CRX_GTX_N11
PCIE_CRX_GTX_P15PCIE_CRX_GTX_P14
PCIE_CRX_GTX_P8
PCIE_CRX_GTX_P4
PCIE_CRX_GTX_P0
PCIE_CRX_GTX_P10
PCIE_CRX_GTX_P7
PCIE_CRX_GTX_P9
PCIE_CRX_GTX_P13
PCIE_CRX_GTX_P6
PCIE_CRX_GTX_P3
PCIE_CRX_GTX_P12
PCIE_CRX_GTX_P5
PCIE_CRX_GTX_P11
PCIE_CRX_GTX_P1PCIE_CRX_GTX_P2
PCIE_CTX_GRX_C_P0
PCIE_CTX_GRX_C_P10
PCIE_CTX_GRX_C_P15PCIE_CTX_GRX_C_P14
PCIE_CTX_GRX_C_P8
PCIE_CTX_GRX_C_P6
PCIE_CTX_GRX_C_P4
PCIE_CTX_GRX_C_P13
PCIE_CTX_GRX_C_P7
PCIE_CTX_GRX_C_P1
PCIE_CTX_GRX_C_P9
PCIE_CTX_GRX_C_P12
PCIE_CTX_GRX_C_P3
PCIE_CTX_GRX_C_P5
PCIE_CTX_GRX_C_P2
PCIE_CTX_GRX_C_P11
PCIE_CTX_GRX_C_N14PCIE_CTX_GRX_C_N15
PCIE_CTX_GRX_C_N0
PCIE_CTX_GRX_C_N10
PCIE_CTX_GRX_C_N6
PCIE_CTX_GRX_C_N8
PCIE_CTX_GRX_C_N13
PCIE_CTX_GRX_C_N4
PCIE_CTX_GRX_C_N9
PCIE_CTX_GRX_C_N5
PCIE_CTX_GRX_C_N2
PCIE_CTX_GRX_C_N12
PCIE_CTX_GRX_C_N7
PCIE_CTX_GRX_C_N1
PCIE_CTX_GRX_C_N11
PCIE_CTX_GRX_C_N3
PCIE_CTX_GRX_N15
PCIE_CTX_GRX_N0
PCIE_CTX_GRX_N14
PCIE_CTX_GRX_N10
PCIE_CTX_GRX_N6
PCIE_CTX_GRX_N8
PCIE_CTX_GRX_N13
PCIE_CTX_GRX_N4
PCIE_CTX_GRX_N9
PCIE_CTX_GRX_N5
PCIE_CTX_GRX_N2
PCIE_CTX_GRX_N12
PCIE_CTX_GRX_N7
PCIE_CTX_GRX_N1
PCIE_CTX_GRX_N11
PCIE_CTX_GRX_N3
PCIE_CTX_GRX_P7
PCIE_CTX_GRX_P0
PCIE_CTX_GRX_P10
PCIE_CTX_GRX_P15PCIE_CTX_GRX_P14
PCIE_CTX_GRX_P3
PCIE_CTX_GRX_P5
PCIE_CTX_GRX_P8
PCIE_CTX_GRX_P6
PCIE_CTX_GRX_P4
PCIE_CTX_GRX_P13
PCIE_CTX_GRX_P2
PCIE_CTX_GRX_P11
PCIE_CTX_GRX_P1
PCIE_CTX_GRX_P9
PCIE_CTX_GRX_P12
DMI_CTX_PRX_P0<15>
DMI_CRX_PTX_P0<15>
DMI_CTX_PRX_N1<15>
DMI_CRX_PTX_N1<15>
DMI_CTX_PRX_P3<15>
DMI_CRX_PTX_P3<15>
DMI_CTX_PRX_P2<15>
DMI_CTX_PRX_N0<15>
DMI_CRX_PTX_N3<15>
DMI_CRX_PTX_P2<15>
DMI_CTX_PRX_N3<15>
DMI_CTX_PRX_P1<15>
DMI_CRX_PTX_N0<15>
DMI_CRX_PTX_N2<15>
DMI_CRX_PTX_P1<15>
DMI_CTX_PRX_N2<15>
PCIE_CTX_GRX_P[0..15] <19>
PCIE_CTX_GRX_N[0..15] <19>
PCIE_CRX_GTX_N[0..15] <19>
PCIE_CRX_GTX_P[0..15] <19>
FDI_CTX_PRX_N0<15>FDI_CTX_PRX_N1<15>FDI_CTX_PRX_N2<15>FDI_CTX_PRX_N3<15>FDI_CTX_PRX_N4<15>FDI_CTX_PRX_N5<15>FDI_CTX_PRX_N6<15>FDI_CTX_PRX_N7<15>
FDI_CTX_PRX_P0<15>FDI_CTX_PRX_P1<15>FDI_CTX_PRX_P2<15>FDI_CTX_PRX_P3<15>FDI_CTX_PRX_P4<15>FDI_CTX_PRX_P5<15>FDI_CTX_PRX_P6<15>FDI_CTX_PRX_P7<15>
FDI_FSYNC0<15>FDI_FSYNC1<15>
FDI_ INT<15>
FDI_LSY NC0<15>FDI_LSY NC1<15>
Title
Size Document Number R e v
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
Arrandale(2/5)-DMI/PEG/FDICus tom
6 51Thursday, October 29, 2009
2008/10/31 2009/10/31Compal Electronics, Inc.
LA-5752P
CFG Straps for PROCESSOR
0: Bifurcation enabled
Not applicable for Clarksfield Processor
1: Single PEG
CFG0
PCI-Express Configuration Select
0: Lane Numbers Reversed
1: Normal Operation
CFG3
CFG3-PCI Express Static Lane Reversal
15 -> 0, 14 ->1, .....
Layout rule tr: acelength < 0.5"
CFG[1:0] 11=1*16 PEG
10=2*8 PEG
FOR ES1 SAMPLE ONLY
0: Enabled; An external Display Port
1: Disabled; No Physical Display Port
CFG4
CFG4-Display Port Presence
attached to Embedded Display Port
device is connected to the EmbeddedDisplay Port
VGA@
PCIE Lane Numbers Reversed
CFG3-PCI Express Static Lane Reversal
C561 0.1U_0402_10V6K1 2
C565 0.1U_0402_10V6K1 2
RESERVED
JCPU1E
IC,AUB_CFD_rPGA,R1P0ME@
CFG[0]AM30
CFG[1]AM28
CFG[2]AP31
CFG[3]AL32
CFG[4]AL30
CFG[5]AM31
CFG[6]AN29
CFG[7]AM32
CFG[8]AK32
CFG[9]AK31
CFG[10]AK28
CFG[11]AJ28
CFG[12]AN30
CFG[13]AN32
CFG[14]AJ32
CFG[15]AJ29
CFG[16]AJ30
CFG[17]AK30
RSVD34AH25
RSVD35AK26
RSVD38AJ26
RSVD_NCTF_42AT3
RSVD39AJ27
RSVD_NCTF_40AP1
RSVD_NCTF_41AT2
RSVD_NCTF_43AR1
RSVD_TP_86H16
RSVD45AL28
RSVD46AL29
RSVD47AP30
RSVD48AP32
RSVD49AL27
RSVD50AT31
RSVD51AT32
RSVD52AP33
RSVD53AR33
RSVD_NCTF_54AT33
RSVD_NCTF_55AT34
RSVD_NCTF_56AP35
RSVD_NCTF_57AR35
RSVD58AR32
RSVD_NCTF_30C35
RSVD_NCTF_31B35
RSVD_NCTF_28A34
RSVD_NCTF_29A33
RSVD27J28
RSVD26J29
RSVD16A19
RSVD15B19
RSVD17A20
RSVD18B20
RSVD20T9
RSVD19U9
RSVD22AB9
RSVD21AC9
RSVD_NCTF_23C1
RSVD_NCTF_24A3
RSVD_TP_66AA5
RSVD_TP_67AA4
RSVD_TP_68R8
RSVD_TP_71AA2
RSVD_TP_72AA1
RSVD_TP_73R9
RSVD_TP_69AD3
RSVD_TP_74AG7
RSVD_TP_70AD2
RSVD_TP_75AE3
RSVD_TP_76V4
RSVD_TP_77V5
RSVD_TP_78N2
RSVD_TP_81W3
RSVD_TP_82W2
RSVD_TP_83N3
RSVD_TP_79AD5
RSVD_TP_84AE5
RSVD_TP_80AD7
RSVD_TP_85AD9
RSVD36AL26
RSVD_NCTF_37AR2
RSVD1AP25
RSVD2AL25
RSVD3AL24
RSVD4AL22
RSVD5AJ33
RSVD6AG9
RSVD7M27
RSVD8L28
SA_DIMM_VREFJ17
SB_DIMM_VREFH17
RSVD11G25
RSVD12G17
RSVD13E31
RSVD14E30
RSVD32AJ13
RSVD33AJ12
RSVD_TP_59E15
RSVD_TP_60F15
KEYA2
RSVD62D15
RSVD63C15
RSVD64AJ15
RSVD65AH15
VSSAP34
R61 3.01K_0402_1%1 2
C557 0.1U_0402_10V6K1 2
R545 750_0402_1%1 2
R532 1K_0402_5%DIS@1 2
C527 0.1U_0402_10V6K1 2
C547 0.1U_0402_10V6K1 2
R5470_0402_5%
@1 2
C562 0.1U_0402_10V6K1 2
R536 1K_0402_5%DIS@1 2
R58 3.01K_0402_1%@1 2
R533 1K_0402_5%DIS@1 2
C541 0.1U_0402_10V6K1 2
C536 0.1U_0402_10V6K1 2
C535 0.1U_0402_10V6K1 2
C560 0.1U_0402_10V6K1 2
C559 0.1U_0402_10V6K1 2
C533 0.1U_0402_10V6K1 2
R535 1K_0402_5%DIS@1 2
R1880_0402_5%
@ 12
R5460_0402_5%
@1 2
C543 0.1U_0402_10V6K1 2
R544 49.9_0402_1%1 2
C532 0.1U_0402_10V6K1 2
C542 0.1U_0402_10V6K1 2R1890_0402_5%
@ 12
C534 0.1U_0402_10V6K1 2
C540 0.1U_0402_10V6K1 2
C558 0.1U_0402_10V6K1 2
C546 0.1U_0402_10V6K1 2
C556 0.1U_0402_10V6K1 2
C530 0.1U_0402_10V6K1 2
C548 0.1U_0402_10V6K1 2
C555 0.1U_0402_10V6K1 2
R534 1K_0402_5%DIS@1 2
C544 0.1U_0402_10V6K1 2
C549 0.1U_0402_10V6K1 2
PCI EXPRESS -- GRAPHICS
DMI
Intel(R) FDI
JCPU1A
IC,AUB_CFD_rPGA,R1P0ME@
DMI_RX#[0]A24
DMI_RX#[1]C23
DMI_RX#[2]B22
DMI_RX#[3]A21
DMI_RX[0]B24
DMI_RX[1]D23
DMI_RX[2]B23
DMI_RX[3]A22
DMI_TX#[0]D24
DMI_TX#[1]G24
DMI_TX#[2]F23
DMI_TX#[3]H23
DMI_TX[0]D25
DMI_TX[1]F24
DMI_TX[3]G23
DMI_TX[2]E23
FDI_TX#[0]E22
FDI_TX#[1]D21
FDI_TX#[2]D19
FDI_TX#[3]D18
FDI_TX#[4]G21
FDI_TX#[5]E19
FDI_TX#[6]F21
FDI_TX#[7]G18
FDI_TX[0]D22
FDI_TX[1]C21
FDI_TX[2]D20
FDI_TX[3]C18
FDI_TX[4]G22
FDI_TX[5]E20
FDI_TX[6]F20
FDI_TX[7]G19
FDI_FSYNC[0]F17
FDI_FSYNC[1]E17
FDI_INTC17
FDI_LSYNC[0]F18
FDI_LSYNC[1]D17
PEG_ICOMPIB26
PEG_ICOMPOA26
PEG_RBIASA25
PEG_RCOMPOB27
PEG_RX#[0]K35
PEG_RX#[1]J34
PEG_RX#[2]J33
PEG_RX#[3]G35
PEG_RX#[4]G32
PEG_RX#[5]F34
PEG_RX#[6]F31
PEG_RX#[7]D35
PEG_RX#[8]E33
PEG_RX#[9]C33
PEG_RX#[10]D32
PEG_RX#[11]B32
PEG_RX#[12]C31
PEG_RX#[13]B28
PEG_RX#[14]B30
PEG_RX#[15]A31
PEG_RX[0]J35
PEG_RX[1]H34
PEG_RX[2]H33
PEG_RX[3]F35
PEG_RX[4]G33
PEG_RX[5]E34
PEG_RX[6]F32
PEG_RX[7]D34
PEG_RX[8]F33
PEG_RX[9]B33
PEG_RX[10]D31
PEG_RX[11]A32
PEG_RX[12]C30
PEG_RX[13]A28
PEG_RX[14]B29
PEG_RX[15]A30
PEG_TX#[0]L33
PEG_TX#[1]M35
PEG_TX#[2]M33
PEG_TX#[3]M30
PEG_TX#[4]L31
PEG_TX#[5]K32
PEG_TX#[6]M29
PEG_TX#[7]J31
PEG_TX#[8]K29
PEG_TX#[9]H30
PEG_TX#[10]H29
PEG_TX#[11]F29
PEG_TX#[12]E28
PEG_TX#[13]D29
PEG_TX#[14]D27
PEG_TX#[15]C26
PEG_TX[0]L34
PEG_TX[1]M34
PEG_TX[2]M32
PEG_TX[3]L30
PEG_TX[4]M31
PEG_TX[5]K31
PEG_TX[6]M28
PEG_TX[7]H31
PEG_TX[8]K28
PEG_TX[9]G30
PEG_TX[10]G29
PEG_TX[11]F28
PEG_TX[12]E27
PEG_TX[13]D28
PEG_TX[14]C27
PEG_TX[15]C25 C550 0.1U_0402_10V6K1 2
C563 0.1U_0402_10V6K1 2
C545 0.1U_0402_10V6K1 2
C564 0.1U_0402_10V6K1 2
R 593.01K_0402_1%
@ 1 2
R60 3.01K_0402_1%
@
1 2
C528 0.1U_0402_10V6K1 2
C529 0.1U_0402_10V6K1 2
C531 0.1U_0402_10V6K1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_ A_D63DDR_ A_D62
DDR_A _D8
DDR_A _D3DDR_A _D4
DDR_A _D7
DDR_A _D5DDR_A _D6
DDR_ A_D59DDR_ A_D58DDR_ A_D57DDR_ A_D56
DDR_ A_D47DDR_ A_D46
DDR_ A_D42DDR_ A_D43
DDR_ A_D34
DDR_ A_D39
DDR_ A_D44DDR_ A_D45
DDR_ A_D35
DDR_ A_D41DDR_ A_D40
DDR_ A_D38
DDR_ A_D36DDR_ A_D37
DDR_ A_D32DDR_ A_D33
DDR_ A_D61DDR_ A_D60
DDR_A _D2DDR_A _D1DDR_A _D0
DDR_ A_D55DDR_ A_D54
DDR_ A_D51
DDR_ A_D48
DDR_ A_D50DDR_ A_D49
DDR_ A_D52DDR_ A_D53
DDR_ A_D31
DDR_ A_D14DDR_ A_D15
DDR_ A_D25DDR_ A_D24
DDR_ A_D26DDR_ A_D27
DDR_ A_D30
DDR_A _D9
DDR_ A_D13DDR_ A_D12
DDR_ A_D10DDR_ A_D11
DDR_ A_D29DDR_ A_D28
DDR_ A_D19DDR_ A_D20
DDR_ A_D16
DDR_ A_D21
DDR_ A_D17
DDR_ A_D22
DDR_ A_D18
DDR_ A_D23
DD R_A_DQS#7
DD R_A_DQS#0
DD R_A_DQS#2
DD R_A_DQS#5
DD R_A_DQS#3
DD R_A_DQS#1
DD R_A_DQS#4
DD R_A_DQS#6
DD R_A_DM7
DD R_A_DM2
DD R_A_DM5DD R_A_DM4
DD R_A_DM1
DD R_A_DM6
DD R_A_DM3
DD R_A_DM0
DDR_A_MA5
DDR_A_MA0
DDR_A_MA9
DDR_A_MA14
DDR_A_MA11
DDR_A_MA4
DDR_A_MA7DDR_A_MA6
DDR_A_MA10
DDR_A_MA1
DDR_A_MA12
DDR_A_MA2
DDR_A_MA13
DDR_A_MA3
DDR_A_MA8
DDR_B _D3
DDR_ B_D51
DDR_ B_D56
DDR_B _D9
DDR_ B_D31
DDR_ B_D39
DDR_ B_D49
DDR_ B_D54
DDR_ B_D57
DDR_ B_D24
DDR_ B_D10
DDR_B _D1
DDR_B _D6
DDR_ B_D44DDR_ B_D43
DDR_ B_D20
DDR_ B_D42
DDR_ B_D55
DDR_ B_D15
DDR_ B_D34
DDR_ B_D23
DDR_ B_D60
DDR_ B_D33
DDR_ B_D11
DDR_ B_D41
DDR_ B_D45
DDR_B _D0
DDR_ B_D48
DDR_ B_D50
DDR_ B_D38
DDR_ B_D21
DDR_ B_D32
DDR_ B_D22
DDR_B _D4
DDR_ B_D14
DDR_ B_D27
DDR_ B_D25
DDR_ B_D62
DDR_ B_D59
DDR_ B_D19
DDR_ B_D52
DDR_B _D7
DDR_B _D5
DDR_ B_D17
DDR_ B_D58
DDR_ B_D30
DDR_ B_D26
DDR_ B_D36
DDR_ B_D13
DDR_ B_D53
DDR_ B_D18
DDR_B _D8
DDR_ B_D35
DDR_ B_D46
DDR_ B_D12
DDR_ B_D47
DDR_ B_D28
DDR_B _D2
DDR_ B_D37
DDR_ B_D63
DDR_ B_D40
DDR_ B_D29
DDR_ B_D61
DDR_ B_D16
DDR_A_MA15
DDR _A_DQS0
DDR _A_DQS2DDR _A_DQS1
DDR _A_DQS6DDR _A_DQS5DDR _A_DQS4DDR _A_DQS3
DDR _A_DQS7
DDR_B_MA0
DDR_B_MA9
DDR_B_MA7
DDR_B_MA13
DDR_B_MA2
DDR_B_MA4
DDR_B_MA11
DDR_B_MA3
DDR_B_MA5DDR_B_MA6
DDR_B_MA10
DDR_B_MA8
DDR_B_MA1
DDR_B_MA12
DDR_B_MA14DDR_B_MA15
DD R_B_DQS#1
DD R_B_DQS#7
DD R_B_DQS#5DD R_B_DQS#4
DD R_B_DQS#0
DD R_B_DQS#3
DD R_B_DQS#6
DD R_B_DQS#2
DDR _B_DQS7
DDR _B_DQS0DDR _B_DQS1
DDR _B_DQS5DDR _B_DQS4DDR _B_DQS3DDR _B_DQS2
DDR _B_DQS6
DD R_B_DM3
DD R_B_DM1
DD R_B_DM5
DD R_B_DM0
DD R_B_DM6DD R_B_DM7
DD R_B_DM4
DD R_B_DM2
DDR_A_MA[0..15] <10>
DDR_A_DM[0..7] <10>
DDR_A _D[0..63]<10>
DDR_A_BS0<10>DDR_A_BS1<10>DDR_A_BS2<10>
DDR_A_WE#<10>DDR_A_RAS#<10>DDR_A_CAS#<10>
DDR_B_MA[0..15] <11>
DDR_B_DM[0..7] <11>
DDR_B_BS0<11>DDR_B_BS1<11>DDR_B_BS2<11>
DDR_B_WE#<11>DDR_B_RAS#<11>DDR_B_CAS#<11>
DDR_B _D[0..63]<11>M _CLK_DDR0 <10>M_CLK_DDR#0 <10>DDR_CKE0_DIMMA <10>
M _CLK_DDR1 <10>M_CLK_DDR#1 <10>DDR_CKE1_DIMMA <10>
DDR_CS0_DIMMA# <10>DDR_CS1_DIMMA# <10>
M_ODT0 <10>M_ODT1 <10>
M_ODT2 <11>M_ODT3 <11>
DDR_CS2_DIMMB# <11>DDR_CS3_DIMMB# <11>
DDR_B_DQS[0..7] <11>
DDR_A_DQS#[0..7] <10>
DDR_A_DQS[0..7] <10>
DDR_B_DQS#[0..7] <11>
M _CLK_DDR2 <11>M _CLK_DDR#2 <11>DDR_CKE2_DIMMB <11>
M _CLK_DDR3 <11>M _CLK_DDR#3 <11>DDR_CKE3_DIMMB <11>
Title
Size Document Number R e v
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
Arrandale(3/5)-DDR IIICustom
7 51Thursday, October 29, 2009
2008/10/31 2009/10/31Compal Electronics, Inc.
LA-5752P
DDR SYSTEM MEMORY A
JCPU1C
IC,AUB_CFD_rPGA,R1P0ME@
SA_BS[0]AC3
SA_BS[1]AB2
SA_BS[2]U7
SA_CAS#AE1
SA_RAS#AB3
SA_WE#AE9
SA_CK[0]AA6
SA_CK[1]Y6
SA_CK#[0]AA7
SA_CK#[1]Y5
SA_CKE[0]P7
SA_CKE[1]P6
SA_CS#[0]AE2
SA_CS#[1]AE8
SA_ODT[0]AD8
SA_ODT[1]AF9
SA_DM[0]B9
SA_DM[1]D7
SA_DM[2]H7
SA_DM[3]M7
SA_DM[4]AG6
SA_DM[5]AM7
SA_DM[6]AN10
SA_DM[7]AN13
SA_DQS[0]C8
SA_DQS#[0]C9
SA_DQS[1]F9
SA_DQS#[1]F8
SA_DQS[2]H9
SA_DQS#[2]J9
SA_DQS[3]M9
SA_DQS#[3]N9
SA_DQS[4]AH8
SA_DQS#[4]AH7
SA_DQS[5]AK10
SA_DQS#[5]AK9
SA_DQS[6]AN11
SA_DQS#[6]AP11
SA_DQS[7]AR13
SA_DQS#[7]AT13
SA_MA[0]Y3
SA_MA[1]W1
SA_MA[2]AA8
SA_MA[3]AA3
SA_MA[4]V1
SA_MA[5]AA9
SA_MA[6]V8
SA_MA[7]T1
SA_MA[8]Y9
SA_MA[9]U6
SA_MA[10]AD4
SA_MA[11]T2
SA_MA[12]U3
SA_MA[13]AG8
SA_MA[14]T3
SA_MA[15]V9
SA_DQ[0]A10
SA_DQ[1]C10
SA_DQ[2]C7
SA_DQ[3]A7
SA_DQ[4]B10
SA_DQ[5]D10
SA_DQ[6]E10
SA_DQ[7]A8
SA_DQ[8]D8
SA_DQ[9]F10
SA_DQ[10]E6
SA_DQ[11]F7
SA_DQ[12]E9
SA_DQ[13]B7
SA_DQ[14]E7
SA_DQ[15]C6
SA_DQ[16]H10
SA_DQ[17]G8
SA_DQ[18]K7
SA_DQ[19]J8
SA_DQ[20]G7
SA_DQ[21]G10
SA_DQ[22]J7
SA_DQ[23]J10
SA_DQ[24]L7
SA_DQ[25]M6
SA_DQ[26]M8
SA_DQ[27]L9
SA_DQ[28]L6
SA_DQ[29]K8
SA_DQ[30]N8
SA_DQ[31]P9
SA_DQ[32]AH5
SA_DQ[33]AF5
SA_DQ[34]AK6
SA_DQ[35]AK7
SA_DQ[36]AF6
SA_DQ[37]AG5
SA_DQ[38]AJ7
SA_DQ[39]AJ6
SA_DQ[40]AJ10
SA_DQ[41]AJ9
SA_DQ[42]AL10
SA_DQ[43]AK12
SA_DQ[44]AK8
SA_DQ[45]AL7
SA_DQ[46]AK11
SA_DQ[47]AL8
SA_DQ[48]AN8
SA_DQ[49]AM10
SA_DQ[50]AR11
SA_DQ[51]AL11
SA_DQ[52]AM9
SA_DQ[53]AN9
SA_DQ[54]AT11
SA_DQ[55]AP12
SA_DQ[56]AM12
SA_DQ[57]AN12
SA_DQ[58]AM13
SA_DQ[59]AT14
SA_DQ[60]AT12
SA_DQ[61]AL13
SA_DQ[62]AR14
SA_DQ[63]AP14
DDR SYSTEM MEMORY - B
JCPU1D
IC,AUB_CFD_rPGA,R1P0ME@
SB_BS[0]AB1
SB_BS[1]W5
SB_BS[2]R7
SB_CAS#AC5
SB_RAS#Y7
SB_WE#AC6
SB_CK[0]W8
SB_CK[1]V7
SB_CK#[0]W9
SB_CK#[1]V6
SB_CKE[0]M3
SB_CKE[1]M2
SB_CS#[0]AB8
SB_CS#[1]AD6
SB_ODT[0]AC7
SB_ODT[1]AD1
SB_DM[0]D4
SB_DM[1]E1
SB_DM[2]H3
SB_DM[3]K1
SB_DM[4]AH1
SB_DM[5]AL2
SB_DM[6]AR4
SB_DM[7]AT8
SB_DQS[4]AG2
SB_DQS#[4]AH2
SB_DQS[5]AL5
SB_DQS#[5]AL4
SB_DQS[6]AP5
SB_DQS#[6]AR5
SB_DQS[7]AR7
SB_DQS#[7]AR8
SB_DQS[0]C5
SB_DQS#[0]D5
SB_DQS[1]E3
SB_DQS#[1]F4
SB_DQS[2]H4
SB_DQS#[2]J4
SB_DQS[3]M5
SB_DQS#[3]L4
SB_MA[0]U5
SB_MA[1]V2
SB_MA[2]T5
SB_MA[3]V3
SB_MA[4]R1
SB_MA[5]T8
SB_MA[6]R2
SB_MA[7]R6
SB_MA[8]R4
SB_MA[9]R5
SB_MA[10]AB5
SB_MA[11]P3
SB_MA[12]R3
SB_MA[13]AF7
SB_MA[14]P5
SB_MA[15]N1
SB_DQ[0]B5
SB_DQ[1]A5
SB_DQ[2]C3
SB_DQ[3]B3
SB_DQ[4]E4
SB_DQ[5]A6
SB_DQ[6]A4
SB_DQ[7]C4
SB_DQ[8]D1
SB_DQ[9]D2
SB_DQ[10]F2
SB_DQ[11]F1
SB_DQ[12]C2
SB_DQ[13]F5
SB_DQ[14]F3
SB_DQ[15]G4
SB_DQ[16]H6
SB_DQ[17]G2
SB_DQ[18]J6
SB_DQ[19]J3
SB_DQ[20]G1
SB_DQ[21]G5
SB_DQ[22]J2
SB_DQ[23]J1
SB_DQ[24]J5
SB_DQ[25]K2
SB_DQ[26]L3
SB_DQ[27]M1
SB_DQ[28]K5
SB_DQ[29]K4
SB_DQ[30]M4
SB_DQ[31]N5
SB_DQ[32]AF3
SB_DQ[33]AG1
SB_DQ[34]AJ3
SB_DQ[35]AK1
SB_DQ[36]AG4
SB_DQ[37]AG3
SB_DQ[38]AJ4
SB_DQ[39]AH4
SB_DQ[40]AK3
SB_DQ[41]AK4
SB_DQ[42]AM6
SB_DQ[43]AN2
SB_DQ[44]AK5
SB_DQ[45]AK2
SB_DQ[46]AM4
SB_DQ[47]AM3
SB_DQ[48]AP3
SB_DQ[49]AN5
SB_DQ[50]AT4
SB_DQ[51]AN6
SB_DQ[52]AN4
SB_DQ[53]AN3
SB_DQ[54]AT5
SB_DQ[55]AT6
SB_DQ[56]AN7
SB_DQ[57]AP6
SB_DQ[58]AP8
SB_DQ[59]AT9
SB_DQ[60]AT7
SB_DQ[61]AP9
SB_DQ[62]AR10
SB_DQ[63]AT10
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCCSENSEVSSSENSE
VCCSENSE
VSSSENSE
H_V ID1
H_V ID4H_V ID3
H_V ID5
VCC_SENSE
H_V ID2
PM_DPRSLPVR_R
H_V ID0
VSS_SENSE
H_V ID6
VTT_SELECT
GFX_IMON
GFX_IMON
GFX_VR_EN
GFX_VR_EN
SUSP
1.5V_DDR3_GATE
PSI# <48>
H_VID[0..6] <48>
P ROC_DPRSLPVR <48>
IMVP_IMON <48>
VTT_SENSE <46>
V CCSENSE <48>VSSSENSE <48>
VTT_SELECT <46>
GFXVR_IMON <47>
GFXVR_DPRSLPVR <47>GFXVR_EN <47>
GFXVR_VID_0 <47>GFXVR_VID_1 <47>
GFXVR_VID_3 <47>GFXVR_VID_2 <47>
GFXVR_VID_4 <47>GFXVR_VID_5 <47>GFXVR_VID_6 <47>
VSS_AXG_SENSE <47>VCC_AXG_SENSE <47>
SUSP<39,44,45>
+CP U_CORE
+CPU_CORE
+VCCP
+VCCP
+VCCP
+1.5V_DDR3
+VCCP
+1.8VS
+VCCP
+VCCP
+VCCP
+GFX_CORE
+1.5V
+1.5V_DDR3
+1.5V +1.5V_DDR3
+5VALW
+1.5V_DDR3
Title
Size Document Number R e v
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
Arrandale(4/5)-PWRCus tom
8 51Thursday, October 29, 2009
2008/10/31 2009/10/31Compal Electronics, Inc.
LA-5752P
CP
U
H_VTTVID1 = Low, 1.1V FOR Clarksfiel
H_VTTVID1 = High, 1.05V FOR Auburndale
48A 15A18A
3A
0.6A
Close to CPU
BUT A SMALL AMOUNT OF POWER
(~15MW) MAYBE WASTED
DESIGN GUIDE REV1.1
AS NO CONNECT
2
1
1
For Intel S3 Power Reduction.
For Intel S3 Power Reduction.
Modify for cost revew.
09/16/2009
POWER
GRAPHICS VIDs
GRAPHICS
DDR3 - 1.5V RAILS
FDI
PEG & DMI
SENSE
LINES
1.1V
1.8V
JCPU1G
IC,AUB_CFD_rPGA,R1P0ME@
GFX_VID[0]AM22
GFX_VID[1]AP22
GFX_VID[2]AN22
GFX_VID[3]AP23
GFX_VID[4]AM23
GFX_VID[5]AP24
GFX_VID[6]AN24
GFX_VR_ENAR25
GFX_DPRSLPVRAT25
GFX_IMONAM24
VAXG_SENSEAR22
VSSAXG_SENSEAT22
VAXG1AT21
VAXG2AT19
VAXG3AT18
VAXG4AT16
VAXG5AR21
VAXG6AR19
VAXG7AR18
VAXG8AR16
VAXG9AP21
VAXG10AP19
VAXG11AP18
VAXG12AP16
VAXG13AN21
VAXG14AN19
VAXG15AN18
VAXG16AN16
VAXG17AM21
VAXG18AM19
VAXG19AM18
VAXG20AM16
VAXG21AL21
VAXG22AL19
VAXG23AL18
VAXG24AL16
VAXG25AK21
VAXG26AK19
VAXG27AK18
VAXG28AK16
VAXG29AJ21
VAXG30AJ19
VAXG31AJ18
VAXG32AJ16
VAXG33AH21
VAXG34AH19
VAXG35AH18
VAXG36AH16
VTT1_45J24
VTT1_46J23
VTT1_47H25
VTT1_48K26
VTT1_49J27
VTT1_50J26
VTT1_51J25
VTT1_52H27
VTT1_53G28
VTT1_54G27
VTT1_55G26
VTT1_56F26
VTT1_57E26
VTT1_58E25
VDDQ1AJ1
VDDQ2AF1
VDDQ3AE7
VDDQ4AE4
VDDQ5AC1
VDDQ6AB7
VDDQ7AB4
VDDQ8Y1
VDDQ9W7
VDDQ10W4
VDDQ11U1
VDDQ12T7
VDDQ13T4
VDDQ14P1
VDDQ15N7
VDDQ16N4
VDDQ17L1
VDDQ18H1
VTT0_59P10
VTT0_60N10
VTT0_61L10
VTT0_62K10
VCCPLL1L26
VCCPLL2L27
VCCPLL3M26
VTT1_63J22
VTT1_64J20
VTT1_65J18
VTT1_66H21
VTT1_67H20
VTT1_68H19
R56 0_0402_5%1 2
C160
22U_0805_6.3V6M
@
1
2
C2
73
10
U_
08
05
_1
0V
4K
1
2
G
D
S
Q232N7002_SOT23
2
13
C2
58
22
U_
08
05
_6
.3V
6M
1
2
G
D
S
Q19BSS138_NL_SOT23-3
2
13
C2
15
10
U_
08
05
_1
0V
4K
1
2
C2
16
10
U_
08
05
_1
0V
4K
@1
2C
21
81
0U
_0
80
5_
10
V4
K
1
2
+
C5
54
33
0U
_D
2_
2.5
VY
_R
9M
1
2
C2
07
10
U_
08
05
_1
0V
4K
1
2
C2
89
0.1
U_
04
02
_1
0V
6K
1
2
C2
52
22
U_
08
05
_6
.3V
6M
1
2
C1
82
10
U_
08
05
_1
0V
4K
1
2
C2
57
1U
_0
60
3_
10
V4
Z
1
2
T15P AD@
C2
72
10
U_
08
05
_1
0V
4K
1
2
C2
08
10
U_
08
05
_1
0V
4K
1
2
+
C2
68
22
0U
_B
2_
2.5
VM
_R
35
@
1
2
C2
40
10
U_
08
05
_1
0V
4K
1
2
R2670_0402_5%
@12
R26820K_0402_5%
C2
13
10
U_
08
05
_1
0V
4K
1
2
C1
67
1U
_0
60
3_
10
V4
Z
1
2
C189
22U_0805_6.3V6M
UMA@
1
2
C191
22U_0805_6.3V6M
@
1
2
C2
70
10
U_
08
05
_1
0V
4K
@1
2
C1
68
2.2
U_
06
03
_6
.3V
4Z
1
2
R559
0_0402_5%
DIS@
12
R141 0_0402_5%UMA@
1 2
C2
10
10
U_
08
05
_1
0V
4K
1
2
R551 100_0402_1%1 2
R608 1K_0402_5%1 2
C2
09
10
U_
08
05
_1
0V
4K
1
2
U11
SI4800BDY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
R1404.7K_0402_5%
UMA@
1 2
C2
19
10
U_
08
05
_1
0V
4K
1
2
C2
74
10
U_
08
05
_1
0V
4K
1
2
C2
53
1U
_0
60
3_
10
V4
Z
1
2
C1
49
1U
_0
60
3_
10
V4
Z
1
2
C2
56
1U
_0
60
3_
10
V4
Z
1
2
C1
98
10
U_
08
05
_1
0V
4K
1
2
C2
55
1U
_0
60
3_
10
V4
Z
1
2
C2
11
10
U_
08
05
_1
0V
4K
1
2
C1
69
10
U_
08
05
_1
0V
4K
1
2
C2
69
0.1
U_
04
02
_1
0V
6K
@
1
2
C591
10U_0805_6.3V6M
UMA@
1
2
C2
01
10
U_
08
05
_1
0V
4K
1
2
C2
17
10
U_
08
05
_1
0V
4K
1
2
C2
88
0.1
U_
04
02
_1
0V
6K
1
2
C2
12
10
U_
08
05
_1
0V
4K
1
2
C2
71
10
U_
08
05
_1
0V
4K
1
2
R552 100_0402_1%1 2
C1
70
4.7
U_
06
03
_6
.3V
6K
1
2
C1
81
10
U_
08
05
_1
0V
4K
1
2
R553 0_0402_5%1 2
R5540_0402_5%
1 2
J2
JUMP_43X118@
11
22
R1321K_0402_5%
DIS@
12
C2
54
1U
_0
60
3_
10
V4
Z
1
2
C2
86
0.1
U_
04
02
_1
0V
6K
1
2
C161
22U_0805_6.3V6M
@
1
2
C159
22U_0805_6.3V6M
UMA@
1
2
C190
22U_0805_6.3V6M
@
1
2
C2
14
10
U_
08
05
_1
0V
4K
1
2
C1
99
10
U_
08
05
_1
0V
4K
1
2
C2
00
10
U_
08
05
_1
0V
4K
1
2
J3
JUMP_43X118@
11
22
C2
87
0.1
U_
04
02
_1
0V
6K
1
2
POWER
CPU CORE SUPPLY
1.1V RAIL POWER
SENSE LINES
CPU VIDS
JCPU1F
IC,AUB_CFD_rPGA,R1P0ME@
ISENSEAN35
VTT_SENSEB15
PSI#AN33
VID[0]AK35
VID[1]AK33
VID[2]AK34
VID[3]AL35
VID[4]AL33
VID[5]AM33
VID[6]AM35
PROC_DPRSLPVRAM34
VTT_SELECTG15
VCC_SENSEAJ34
VSS_SENSE_VTTA15
VCC1AG35
VCC2AG34
VCC3AG33
VCC4AG32
VCC5AG31
VCC6AG30
VCC7AG29
VCC8AG28
VCC9AG27
VCC10AG26
VCC11AF35
VCC12AF34
VCC13AF33
VCC14AF32
VCC15AF31
VCC16AF30
VCC17AF29
VCC18AF28
VCC19AF27
VCC20AF26
VCC21AD35
VCC22AD34
VCC23AD33
VCC24AD32
VCC25AD31
VCC26AD30
VCC27AD29
VCC28AD28
VCC29AD27
VCC30AD26
VCC31AC35
VCC32AC34
VCC33AC33
VCC34AC32
VCC35AC31
VCC36AC30
VCC37AC29
VCC38AC28
VCC39AC27
VCC40AC26
VCC41AA35
VCC42AA34
VCC43AA33
VCC44AA32
VCC45AA31
VCC46AA30
VCC47AA29
VCC48AA28
VCC49AA27
VCC50AA26
VCC51Y35
VCC52Y34
VCC53Y33
VCC54Y32
VCC55Y31
VCC56Y30
VCC57Y29
VCC58Y28
VCC59Y27
VCC60Y26
VCC61V35
VCC62V34
VCC63V33
VCC64V32
VCC65V31
VCC66V30
VCC67V29
VCC68V28
VCC69V27
VCC70V26
VCC71U35
VCC72U34
VCC73U33
VCC74U32
VCC75U31
VCC76U30
VCC77U29
VCC78U28
VCC79U27
VCC80U26
VCC81R35
VCC82R34
VCC83R33
VCC84R32
VCC85R31
VCC86R30
VCC87R29
VCC88R28
VCC89R27
VCC90R26
VCC91P35
VCC92P34
VCC93P33
VCC94P32
VCC95P31
VCC96P30
VCC97P29
VCC98P28
VCC99P27
VCC100P26
VTT0_33AF10
VTT0_34AE10
VTT0_35AC10
VTT0_36AB10
VTT0_37Y10
VTT0_38W10
VTT0_39U10
VTT0_40T10
VTT0_41J12
VTT0_42J11
VTT0_1AH14
VTT0_2AH12
VTT0_3AH11
VTT0_4AH10
VTT0_5J14
VTT0_6J13
VTT0_7H14
VTT0_8H12
VTT0_9G14
VTT0_10G13
VTT0_11G12
VTT0_12G11
VTT0_13F14
VTT0_14F13
VTT0_15F12
VTT0_16F11
VTT0_17E14
VTT0_18E12
VTT0_19D14
VTT0_20D13
VTT0_21D12
VTT0_22D11
VTT0_23C14
VTT0_24C13
VTT0_25C12
VTT0_26C11
VTT0_27B14
VTT0_28B12
VTT0_29A14
VTT0_30A13
VTT0_31A12
VTT0_32A11
VSS_SENSEAJ35
VTT0_43J16
VTT0_44J15
C3250.1U_0603_25V7K
1
2
C592
10U_0805_6.3V6M
UMA@
1
2
R233220_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VSS_NCTF7_R
VSS_NCTF5_R
VSS_NCTF3_RVSS_NCTF2_RVSS_NCTF1_R
VSS_NCTF6_R
VSS_NCTF4_R
+CPU_CORE
Title
Size Document Number R e v
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
Arrandale(5/5)-GND/BypassCus tom
9 51Thursday, October 29, 2009
2008/10/31 2009/10/31Compal Electronics, Inc.
LA-5752P
470uF 4.5mohm
Under cavity
between Inductor and socket
CPU CORE
Inside cavity
C1
62
10
U_
08
05
_6
.3V
6M
1
2
C1
48
10
U_
08
05
_6
.3V
6M
1
2
C5
84
22
U_
08
05
_6
.3V
6M
1
2
C1
29
22
U_
08
05
_6
.3V
6M
1
2
C1
63
10
U_
08
05
_6
.3V
6M
1
2
C8
81
0U
_0
80
5_
6.3
V6
M
1
2
C9
02
2U
_0
80
5_
6.3
V6
M
1
2
C1
92
10
U_
08
05
_6
.3V
6M
1
2
C5
79
22
U_
08
05
_6
.3V
6M
1
2
C5
78
22
U_
08
05
_6
.3V
6M
1
2
C9
12
2U
_0
80
5_
6.3
V6
M
1
2
+
C9
24
70
U_
D2
T_
2V
M
1
2 3
C1
94
10
U_
08
05
_6
.3V
6M
1
2
C1
93
10
U_
08
05
_6
.3V
6M
1
2
+
C7
64
70
U_
D2
T_
2V
M
1
2 3
C1
65
10
U_
08
05
_6
.3V
6M
1
2
C5
83
22
U_
08
05
_6
.3V
6M
1
2
C5
85
22
U_
08
05
_6
.3V
6M
1
2
VSS
NCTF
JCPU1I
IC,AUB_CFD_rPGA,R1P0ME@
VSS161K27
VSS162K9
VSS163K6
VSS164K3
VSS165J32
VSS166J30
VSS167J21
VSS168J19
VSS169H35
VSS170H32
VSS171H28
VSS172H26
VSS173H24
VSS174H22
VSS175H18
VSS176H15
VSS177H13
VSS178H11
VSS179H8
VSS180H5
VSS181H2
VSS182G34
VSS183G31
VSS184G20
VSS185G9
VSS186G6
VSS187G3
VSS188F30
VSS189F27
VSS190F25
VSS191F22
VSS192F19
VSS193F16
VSS194E35
VSS195E32
VSS196E29
VSS197E24
VSS198E21
VSS199E18
VSS200E13
VSS201E11
VSS202E8
VSS203E5
VSS204E2
VSS205D33
VSS206D30
VSS207D26
VSS208D9
VSS209D6
VSS210D3
VSS211C34
VSS212C32
VSS213C29
VSS214C28
VSS215C24
VSS216C22
VSS217C20
VSS218C19
VSS219C16
VSS220B31
VSS221B25
VSS222B21
VSS223B18
VSS224B17
VSS225B13
VSS226B11
VSS227B8
VSS228B6
VSS229B4
VSS230A29
VSS_NCTF1AT35
VSS_NCTF2AT1
VSS_NCTF3AR34
VSS_NCTF4B34
VSS_NCTF5B2
VSS_NCTF6B1
VSS_NCTF7A35
VSS231A27
VSS232A23
VSS233A9
VSS
JCPU1H
IC,AUB_CFD_rPGA,R1P0ME@
VSS1AT20
VSS2AT17
VSS3AR31
VSS4AR28
VSS5AR26
VSS6AR24
VSS7AR23
VSS8AR20
VSS9AR17
VSS10AR15
VSS11AR12
VSS12AR9
VSS13AR6
VSS14AR3
VSS15AP20
VSS16AP17
VSS17AP13
VSS18AP10
VSS19AP7
VSS20AP4
VSS21AP2
VSS22AN34
VSS23AN31
VSS24AN23
VSS25AN20
VSS26AN17
VSS27AM29
VSS28AM27
VSS29AM25
VSS30AM20
VSS31AM17
VSS32AM14
VSS33AM11
VSS34AM8
VSS35AM5
VSS36AM2
VSS37AL34
VSS38AL31
VSS39AL23
VSS40AL20
VSS41AL17
VSS42AL12
VSS43AL9
VSS44AL6
VSS45AL3
VSS46AK29
VSS47AK27
VSS48AK25
VSS49AK20
VSS50AK17
VSS51AJ31
VSS52AJ23
VSS53AJ20
VSS54AJ17
VSS55AJ14
VSS56AJ11
VSS57AJ8
VSS58AJ5
VSS59AJ2
VSS60AH35
VSS61AH34
VSS62AH33
VSS63AH32
VSS64AH31
VSS65AH30
VSS66AH29
VSS67AH28
VSS68AH27
VSS69AH26
VSS70AH20
VSS71AH17
VSS72AH13
VSS73AH9
VSS74AH6
VSS75AH3
VSS76AG10
VSS77AF8
VSS78AF4
VSS79AF2
VSS80AE35
VSS81AE34
VSS82AE33
VSS83AE32
VSS84AE31
VSS85AE30
VSS86AE29
VSS87AE28
VSS88AE27
VSS89AE26
VSS90AE6
VSS91AD10
VSS92AC8
VSS93AC4
VSS94AC2
VSS95AB35
VSS96AB34
VSS97AB33
VSS98AB32
VSS99AB31
VSS100AB30
VSS101AB29
VSS102AB28
VSS103AB27
VSS104AB26
VSS105AB6
VSS106AA10
VSS107Y8
VSS108Y4
VSS109Y2
VSS110W35
VSS111W34
VSS112W33
VSS113W32
VSS114W31
VSS115W30
VSS116W29
VSS117W28
VSS118W27
VSS119W26
VSS120W6
VSS121V10
VSS122U8
VSS123U4
VSS124U2
VSS125T35
VSS126T34
VSS127T33
VSS128T32
VSS129T31
VSS130T30
VSS131T29
VSS132T28
VSS133T27
VSS134T26
VSS135T6
VSS136R10
VSS137P8
VSS138P4
VSS139P2
VSS140N35
VSS141N34
VSS142N33
VSS143N32
VSS144N31
VSS145N30
VSS146N29
VSS147N28
VSS148N27
VSS149N26
VSS150N6
VSS151M10
VSS152L35
VSS153L32
VSS154L29
VSS155L8
VSS156L5
VSS157L2
VSS158K34
VSS159K33
VSS160K30
C5
80
22
U_
08
05
_6
.3V
6M
1
2
C8
91
0U
_0
80
5_
6.3
V6
M
1
2
C1
66
10
U_
08
05
_6
.3V
6M
1
2
C1
96
10
U_
08
05
_6
.3V
6M
1
2
C5
77
22
U_
08
05
_6
.3V
6M
1
2
C5
74
22
U_
08
05
_6
.3V
6M
1
2
C1
97
10
U_
08
05
_6
.3V
6M
1
2C
57
12
2U
_0
80
5_
6.3
V6
M
1
2
C5
68
22
U_
08
05
_6
.3V
6M
1
2
C1
47
10
U_
08
05
_6
.3V
6M
1
2
C5
73
22
U_
08
05
_6
.3V
6M
1
2
+
C7
54
70
U_
D2
T_
2V
M
1
2 3
+
C1
64
47
0U
_D
2T
_2
VM
1
2 3
C1
95
10
U_
08
05
_6
.3V
6M
1
2
C8
72
2U
_0
80
5_
6.3
V6
M
1
2
C1
80
10
U_
08
05
_6
.3V
6M
1
2
C1
79
10
U_
08
05
_6
.3V
6M
1
2
C5
72
22
U_
08
05
_6
.3V
6M
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_ A_D31
DDR_ A_D12
DDR_CKE0_DIMMA
DDR_ A_D59
DDR_A _D6
DDR_A_MA3
SMB_CLK_S3
DDR_CS1_DIMMA#
DDR_ A_D39
D DR_A_BS1
DDR _A_DQS0
DDR _A_WE#
DDR_A_MA7
DDR_A_MA0
DD R_A_DM2
DD R_A_DM1
DDR _A_DQS7
DDR_A _D0
DDR_ A_D57
DDR_ A_D46
DDR_ A_D28
DD R_A_DM0
DDR_ A_D19
DD R_A_DQS#5
DDR_ A_D51
DDR_A _D4
DD R_A_DM4
DDR_ A_D30
DDR _A_DQS2
DDR_ A_D44
DD R_A_RAS#
DDR_ A_D33
DDR_ A_D58
DD R_A_DM5
DDR _A_DQS3
DDR_A_MA8
DDR_CS0_DIMMA#
DDR_ A_D10
DDR_A_MA6
DDR_ A_D27
DDR_A _D3
DRAMRST#
DDR_A_MA10
DD R_A_DQS#7
DDR_A _D1
DD R_A_DQS#6
DDR_ A_D40
DDR_A_MA9
DDR_ A_D16
DDR_ A_D29
DD R_A_DQS#4
DDR_ A_D52
DD R_A_DM3
DDR _A_DQS5
DDR_ A_D54
DDR_ A_D49
D DR_A_BS2
DDR_ A_D45
DDR_A _D9
DD R_A_DM7
DDR_A _D7
DDR_A_MA1
DDR_ A_D13
DDR_ A_D20
DDR_ A_D60
D DR_A_BS0
DD R_A_CAS# M_ODT0
DDR_ A_D37
DDR_A_MA5
DD R_A_DQS#1
DDR_A_MA14
DDR_ A_D55
DDR_A_MA4
DDR_ A_D21
DDR_ A_D62
DDR_ A_D24
DDR_ A_D15
DDR_ A_D23
DDR_ A_D56
DDR_ A_D53
DDR_ A_D47
DDR_ A_D18
M_ODT1
DDR_ A_D43
DDR_ A_D34
M _CLK_DDR1M _CLK_DDR#1
DDR_ A_D48
SMB_DATA_S3
DD R_A_DQS#2
DDR_ A_D11
DDR_ A_D38
M _CLK_DDR0M _CLK_DDR#0
DD R_A_DQS#3
DDR_ A_D32
DDR_A _D8
DDR _A_DQS1
DDR_A_MA13
DDR_A_MA11
DDR_ A_D50
DDR_ A_D61
DDR_A_MA2
DDR_ A_D41
DDR_ A_D17
DDR_ A_D36
DDR_ A_D26
DDR_ A_D63
DDR_A _D2
DDR_A _D5
DDR_ A_D22
DDR_ A_D25
DDR _A_DQS6
DDR_ A_D35
DDR_ A_D14
DDR_A_MA12
DD R_A_DQS#0
DDR _A_DQS4
DD R_A_DM6
DDR_ A_D42
DDR_CKE1_DIMMA
PM_EXTTS#1_R
+VREF_DQ_DIMMA
DDR_A_MA15
DDR_A_DQS#[0..7]<7>
DDR_A _D[0..63]<7>
DDR_A_DM[0..7]<7>
DDR_A_DQS[0..7]<7>
DDR_A_MA[0..15]<7>
DDR_CKE0_DIMMA<7>
DDR_A_BS2<7>
M _CLK_DDR0<7>M_CLK_DDR#0<7>
DDR_A_BS0<7>
DDR_A_WE#<7>DDR_A_CAS#<7>
DDR_CS1_DIMMA#<7>
DDR_CKE1_DIMMA <7>
DDR_A_BS1 <7>DDR_A_RAS# <7>
DDR_CS0_DIMMA# <7>M_ODT0 <7>
M _CLK_DDR1 <7>M_CLK_DDR#1 <7>
M_ODT1 <7>
DRAMRST# <5,11>
PM_EXTTS#1_R <5,11>SMB_DATA_S3 <11,12,14,28>SMB_CLK_S3 <11,12,14,28>
+0.75VS
+3VS
+1.5V +1.5V+VREF_DQ_DIMMA
+1.5V
+VREF_DQ_DIMMA
+1.5V
+0.75VS
+VREF_DQ_DIMMA
Title
Size Document Number R e v
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
DDRIII-SODIMM SLOT1Custom
10 51Thursday, October 29, 2009
2008/10/31 2009/10/31Compal Electronics, Inc.
LA-5752P
DDR3 SO-DIMM A
Layout Note:
Place near DIMM
3A@3A@3A@3A@ 1.5V1.5V1.5V1.5V
0.0.0.0. 65A@0.75V65A@0.75V65A@0.75V65A@0.75V3*330uf / 12m ohm (TOTAL FOR 2 SO-DIMMs)
6*0603 10uf (PER CONNECTOR)
VDDQ(1.5V) =
3*0805 10uf
VTT(0.75V) =
4*0402 1uf
1*0402 0.1uf
VREF =
1*0402 2.2uf
VDDSPD (3.3V)=
1*0402 0.1uf 1*0402 2.2uf
For Arranale only +VREF_DQ_DIMMA supply from a external 1.5V voltage divide
circuit.
07/17/2009
C6
08
2.2
U_
06
03
_6
.3V
4Z
1
2
C3
10
10
U_
06
03
_6
.3V
6M
1
2
+ C569220U_B2_2.5VM_R35
1
2
C3
17
0.1
U_
04
02
_1
0V
6K
1
2
C5
81
10
U_
06
03
_6
.3V
6M
1
2
C3
16
0.1
U_
04
02
_1
0V
6K
1
2
C3
14
0.1
U_
04
02
_1
0V
6K
1
2
C6
17
0.1
U_
04
02
_1
0V
6K
1
2
C5
70
10
U_
06
03
_6
.3V
6M
1
2
C3
47
2.2
U_
06
03
_6
.3V
4Z
1
2
C3
09
10
U_
06
03
_6
.3V
6M
1
2
R2971K_0402_1%
12
C5
86
10
U_
06
03
_6
.3V
6M
1
2
C3
15
0.1
U_
04
02
_1
0V
6K
1
2
C6
06
1U
_0
60
3_
10
V4
Z
1
2
C5
88
10
U_
06
03
_6
.3V
6M
@
1
2
R3051K_0402_1%
12
C3
55
2.2
U_
06
03
_6
.3V
4Z
1
2
R5
71
10
K_
04
02
_5
%
12
C6
07
1U
_0
60
3_
10
V4
Z
1
2
C3
01
1U
_0
60
3_
10
V4
Z
1
2
C3
03
0.1
U_
04
02
_1
0V
6K
1
2
C3
00
1U
_0
60
3_
10
V4
Z
1
2
R57010K_0402_5%
1 2
C6
05
1U
_0
60
3_
10
V4
Z
1
2
C3
08
10
U_
06
03
_6
.3V
6M
1
2
JDIMM1
FOX_AS0A626-U4SN-7F
ME@
VREF_DQ1
VSS12
VSS23
DQ44
DQ05
DQ56
DQ17
VSS38
VSS49
DQS#010
DM011
DQS012
VSS513
VSS614
DQ215
DQ616
DQ317
DQ718
VSS719
VSS820
DQ821
DQ1222
DQ923
DQ1324
VSS925
VSS1026
DQS#127
DM128
DQS129
RESET#30
VSS1131
VSS1232
DQ1033
DQ1434
DQ1135
DQ1536
VSS1337
VSS1438
DQ1639
DQ2040
DQ1741
DQ2142
VSS1543
VSS1644
DQS#245
DM246
DQS247
VSS1748
VSS1849
DQ2250
DQ1851
DQ2352
DQ1953
VSS1954
VSS2055
DQ2856
DQ2457
DQ2958
DQ2559
VSS2160
VSS2261
DQS#362
DM363
DQS364
VSS2365
VSS2466
DQ2667
DQ3068
DQ2769
DQ3170
VSS2571
VSS2672
A12/BC#83
A1184
A985
A786
VDD587
VDD688
A889
A690
CKE073
CKE174
VDD175
VDD276
NC177
A1578
BA279
A1480
VDD381
VDD482
A591
A492
VDD793
VDD894
A395
A296
A197
A098
VDD999
VDD10100
CK0101
CK1102
CK0#103
CK1#104
VDD11105
VDD12106
A10/AP107
BA1108
BA0109
RAS#110
VDD13111
VDD14112
WE#113
S0#114
CAS#115
ODT0116
VDD15117
VDD16118
A13119
ODT1120
S1#121
NC2122
VDD17123
VDD18124
NCTEST125
VREF_CA126
VSS27127
VSS28128
DQ32129
DQ36130
DQ33131
DQ37132
VSS29133
VSS30134
DQS#4135
DM4136
DQS4137
VSS31138
VSS32139
DQ38140
DQ34141
DQ39142
DQ35143
VSS33144
VSS34145
DQ44146
DQ40147
DQ45148
DQ41149
VSS35150
VSS36151
DQS#5152
DM5153
DQS5154
VSS37155
VSS38156
DQ42157
DQ46158
DQ43159
DQ47160
VSS39161
VSS40162
DQ48163
DQ52164
DQ49165
DQ53166
VSS41167
VSS42168
DQS#6169
DM6170
DQS6171
VSS43172
VSS44173
DQ54174
DQ50175
DQ55176
DQ51177
VSS45178
VSS46179
DQ60180
DQ56181
DQ61182
DQ57183
VSS47184
VSS48185
DQS#7186
DM7187
DQS7188
VSS49189
VSS50190
DQ58191
DQ62192
DQ59193
DQ63194
VSS51195
VSS52196
SA0197
EVENT#198
VDDSPD199
SDA200
SA1201
SCL202
VTT1203
VTT2204
G1205
G2206
C3
46
0.1
U_
04
02
_1
0V
6K
1
2
C5
89
10
U_
06
03
_6
.3V
6M
@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_ B_D26
DDR_B _D2
DDR_B _D5
DDR_ B_D22
DDR_ B_D25
DDR_ B_D14
DD R_B_DQS#0
DDR_ B_D31
DDR_ B_D12
DDR_B _D6
DDR _B_DQS0
DD R_B_DM2
DD R_B_DM1
+VREF_DQ_DIMMB
DDR_B _D0
DDR_ B_D28
DD R_B_DM0
DDR_ B_D19
DDR_B _D4
DDR_ B_D30
DDR _B_DQS2
DDR _B_DQS3
DDR_ B_D10
DDR_ B_D27
DDR_B _D3
DRAMRST#
DDR_B _D1
DDR_ B_D16
DDR_ B_D29
DD R_B_DM3
DDR_B _D9
DDR_B _D7
DDR_ B_D13
DDR_ B_D20
DD R_B_DQS#1
DDR_ B_D21
DDR_ B_D24
DDR_ B_D15
DDR_ B_D23DDR_ B_D18
DD R_B_DQS#2
DDR_ B_D11
DD R_B_DQS#3
DDR_B _D8
DDR _B_DQS1
DDR_ B_D17
DDR_ B_D36
DDR_ B_D63
DDR_B_MA15
DD R_B_DM6
DDR_CKE3_DIMMB
DDR_ B_D39
D DR_B_BS1
DDR_B_MA7
DDR_B_MA0
DDR _B_DQS7
DDR_ B_D46
DD R_B_DQS#5
DD R_B_DM4
DDR_ B_D44
DD R_B_RAS#
DDR_CS2_DIMMB#
DDR_B_MA6
DD R_B_DQS#7
DDR_ B_D52
DDR _B_DQS5
DDR_ B_D54
DDR_ B_D45
DDR_ B_D60
M_ODT2
DDR_ B_D37
DDR_B_MA14
DDR_ B_D55
DDR_B_MA4
DDR_ B_D62
DDR_ B_D53
DDR_ B_D47
M_ODT3
M _CLK_DDR3M _CLK_DDR#3
DDR_ B_D38
DDR_B_MA11
DDR_ B_D61
DDR_B_MA2
SMB_CLK_S3SMB_DATA_S3PM_EXTTS#1_R
DDR _B_DQS6
DDR_ B_D35
DDR_B_MA12
DDR _B_DQS4
DDR_ B_D42
DDR_CKE2_DIMMB
DDR_ B_D59
DDR_B_MA3
DDR_CS3_DIMMB#
DDR _B_WE#
DDR_ B_D57
DDR_ B_D51
DDR_ B_D33
DDR_ B_D58
DD R_B_DM5
DDR_B_MA8
DDR_B_MA10
DD R_B_DQS#6
DDR_ B_D40
DDR_B_MA9
DD R_B_DQS#4
DDR_ B_D49
D DR_B_BS2
DD R_B_DM7
DDR_B_MA1
D DR_B_BS0
DD R_B_CAS#
DDR_B_MA5
DDR_ B_D56
DDR_ B_D43
DDR_ B_D34
DDR_ B_D48
M _CLK_DDR2M _CLK_DDR#2
DDR_ B_D32
DDR_B_MA13
DDR_ B_D50
DDR_ B_D41
DRAMRST# <5,10>
DDR_B_DQS#[0..7]<7>
DDR_B _D[0..63]<7>
DDR_B_DM[0..7]<7>
DDR_B_DQS[0..7]<7>
DDR_B_MA[0..15]<7>
DDR_CKE3_DIMMB <7>
M_CLK_DDR3 <7>M _CLK_DDR#3 <7>
DDR_B_BS1 <7>DDR_B_RAS# <7>
DDR_CS2_DIMMB# <7>M_ODT2 <7>
M_ODT3 <7>
SMB_DATA_S3 <10,12,14,28>SMB_CLK_S3 <10,12,14,28>
PM_EXTTS#1_R <5,10>
DDR_B_BS2<7>
DDR_CKE2_DIMMB<7>
M _CLK_DDR2<7>M _CLK_DDR#2<7>
DDR_B_BS0<7>
DDR_B_WE#<7>DDR_B_CAS#<7>
DDR_CS3_DIMMB#<7>
+0.75VS+3VS
+1.5V +1.5V+VREF_DQ_DIMMB
+1.5V
+0.75VS
+VREF_DQ_DIMMB
+1.5V
+VREF_DQ_DIMMB
Title
Size Document Number R e v
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
DDRIII-SODIMM SLOT2
11 51Thursday, October 29, 2009
2008/10/31 2009/10/31Compal Electronics, Inc.
LA-5752P
Layout Note:
Place near DIMM
Layout Note:
Place near DIMM
3A@3A@3A@3A@ 1.5V1.5V1.5V1.5V
0.0.0.0. 65A@0.75V65A@0.75V65A@0.75V65A@0.75V 1*0402 0.1uf 1*0402 2.2uf
3*330uf / 12m ohm (TOTAL FOR 2 SO-DIMMs)
6*0603 10uf (PER CONNECTOR)
3*0805 10uf
VTT(0.75V) =
4*0402 1uf
1*0402 0.1uf
VDDQ(1.5V) =
1*0402 2.2uf
VDDSPD (3.3V)=
For Arranale only +VREF_DQ_DIMMB
supply from a external 1.5V voltage divide circuit. 07/17/2009
C5
87
10
U_
06
03
_6
.3V
6M
@
1
2
C3
83
2.2
U_
06
03
_6
.3V
4Z
1
2
R3411K_0402_1%
12
R57210K_0402_5%
1 2
C3
82
2.2
U_
06
03
_6
.3V
4Z
1
2
C5
95
1U
_0
60
3_
10
V4
Z
1
2
C5
96
10
U_
06
03
_6
.3V
6M
1
2
C2
99
1U
_0
60
3_
10
V4
Z
1
2
C3
04
0.1
U_
04
02
_1
0V
6K
1
2
C3
84
0.1
U_
04
02
_1
0V
6K
1
2
R3401K_0402_1%
12
C3
13
10
U_
06
03
_6
.3V
6M
1
2
C3
05
0.1
U_
04
02
_1
0V
6K
1
2
R573 10K_0402_5%1 2
JDIMM2
TYCO_2-2013297-2~D
ME@
VREF_DQ1
VSS3
DQ05
DQ17
VSS9
DM011
VSS13
DQ215
DQ317
VSS19
DQ821
DQ923
VSS25
DQS1#27
DQS129
VSS31
DQ1033
DQ1135
VSS37
DQ1639
VSS2
DQ44
DQ56
VSS8
DQS0#10
DQS012
VSS14
DQ616
DQ718
VSS20
DQ1222
DQ1324
VSS26
DM128
RESET#30
VSS32
DQ1434
DQ1536
VSS38
DQ2040
DQ1741
VSS43
DQS2#45
DQS247
VSS49
DQ1851
DQ1953
VSS55
DQ2457
DQ2559
VSS61
DM363
VSS65
DQ2667
DQ2769
VSS71
CKE073
VDD75
NC77
BA279
VDD81
A12/BC#83
A985
VDD87
A889
A591
VDD93
A395
A197
VDD99
CK0101
CK0#103
VDD105
A10/AP107
BA0109
VDD111
WE#113
CAS#115
VDD117
A13119
S1#121
VDD123
TEST125
VSS127
DQ32129
DQ33131
VSS133
DQS4#135
DQS4137
VSS139
DQ34141
DQ35143
VSS145
DQ40147
DQ41149
VSS151
DM5153
VSS155
DQ42157
DQ43159
VSS161
DQ48163
DQ49165
VSS167
DQS6#169
DQS6171
VSS173
DQ50175
DQ51177
VSS179
DQ56181
DQ57183
VSS185
DM7187
VSS189
DQ58191
DQ59193
VSS195
SA0197
VDDSPD199
DQ2142
VSS44
DM246
VSS48
DQ2250
DQ2352
VSS54
DQ2856
DQ2958
VSS60
DQS3#62
DQS364
VSS66
DQ3068
DQ3170
VSS72
CKE174
VDD76
A1578
A1480
VDD82
A1184
A786
VDD88
A690
A492
VDD94
A296
A098
VDD100
CK1102
CK1#104
VDD106
BA1108
RAS#110
VDD112
S0#114
ODT0116
VDD118
ODT1120
NC122
VDD124
VREF_CA126
VSS128
DQ36130
DQ37132
VSS134
DM4136
VSS138
DQ38140
DQ39142
VSS144
DQ44146
DQ45148
VSS150
DQS5#152
DQS5154
VSS156
DQ46158
DQ47160
VSS162
DQ52164
DQ53166
VSS168
DM6170
VSS172
DQ54174
DQ55176
VSS178
DQ60180
DQ61182
VSS184
DQS7#186
DQS7188
VSS190
DQ62192
DQ63194
VSS196
EVENT#198
SDA200
SA1201
VTT203
GND1205
SCL202
VTT204
GND1206
C3
06
0.1
U_
04
02
_1
0V
6K
1
2
C5
75
10
U_
06
03
_6
.3V
6M
1
2
C6
18
2.2
U_
06
03
_6
.3V
4Z
1
2
C6
16
0.1
U_
04
02
_1
0V
6K
1
2
C3
07
0.1
U_
04
02
_1
0V
6K
1
2
C3
85
0.1
U_
04
02
_1
0V
6K
1
2
C5
98
1U
_0
60
3_
10
V4
Z
1
2
C5
82
10
U_
06
03
_6
.3V
6M
@
1
2
C5
90
10
U_
06
03
_6
.3V
6M
1
2C
57
6
10
U_
06
03
_6
.3V
6M
1
2
C3
11
10
U_
06
03
_6
.3V
6M
1
2
C3
12
10
U_
06
03
_6
.3V
6M
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_XTAL_IN
CLK_XTAL_OUT
CLK_XTAL_OUT
SMB_CLK_S3SMB_DATA_S3
CLK_XTAL_IN
CK_P WRGD
CPU_STOP#
CLK_14M_PCH
R_CLK_BUF_BCLK# CLK_BUF_BCLK#
CLK_48M_CR_R
R EF_0/CPU_SEL
CLK_14M_PCHCLK_BUF_DOT96#CLK_BUF_DOT96
L_CLK_BUF_DOT96#L_CLK_BUF_DOT96
CLK_DMI#CLK_DMI
L_CLK_DMI#L_CLK_DMI
CLK_48M_CR_R
CK_P WRGD
R EF_0/CPU_SEL
R EF_0/CPU_SEL
R _CLK_BUF_BCLK CLK_BUF_BCLK
VDD_3V3_1V5
VDD_3V3_1V5
VDD_3V3_1V5
VDD_3V3_1V5
CL K_BUF_CKSSCDCL K_BUF_CKSSCD#
CLK _BUF_CKSSCD_RCL K_BUF_CKSSCD#_R
CLK_BUF_BCLK# <14>CLK_BUF_BCLK <14>
CLK_14M_PCH <14>
CLK_EN# <48>
CLK_DMI<14>CLK_DMI#<14>
CLK_BUF_DOT96<14>CLK_BUF_DOT96#<14>
SMB_DATA_S3 <10,11,14,28>SMB_CLK_S3 <10,11,14,28>
CLK_48M_CR
CLK _BUF_CKSSCD<14>CLK_BUF_CKSSCD#<14>
+3VS +3VS_CK505
+1.05VS_CK505+1.05VS
+3VS_CK505 +1.05VS_CK505+3VS_CK505 +1.05VS_CK505
+1.05VS
+3VS_CK505
+3VS_CK505
VDD_3V3_1V5+3VS_CK505
+1.5VS
Title
Size Document Number R e v
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
CLOCK GENERATOR
12 51Thursday, October 29, 2009
2008/10/31 2009/10/31Compal Electronics, Inc.
LA-5752P
1 PCS CAP(0.1u) BY 1 INPUT PIN
ICS9LVS3199AKLFT MLF 32P CLK GEN (SA00003HR00)1 PCS CAP(0.1u) BY 1 INPUT PIN
1
CPU_1PIN 30 CPU_0
0 133MHz(Default) 133MHz
100MHz 100MHz
CLOSE U27
CLK GEN TO PCH1. CLK_DMI
EMI Capacitor
2. CLK_BUF_BCLK
3. CLK_BUF_CKSSCD
4. CLK_BUF_DOT96
5. CLK_14M_PCH
PIN8 IS GND FOR ICS3197 PIN8 IS 48MHz FOR ICS3199
CLK GEN TO VGA1. 27M_CLK
1. 27M_CLK_SS
RTM890N-631-GRT QFN 32P CLK GEN (SA00003HQ00)
Reserve for Low Power CLK GEN.
RTM890N-632
SLG8LV597VTR
1 PCS CAP(0.1u) BY 1 INPUT PIN
unstuff 09.09.08
R2780_0603_5%
@
1 2
C3
66
0.1
U_
04
02
_1
0V
6K
1
2
C34822P_0402_50V8J
1
2
C36422P_0402_50V8J
12
C34922P_0402_50V8J
1
2
C3
31
10
U_
08
05
_1
0V
4K
1
2
R3080_0402_5%
1 2
Y1
14
.31
81
8M
HZ
_1
6P
F_
DS
X8
40
GA
12
C3
67
0.1
U_
04
02
_1
0V
6K
1
2
U14
SLG8SP587VTR_QFN32_5X5
CPU_1#19
SATA10
CKPWRGD/PD#25
DOT_96#4
CPU_0#22
XTAL_OUT27
VSS_REF26
VDD_CPU24
CPU_023
27MHZ_SS7
XTAL_IN28
27MHZ6
USB_488
CPU_120
VSS_CPU21
VDD_CPU_IO18
VDD_USB_481
VSS_48M2
REF_0/CPU_SEL30
SDA31
SCL32
VDD_275
VSS_27M9
SATA#11
VSS_SRC12
SRC_113
SRC_1#14
VDD_SRC_IO15
VDD_SRC17
VDD_REF29
DOT_963
CPU_STOP#16
TGND33
R2790_0603_5%1 2
R2770_0603_5%1 2
R276 0_0402_5%1 2
R298
10K_0402_5%
1 2
C3
33
10
U_
08
05
_1
0V
4K
1
2
C3
43
0.1
U_
04
02
_1
0V
6K
1
2
G
D
SQ252N7002_SOT23-3
2
13
R2690_0603_5%1 2
C3
42
0.1
U_
04
02
_1
0V
6K
1
2
C3
30
0.1
U_
04
02
_1
0V
6K
1
2
C3
32
0.1
U_
04
02
_1
0V
6K
1
2
C3
34
0.1
U_
04
02
_1
0V
6K
1
2
R3060_0402_5%
1 2
C3
50
0.1
U_
04
02
_1
0V
6K
1
2
R31533_0402_1%
12
R319 0_0402_5%1 2
R3230_0402_5%
@
12
C36510P_0402_50V8J@
12
R307 0_0402_5%1 2
R324 0_0402_5%1 2
C3
44
10
U_
08
05
_1
0V
4K
1
2
R32233_0402_1%
@
1 2
R275 0_0402_5%
1 2
R29910K_0402_5%
1 2
R316 10K_0402_5%1 2
R317 10K_0402_5%@1 2
R318 0_0402_5%
1 2
C3
36
10
U_
08
05
_1
0V
4K
1
2
C3
35
0.1
U_
04
02
_1
0V
6K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_RTCX1
PCH_RTCX2
PCH_RTCX1PCH_RTCX2
PCH_RTCRST#
PCH_SRTCRST#
S M_INTRUDER#
PCH_INTVRMENS M_INTRUDER#
HDA_RST#
P CH_SPKR
HDA_ SDIN1
SE RIRQ
GPIO23
SATAICOMPPCH_JTAG_RST#
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
BITCLK
HDA_SYNC
HDA_ SDIN0
H DA_SDOUT
PCH_INTVRMEN
SATA_ITX_DRX_P0SATA_ITX_DRX_N0
SATA_DTX_C_IRX_N0SATA_DTX_C_IRX_P0
SATA_ITX_C_DRX_N0SATA_ITX_C_DRX_P0
SATA_ITX_C_DRX_N4SATA_ITX_C_DRX_P4
SATA_ITX_DRX_P1SATA_ITX_DRX_N1
SATA_DTX_C_IRX_N1SATA_DTX_C_IRX_P1
SATA_ITX_C_DRX_N1SATA_ITX_C_DRX_P1
PCH_JTAG_TCK
SPI_WP#
SPI_HOLD#
S PI_CLK_PCH_R
SPI_SB_CS0#
SPI_SI
SPI_SO_R
PCH_JTAG_TMS PCH_JTAG_RST#PCH_JTAG_TDO PCH_JTAG_TDI
GPIO19
GPIO21
GPIO19
GPIO21
P CH_SPKR
GPIO13
SPI_WP#SPI_HOLD#
SPI_SB_CS0#SPI_SO_R SPI_SO_L
SPI_SISPI_CLK_PCH
SPI_CLK_PCH
SPI_CLK_PCH
SATA_ITX_DRX_N4_CONN
SATA_DTX_C_IRX_N4
SATA_ITX_DRX_P4_CONN
SATA_DTX_C_IRX_P4
PCH_JTAG_TCK
HDA_SDIN1<33>
LPC_AD0 <28,34>LPC_AD1 <28,34>LPC_AD2 <28,34>LPC_AD3 <28,34>
LPC_FRAME# <28,34>
SE RIRQ <34>
HDD_LED# <36>
HDA_BITCLK_CODEC<33>
HDA_SYNC_CODEC<33>
HDA_RST_CODEC#<33>
HDA _SDOUT_CODEC<33>
SATA_DTX_C_IRX_N0 <32>SATA_DTX_C_IRX_P0 <32>SATA_ITX_DRX_N0 <32>SATA_ITX_DRX_P0 <32>
SATA_ITX_DRX_N1 <32>SATA_ITX_DRX_P1 <32>
SATA_DTX_C_IRX_N1 <32>SATA_DTX_C_IRX_P1 <32>
P CH_SPKR<33>
ME_FLASH<34>
SATA_DTX_C_IRX_P4 <37>
SATA_ITX_DRX_N4_CONN <37>
SATA_DTX_C_IRX_N4 <37>
SATA_ITX_DRX_P4_CONN <37>
+RTCVCC
+RTCVCC
+1.05VS
+3VS
+3VS
+3VS
+3VALW+3VALW +3VALW +3VALW +3VS
+RTCVCC
+RTCBATT
+3VS
+3VALW
+3VS
Title
Size Document Number R e v
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
IBEX-M(1/6)-HDA/JTAG/SATACustom
13 51Thursday, October 29, 2009
2008/10/31 2009/10/31Compal Electronics, Inc.
LA-5752P
H Integr: ated VRM enableL Integra: ted VRM disable*
GPIO33 = GPO , internal pull-up,should not be pulled low
GPIO19 = GPI,3.3V,CORE
GPIO21 = GPI,3.3V,CORE
GPIO23 = NATIVE,3.3V,CORE
GPIO13 = GPI,3.3V,SUS
flash ME core of strap pin pull down
*
No Install
No Install
No Install
100ohm 100ohm
100ohm 100ohm
10Kohm 10Kohm
20Kohm 20Kohm
100ohm
200ohm
200ohm
200ohm
200ohm
200ohm
51ohm
No Install
R580
No Install
No InstallPCH_JTAG_TMS
PCH JTAGPre-Production
PCH JTAGProduction
RefDesPCH Pin
No InstallPCH_JTAG_TDO
ES1 MPES2
PCH_JTAG_TDI
PCH_JTAG_TCK
PCH_JTAG_RST#
R584
R583
R591
R590
No InstallR587
R586
R595
R594
No Install
No Install
51ohm 51ohm
(2009,07,07)
4M SPI ROM FOR HM55
(ME code & BIOS code)
SA00003K800
HDD
ODD
E-SATA
(2009,05,04)
FOR INTEL DPDG REV1.6 (MAY 2009)
R11810K_0402_5%
@
12
R453 10K_0402_5%1 2
R144
100_0603_1%
1 2
T7 P AD
R 623.3K_0402_5%
1 2
RTC
IHDA
SATA
LPC
SPI
JTAG
U7A
IBEXPEAK-M_FCBGA1071
RTCX1B13
RTCX2D13
INTVRMENA14
INTRUDER#A16
HDA_BCLKA30
HDA_SYNCD29
HDA_RST#C30
HDA_SDIN0G30
HDA_SDIN1F30
HDA_SDIN2E32
HDA_SDOB29
SATALED#T3
FWH0 / LAD0D33
FWH1 / LAD1B33
FWH2 / LAD2C32
FWH3 / LAD3A32
LDRQ1# / GPIO23F34
FWH4 / LFRAME#C34
LDRQ0#A34
RTCRST#C14
HDA_SDIN3F32
HDA_DOCK_EN# / GPIO33H32
HDA_DOCK_RST# / GPIO13J30
SRTCRST#D17
SATA0RXNAK7
SATA0RXPAK6
SATA0TXNAK11
SATA0TXPAK9
SATA1RXNAH6
SATA1RXPAH5
SATA1TXNAH9
SATA1TXPAH8
SATA2RXNAF11
SATA2RXPAF9
SATA2TXNAF7
SATA2TXPAF6
SATA3RXNAH3
SATA3RXPAH1
SATA3TXNAF3
SATA3TXPAF1
SATA4RXNAD9
SATA4RXPAD8
SATA4TXNAD6
SATA4TXPAD5
SATA5RXNAD3
SATA5RXPAD1
SATA5TXNAB3
SATA5TXPAB1
SATAICOMPIAF15
SPI_CLKBA2
SPI_CS0#AV3
SPI_CS1#AY3
SPI_MOSIAY1
SPI_MISOAV1
SATA0GP / GPIO21Y9
SATA1GP / GPIO19V1
JTAG_TCKM3
JTAG_TMSK3
JTAG_TDIK1
JTAG_TDOJ2
TRST#J4
SERIRQAB9
SPKRP1
SATAICOMPOAF16
R115100_0402_1%
@
12
U3
S IC FL 16M EN25F16-100HIP SOP 8P
CS#1
SO2
WP#3
GND4
VCC8
HOLD#7
SCLK6
SI5
R74200_0402_5%
@
12
C171
15
P_
04
02
_5
0V
8J
1
2
C460
0.1U_0402_16V4Z
1 2
R482
10K_0402_5%
12
R10033_0402_5%
@
12
R167 33_0402_5%1 2
R114 51_0402_5%1 2
R420330K_0402_5%
1 2
CLRP3SHORT PADS
12
R44710K_0402_5%
12
CLRP2SHORT PADS
12
R500
37.4_0402_1%1 2
C1400.01U_0402_16V7K 12
C64812P_0402_50V8J@
1 2
C64712P_0402_50V8J@ 1 2
C183
15P_0402_50V8J
1
2
R47910K_0402_5%12
X1
32.768KHZ_12.5PF_9H03200413
OS
C4
OS
C1
NC
3
NC
2R169 33_0402_5%1 2
C4280.01U_0402_16V7K 12
R1023.3K_0402_5%
1 2
R99
0_0402_5%
1 2
C2021U_0603_10V4Z
1
2
R422 20K_0402_1%1 2
C4270.01U_0402_16V7K 12
R75
20K_0402_5%
@
12
R116100_0402_1%
@
12
R117100_0402_1%
@
12
R452 1K_0402_5%@1 2
CLRP1SHORT PADS
12
C1420.01U_0402_16V7K ESATA@12
R168 33_0402_5%1 2
R154 10M_0402_5%1 2
R73200_0402_5%
@
12
R166 33_0402_5%1 2
R425 0_0402_5%1 2
C1430.01U_0402_16V7K ESATA@12
C1410.01U_0402_16V7K 12
R424 10K_0402_5%@
1 2
R10315_0402_5%
1 2
R409 1K_0402_5%@1 2
C441
0.1U_0402_16V4Z1
2
R72200_0402_5%
@
12
R10115_0402_5%
12
C138
22P_0402_50V8J@
R4211M_0402_5%
1 2
R419 20K_0402_1%1 2
C1841U_0603_10V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
C LK_PCIE_WLAN1_RC LK_PCIE_WLAN1#_R
PCIE_PTX_DRX_P3PCIE_PTX_DRX_N3PCIE_PRX_DTX_P3PCIE_PRX_DTX_N3
PCIE_PTX_DRX_P2PCIE_PTX_DRX_N2PCIE_PRX_DTX_P2PCIE_PRX_DTX_N2
LID_OUT#
SMBCLK
SMBDATA
GPIO60
SML0CLK
SML0DATA
GPIO74
SMB_EC_CK2_REC_SMB_CK2
SMB_EC_DA2_REC_SMB_DA2
EC_SMB_CK2
EC_SMB_DA2
SML1CLK
SML1DATA
LID_OUT#
PEG_CLKREQ#
SMBCLK
SMBDATA
SML1CLK
SML1DATA
SML0CLK
SML0DATA
GPIO74
SMB_CLK_S3
SMB_DATA_S3
SMB_CLK_S3
SMB_DATA_S3
XTAL25_IN
CLK_14M_PCH
GPIO60
SMBCLK
SMBDATA SMB_DATA_S3
SMB_CLK_S3
SMB_EC_CK2_R
SMB_EC_DA2_R
EC_SMB_CK2
EC_SMB_DA2
PEG_CLKREQ#
C LK_PCI_FB
CLK_PCIE_LAN_RCLK_PCIE_LAN#_R
CLKOUT_DP_NCLKOUT_DP_P
CLK_14M_PCHC LK_PCI_FB
CLK_PCIE_VGA#CLK_PCIE_VGA
CLK_PCIE_VGA#_RCLK_PCIE_VGA_R
CLK_EXP#_RCLK_EXP_R
PCIE_PTX_DRX_P4
PCIE_PRX_DTX_N4PCIE_PRX_DTX_P4PCIE_PTX_DRX_N4
CLK_ PCIE_CARD_PCH#_RCLK_P CIE_CARD_PCH_R
CL K_PCI_DB_R
XTAL25_IN
XTAL25_OUT
XTAL25_OUTCLK_PCIE_EXP_PCH_RCLK_PCIE_EXP_PCH#_R
CLKREQ_EXP#
PCIE_PTX_DRX_P5PCIE_PTX_DRX_N5PCIE_PRX_DTX_P5PCIE_PRX_DTX_N5
WLAN_CLKREQ1#<28>
CLK_PCIE_WLAN1<28>CLK_PCIE_WLAN1#<28>
PCIE_PTX_C_DRX_P2<28>
PCIE_PRX_DTX_N2<28>
PCIE_PTX_C_DRX_N2<28>
PCIE_PRX_DTX_P2<28>
PCIE_PTX_C_DRX_P3<29>
PCIE_PRX_DTX_N3<29>
PCIE_PTX_C_DRX_N3<29>
PCIE_PRX_DTX_P3<29>
SMB_EC_DA2_R <19,31>
SMB_EC_CK2_R <19,31>
EC_SMB_CK2 <34>
EC_SMB_DA2 <34>
CLK_14M_PCH <12>
SMB_CLK_S3 <10,11,12,28>
SMB_DATA_S3 <10,11,12,28>
CLK_DMI# <12>CLK_DMI <12>
CLK_BUF_BCLK <12>CLK_BUF_BCLK# <12>
CLK_BUF_DOT96 <12>CLK_BUF_DOT96# <12>
CLK _BUF_CKSSCD <12>CLK_BUF_CKSSCD# <12>
SMBCLK
SMBDATA
CLK_PCI_FB <16>
EC_LID_OUT# <34>
CLKREQ_LAN#<29>
CLK_PCIE_LAN<29>CLK_PCIE_LAN#<29>
PEG_CLKREQ# <19>
CLK_PCIE_VGA# <19>CLK_PCIE_VGA <19>
CLK_EXP <5>CLK_EXP# <5>
PCIE_PTX_C_DRX_P4<28>PCIE_PTX_C_DRX_N4<28>
PCIE_PRX_DTX_N4<28>PCIE_PRX_DTX_P4<28>
CLK _PCIE_CARD_PCH#<28>CLK_PCIE_CARD_PCH<28>
PCIECLKREQ3#<28>
CLK_PCI_DB <28>
CLK_PCIE_EXP_PCH<28>CLK_PCIE_EXP_PCH#<28>
CLKREQ_EXP#<28>
PCIE_PTX_C_DRX_P5<28>
PCIE_PRX_DTX_N5<28>
PCIE_PTX_C_DRX_N5<28>
PCIE_PRX_DTX_P5<28>
+3VALW
+3VALW
+3VALW
+3VALW
+3VS
+3VALW
+3VS
+3VS
+3VS
+1.05VS
+3VS +3VALW
+3VS
+3VS
Title
Size Document Number R e v
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
IBEX-M(2/6)-PCI-E/SMBUS/CLKCustom
14 51Thursday, October 29, 2009
2008/10/31 2009/10/31Compal Electronics, Inc.
LA-5752P
WLAN
WLAN
LAN
LAN
Nvidiathermalsensor
DTS , read from EC
DDR3*2 AND CLK GEN
EC_THERMAL
NEW CARD
WLAN
MINI1
LAN
WLAN
NEW CARD
LAN
6
4
DEVICEPORT
5
3
2
PCIE PORT LIST
1
7
8
X
X
X
GPIO11 = NATIVE,3.3V,SUS
GPIO60 = NATIVE,3.3V,SUS
GPIO74 = NATIVE,3.3V,SUS
GPIO47 = 10Kohm PULL DOWN
GPIO56 = NATIVE,3.3V,SUS
GPIO44 = NATIVE,3.3V,SUS
GPIO26 = NATIVE,3.3V,SUS
GPIO25 = NATIVE,3.3V,SUS
GPIO20 = NATIVE,3.3V,CORE
GPIO18 = NATIVE,3.3V,CORE
GPIO73 = NATIVE,3.3V,SUS
EMI REQUEST 0303
25MHz crystal not used, XTAL25_INneed to GND.(checklist Rev1.6)
3G
3G
3G
X
C631 Resistor Pull down
EXP
EXP
R220 0_0402_5%1 2
R 81 0_0402_5%@1 2
R223 0_0402_5%3G@ 1 2
C222 0.1U_0402_10V6K1 2
R413
33_0402_5%
@
12
R1220_0402_5%
@1 2
R148 2.2K_0402_5%1 2
R404 2.2K_0402_5%1 2
R222 0_0402_5%3G@ 1 2
R598 1M_0402_5%@1 2
C231 0.1U_0402_10V6K3G@ 1 2
R491 90.9_0402_1%1 2
R106 0_0402_5%1 2
R105 0_0402_5%1 2
C631
0_
04
02
_5
%
1
2C263
22P_0402_50V8J@
R434 10K_0402_5%1 2
R79 0_0402_5%
R224 0_0402_5%1 2
C221 0.1U_0402_10V6K1 2
C232 0.1U_0402_10V6K3G@ 1 2
C630
18
P_
04
02
_5
0V
8J
@1
2
R525 0_0402_5%1 2
C223 0.1U_0402_10V6K1 2
R225 0_0402_5%1 2
C229 0.1U_0402_10V6K1 2
C220 0.1U_0402_10V6K1 2
R407
0_0402_5%
R431 10K_0402_5%1 2
R457 10K_0402_5%1 2
R197 0_0402_5%1 2
R 78 2.2K_0402_5%1 2
Y4
25MHZ_20P_1BG25000CK1A
@
1 2
R196 0_0402_5%1 2
R524 0_0402_5%1 2
R41210K_0402_5%
1 2
R147 2.2K_0402_5%1 2
R19822_0402_5%
@1 2
R406 10K_0402_5%1 2
R80 0_0402_5%
R209
33_0402_5%
@
12
R400 10K_0402_5%1 2
Q8B2N7002DW-T/R7_SOT363-6
3
5
4
R 83 0_0402_5%@1 2
R435 10K_0402_5%1 2
C439
22P_0402_50V8J@
R403 2.2K_0402_5%1 2
C230 0.1U_0402_10V6K1 2
R221 0_0402_5%1 2
R1242.2K_0402_5%
R145 10K_0402_5%1 2
R119
0_0402_5%
@1 2
R123 2.2K_0402_5%1 2
R399 10K_0402_5%1 2
R121 10K_0402_5%1 2
PCI-E*
SMBus
Controller
From CLK BUFFER
PEG
Clock Flex
Link
U7B
IBEXPEAK-M_FCBGA1071
PERN1BG30
PERP1BJ30
PERN2AW30
PERP2BA30
PERN3AU30
PERP3AT30
PERN4BA32
PERP4BB32
PERN5BF33
PERP5BH33
PERN6BA34
PERP6AW34
PERN7AT34
PERP7AU34
PERN8BG34
PERP8BJ34
PETN1BF29
PETP1BH29
PETN2BC30
PETP2BD30
PETN3AU32
PETP3AV32
PETN4BD32
PETP4BE32
PETN5BG32
PETP5BJ32
PETN6BC34
PETP6BD34
PETN7AU36
PETP7AV36
PETN8BG36
PETP8BJ36
SMBALERT# / GPIO11B9
SMBCLKH14
SMBDATAC8
SML0CLKC6
SML0DATAG8
CLKOUT_PCIE0NAK48
CLKOUT_PCIE0PAK47
CLKOUT_PCIE1NAM43
CLKOUT_PCIE1PAM45
CLKOUT_PCIE2NAM47
CLKOUT_PCIE2PAM48
CLKOUT_PCIE3NAH42
CLKOUT_PCIE3PAH41
CLKOUT_PCIE4NAM51
CLKOUT_PCIE4PAM53
CLKOUT_PCIE5NAJ50
CLKOUT_PCIE5PAJ52
SML0ALERT# / GPIO60J14
CL_CLK1T13
CL_DATA1T11
CL_RST1#T9
CLKIN_BCLK_NAP3
CLKIN_BCLK_PAP1
CLKIN_DMI_NAW24
CLKIN_DMI_PBA24
CLKIN_DOT_96NF18
CLKIN_DOT_96PE18
CLKIN_SATA_N / CKSSCD_NAH13
CLKIN_SATA_P / CKSSCD_PAH12
XTAL25_INAH51
XTAL25_OUTAH53
REFCLK14INP41
CLKIN_PCILOOPBACKJ42
CLKOUT_PEG_A_NAD43
CLKOUT_PEG_A_PAD45
PEG_A_CLKRQ# / GPIO47H1
PCIECLKRQ0# / GPIO73P9
PCIECLKRQ1# / GPIO18U4
PCIECLKRQ2# / GPIO20N4
PCIECLKRQ3# / GPIO25A8
PCIECLKRQ4# / GPIO26M9
PCIECLKRQ5# / GPIO44H6
CLKOUTFLEX0 / GPIO64T45
CLKOUTFLEX1 / GPIO65P43
CLKOUTFLEX2 / GPIO66T42
CLKOUTFLEX3 / GPIO67N50
CLKOUT_DMI_NAN4
CLKOUT_DMI_PAN2
PEG_B_CLKRQ# / GPIO56P13
CLKOUT_PEG_B_PAK51
CLKOUT_PEG_B_NAK53
SML1ALERT# / GPIO74M14
SML1CLK / GPIO58E10
SML1DATA / GPIO75G12
XCLK_RCOMPAF38
CLKOUT_DP_P / CLKOUT_BCLK1_PAT3
CLKOUT_DP_N / CLKOUT_BCLK1_NAT1
R113 10K_0402_5%1 2
R822.2K_0402_5%
R120 10K_0402_5%1 2
Q7B
2N7002DW-T/R7_SOT363-6
3
5
4
Q8A2N7002DW-T/R7_SOT363-6
6 1
2
R454 10K_0402_5%1 2
Q7A
2N7002DW-T/R7_SOT363-6
6 1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PM_RSMRST#
SLP_S4#
SLP_S5#
SYS_RST#
PM_DRAM_PWRGD
GPIO61
GPIO62
S YS_PWROK
SLP_S3#
GPIO72
PBTN_OUT#
DMI_CTX_PRX_N2
DMI_CRX_PTX_N0DMI_CRX_PTX_N1DMI_CRX_PTX_N2DMI_CRX_PTX_N3
DMI_CRX_PTX_P0DMI_CRX_PTX_P1DMI_CRX_PTX_P2DMI_CRX_PTX_P3
DMI_CTX_PRX_N1DMI_CTX_PRX_N0
PM_RSMRST#
DMI_CTX_PRX_N3
DMI_CTX_PRX_P1DMI_CTX_PRX_P2
DMI_CTX_PRX_P0
DMI_CTX_PRX_P3
DMI_IRCOMP
AC_PRESENT_R
PCIE_WAKE#
CRT _IREF
FDI_CTX_PRX_N0FDI_CTX_PRX_N1FDI_CTX_PRX_N2FDI_CTX_PRX_N3FDI_CTX_PRX_N4
FDI_CTX_PRX_N6FDI_CTX_PRX_N5
FDI_CTX_PRX_P1
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P3FDI_CTX_PRX_P2
FDI_CTX_PRX_P6FDI_CTX_PRX_P5FDI_CTX_PRX_P4
FDI_CTX_PRX_P7
FDI _INT
FDI_FSYN C1
FDI_FSYN C0
FDI_LSY NC1
FDI_LSY NC0
PCH_E NVDD
EDID_DATAEDI D_CLK
DAC _BLU
DAC_R EDDAC_G RN
HD MICLK_NBHDMIDAT_NB
TMDS_B_DATA2#_PCHTMDS_B_DATA2_PCHTMDS_B_DATA1#_PCH
TMDS_B_DATA0#_PCH
TMDS_B_CLK#_PCH
TMDS_B_DATA1_PCH
TMDS_B_DATA0_PCH
TMDS_B_CLK_PCH
DAC _BLU
DAC_R ED
DAC_G RN
PCH_ENBKL
EDI D_CLK
EDID_DATA
SUS _PWR_DN_ACK_R
S YS_PWROKVGATE
IC H_POK
VGATE<48>
ICH_POK<34>
PBTN_OUT#<34>
PM_DRAM_PWRGD<5>
PCIE_WAKE# <28>
SLP_S5# <34>
H_P M_SYNC <5>
SLP_S4# <34>
SLP_S3# <34>
EC_RSMRST#<34>
DMI_CRX_PTX_N0<6>
DMI_CTX_PRX_N0<6>DMI_CTX_PRX_N1<6>DMI_CTX_PRX_N2<6>DMI_CTX_PRX_N3<6>
DMI_CTX_PRX_P0<6>DMI_CTX_PRX_P1<6>DMI_CTX_PRX_P2<6>DMI_CTX_PRX_P3<6>
DMI_CRX_PTX_N1<6>DMI_CRX_PTX_N2<6>DMI_CRX_PTX_N3<6>
DMI_CRX_PTX_P0<6>DMI_CRX_PTX_P1<6>DMI_CRX_PTX_P2<6>DMI_CRX_PTX_P3<6>
AC_PRESENT<34>
FDI_CTX_PRX_N0 <6>FDI_CTX_PRX_N1 <6>
FDI_CTX_PRX_N3 <6>FDI_CTX_PRX_N2 <6>
FDI_CTX_PRX_N5 <6>FDI_CTX_PRX_N4 <6>
FDI_CTX_PRX_N7 <6>FDI_CTX_PRX_N6 <6>
FDI_CTX_PRX_P1 <6>FDI_CTX_PRX_P0 <6>
FDI_CTX_PRX_P3 <6>FDI_CTX_PRX_P2 <6>
FDI_CTX_PRX_P4 <6>FDI_CTX_PRX_P5 <6>
FDI_CTX_PRX_P7 <6>FDI_CTX_PRX_P6 <6>
FDI_ INT <6>
FDI_FSYNC0 <6>
FDI_LSY NC0 <6>
FDI_FSYNC1 <6>
FDI_LSY NC1 <6>
LVDS_ACLK#<27>LVDS_ACLK<27>
LVDS_A0#<27>LVDS_A1#<27>LVDS_A2#<27>
LVDS_A0<27>LVDS_A1<27>LVDS_A2<27>
EDID_DATA<27>
PCH_E NVDD<27>
PCH_PWM<27>
EDID_CLK<27>
CRT_HSY NC<26>CRT_V SYNC<26>
CRT_DDC_CLK<26>CRT_DDC_DATA<26>
DAC_BLU<26>DAC_GRN<26>DAC_RED<26>
TMDS_B_HPD# <25>
HDMIDAT_NB <25>HDMICLK_NB <25>
P CH_ENBKL<27>
SUS_PWR_DN_ACK<34>
TMDS_B_DATA2# <25>TMDS_B_DATA2 <25>TMDS_B_DATA1# <25>TMDS_B_DATA1 <25>TMDS_B_DATA0# <25>TMDS_B_DATA0 <25>TMDS_B_CLK# <25>TMDS_B_CLK <25>
+3VALW
+3VS
+3VALW
+3VALW
+3VALW
+1.05VS
+3VS
+3VALW
+3VS
+3VS
+3VS+3VS
Title
Size Document Number R e v
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
IBEX-M(3/6)-DMI/GPIO/LVDSCustom
15 51Thursday, October 29, 2009
2008/10/31 2009/10/31Compal Electronics, Inc.
LA-5752P
GPIO61 = NATIVE,3.3V,SUS
GPIO62 = NATIVE,3.3V,SUS
Checklist0.8 MEPWROK:can be connect toPWROK if iAMT disable
If not using integratedLAN,signal may be left as NC.
Can be left NC when IAMT isnot support on the platfrom
GPIO29 = GPO,3.3V,SUS
GPIO31 = GPI,3.3V,SUS
GPIO30 = GPI,3.3V,SUS
RSMRST circuit
4mil width and placewithin 500mil of the PCH
GPIO32 = GPO,3.3V,CORE
CRT OUT
(2009,05,04)
update R492 tolerance for
DAC_CRT from 0.5% to 5%
(checklist 2.0)
HDMI
Reserved
(2009,09,08)
R418 10K_0402_5%@1 2
R496 10K_0402_5%1 2
R146 10K_0402_5%1 2
R417 10K_0402_5%@1 2
C640 0.1U_0402_10V6KUMA_HDMI@1 2
R77 8.2K_0402_1%1 2
T10 P AD
LVDS
Digital Display Interface
CRT
U7D
IBEXPEAK-M_FCBGA1071
L_BKLTCTLY48
L_BKLTENT48
L_CTRL_CLKAB46
L_CTRL_DATAV48
L_DDC_CLKAB48
L_DDC_DATAY45
L_VDD_ENT47
LVDSA_CLK#AV53
LVDSA_CLKAV51
LVDSA_DATA#0BB47
LVDSA_DATA#1BA52
LVDSA_DATA#2AY48
LVDSA_DATA#3AV47
LVDSA_DATA0BB48
LVDSA_DATA1BA50
LVDSA_DATA2AY49
LVDSA_DATA3AV48
LVDSB_CLK#AP48
LVDSB_CLKAP47
LVDSB_DATA#0AY53
LVDSB_DATA#1AT49
LVDSB_DATA#2AU52
LVDSB_DATA#3AT53
LVDSB_DATA0AY51
DDPB_0NBD42
DDPB_1NBJ42
LVD_VREFHAT43
LVD_VREFLAT42
DDPD_2NBF37
DDPD_3NBE36
DDPB_2NBB40
DDPB_3NAW38
DDPC_0NBE40
DDPC_1NBF41
DDPC_2NBD38
DDPC_3NBB36
DDPD_0NBJ40
DDPD_1NBJ38
DDPB_0PBC42
DDPB_1PBG42
DDPD_2PBH37
DDPD_3PBD36
DDPB_2PBA40
DDPB_3PBA38
LVDSB_DATA1AT48
LVDSB_DATA2AU50
LVDSB_DATA3AT51
LVD_IBGAP39
LVD_VBGAP41
DDPC_1PBH41
DDPC_0PBD40
DDPC_2PBC38
DDPC_3PBA36
DDPD_0PBG40
DDPD_1PBG38
CRT_BLUEAA52
CRT_DDC_CLKV51
CRT_DDC_DATAV53
CRT_GREENAB53
CRT_HSYNCY53
CRT_IRTNAB51
CRT_REDAD53
CRT_VSYNCY51
DAC_IREFAD48
SDVO_CTRLCLKT51
SDVO_CTRLDATAT53
DDPC_CTRLCLKY49
DDPC_CTRLDATAAB49
DDPD_CTRLCLKU50
DDPD_CTRLDATAU52
DDPB_AUXNBG44
DDPC_AUXNBE44
DDPD_AUXNBC46
DDPB_AUXPBJ44
DDPC_AUXPBD44
DDPD_AUXPBD46
DDPB_HPDAU38
DDPC_HPDAV40
DDPD_HPDAT38
SDVO_TVCLKINPBG46
SDVO_TVCLKINNBJ46
SDVO_STALLPBG48
SDVO_STALLNBJ48
SDVO_INTPBH45
SDVO_INTNBF45
R416 10K_0402_5%@1 2
C642 0.1U_0402_10V6KUMA_HDMI@1 2
C644 0.1U_0402_10V6KUMA_HDMI@1 2
C641 0.1U_0402_10V6KUMA_HDMI@1 2
R398 0_0402_5%@1 2
R450 10K_0402_5%1 2
R108 10K_0402_5%1 2
DMI
FDI
System Power Management
U7C
IBEXPEAK-M_FCBGA1071
DMI0RXNBC24
DMI1RXNBJ22
DMI2RXNAW20
DMI3RXNBJ20
DMI0RXPBD24
DMI1RXPBG22
DMI2RXPBA20
DMI3RXPBG20
DMI0TXNBE22
DMI1TXNBF21
DMI2TXNBD20
DMI3TXNBE18
DMI0TXPBD22
DMI1TXPBH21
DMI2TXPBC20
DMI3TXPBD18
DMI_ZCOMPBH25
DMI_IRCOMPBF25
FDI_RXN0BA18
FDI_RXN1BH17
FDI_RXN2BD16
FDI_RXN3BJ16
FDI_RXN4BA16
FDI_RXN5BE14
FDI_RXN6BA14
FDI_RXN7BC12
FDI_RXP0BB18
FDI_RXP1BF17
FDI_RXP2BC16
FDI_RXP3BG16
FDI_RXP4AW16
FDI_RXP5BD14
FDI_RXP6BB14
FDI_RXP7BD12
FDI_FSYNC0BF13
FDI_FSYNC1BH13
FDI_LSYNC0BJ12
FDI_LSYNC1BG14
FDI_INTBJ14
PMSYNCHBJ10
TP23N2
SLP_M#K8
SLP_S3#P12
SLP_S4#H7
SLP_S5# / GPIO63E4
SYS_RESET#T6
SYS_PWROKM6
PWRBTN#P5
RI#F14
WAKE#J12
SUS_STAT# / GPIO61P8
SUSCLK / GPIO62F3
ACPRESENT / GPIO31P7
LAN_RST#A10
MEPWROKK5
BATLOW# / GPIO72A6
PWROKB17
CLKRUN# / GPIO32Y1
SUS_PWR_DN_ACK / GPIO30M1
RSMRST#C16
DRAMPWROKD9
SLP_LAN# / GPIO29F6
R520 49.9_0402_1%1 2
C643 0.1U_0402_10V6KUMA_HDMI@1 2
C645 0.1U_0402_10V6KUMA_HDMI@1 2
R165 10K_0402_5%1 2
D8B
BAV99DW-7_SOT363
453
R458 2.2K_0402_5%UMA@
C
B
E
Q14MMBT3906_SOT23-3
1
2
3
R40110K_0402_5%
12
R5042.2K_0402_5%
UMA@
12
R437 10K_0402_5%1 2
C638 0.1U_0402_10V6KUMA_HDMI@1 2
R495 150_0402_1%UMA@1 2
R5032.2K_0402_5%
UMA@
12
R176 4.7K_0402_5%1 2
R448
10K_0402_5%
12
C639 0.1U_0402_10V6KUMA_HDMI@1 2
R175
2.2K_0402_5%
1 2
U28
MC74VHC1G08DFT2G SC70 5P@
B2
A1
Y4
P5
G3
R510 10K_0402_5%
12
R451 0_0402_5%1 2
R5022.37K_0402_1%
12
R599 0_0402_5%@1 2
R49710K_0402_5%
1 2
R494 150_0402_1%UMA@1 2
R397 0_0402_5%1 2
R493 150_0402_1%UMA@1 2
R4020_0402_5%@
1 2
R436
10K_0402_5%
1 2
R4550_0402_5%
12
R498 2.2K_0402_5%UMA@
R4
92
1K
_0
40
2_
5%
12
R396 100K_0402_1%12
D8ABAV99DW-7_SOT363
126
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USBRBIAS
USB20_N0USB20_P0
USB20_N5USB20_P5
USB20_P10USB20_N10
USB20_N8USB20_P8
USB20_P2USB20_N2
USB_OC#4
NV_RCOMP
EC_SMI#
H_ PECI
KB_RST#
USB20_N1USB20_P1
PLT_RST#
USB_OC#0
GPIO0
PCI_FRAME#PCI_DEVSEL#
PCI_STOP#
PCI_LOCK#
PCI_ TRDY#
PCI_IRD Y#
PC I_PERR#PC I_SERR#
PCI_PIRQA#
PCI _PIRQD#
PCI_PIRQE#
PCI _PIRQH#
PCI_PIRQB#
PC I_PIRQF#
PCI _PIRQC#
P CI_PIRQG#
PCI_REQ2#PCI_REQ1#
PCI_REQ3#
PCI_REQ0#
PLT_RST#
PCI_GNT0#PCI_GNT1#
PCI_GNT3#
N V_CLE
NV_ALE
PCI_GNT1#
PCI_GNT0#
USB20_N11USB20_P11
USB20_N13USB20_P13
USB_OC#1USB_OC#2USB_OC#3
USB_OC#5USB_OC#6USB_OC#7
USB_OC#2
USB_OC#7
USB_OC#4
USB_OC#0
USB_OC#3
USB_OC#5
USB_OC#1
USB_OC#6
GPIO1
GPIO6
GPIO15
GPIO22
GPIO28
GPIO35
GPIO37
GPIO38
GPIO39
GPIO45
GPIO48
CL K_PCI_LPC_RCL K_PCI_FB_R
C PUSB#
GPIO34
KB_RST#
INT3_3V#
TP24
PCH_TEMP_ALERT#
EC_SMI#
EC _SCI#
PCH_TEMP_ALERT#PCI_DEVSEL#
PCI_ TRDY#PCI_FRAME#
PCI_STOP#
PCI_LOCK#
PCI_IRD Y#
PC I_PERR#PC I_SERR#
PCI_REQ3#
PCI_REQ0#
PCI_REQ1#
PCI_REQ2#
PCI _PIRQH#
PCI_PIRQE#
PCI _PIRQD#
PCI_PIRQA#PCI _PIRQC#PCI_PIRQB#
PC I_PIRQF#
P CI_PIRQG#
EC _SCI#
USB20_P3USB20_N3
PCI_GNT3#
GPIO16
GPIO17
GPIO36
GPIO36
GPIO17
GPIO16
H_THERMTRIP#_L
PCI_GNT2#
NV_ALEN V_CLE
DRAMRST_CNTRL_PCH GPIO46DRAMRST_CNTRL_PCH
GPIO57
USB20_N0 <37>USB20_P0 <37>
USB20_N2 <27>USB20_P2 <27>
USB20_N5 <38>USB20_P5 <38>
USB20_N8 <28>USB20_P8 <28>
USB20_N10 <28>USB20_P10 <28>
BUF_PLT_RST#<5,19,28,29>
GATEA20 <34>
H_CPUPW RGD <5>
H_P ECI <5>
H_THERMTRIP# <5>
KB_RST# <34>
USB_OC#0 <37>
CLK_CPU_BCLK <5>
CLK_CPU_BCLK# <5>
PCI_PME#<34>
PCI_RST#<28,34>
USB20_N11 <37>USB20_P11 <37>
CLK_PCI_LPC<34>CLK_PCI_FB<14>
CPUSB#<28>
EC_SMI#<34>
EC_SCI#<34>
USB20_N1 <37>USB20_P1 <37>
USB20_N13 <28>USB20_P13 <28>
USB20_N3 <37>USB20_P3 <37>
USB_OC#1 <37>
SUSP#<28,34,39,42,44,46> VGA_EN <45>
DRAMRST_CNTRL_PCH<5>
PCH_TEMP_ALERT#<34>
+3VS +3VS
+VCCP
+3VS
+3VALW
+3VS
+3VS
+1.8VS
+3VALW
+3VALW
+3VALW
+3VALW
+3VS
+3VALW
+3VS
+3VS
+3VALW
+3VS
Title
Size Document Number R e v
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
IBEX-M(4/6)-PCI/USB/RSVDCustom
16 51Thursday, October 29, 2009
2008/08/12 2009/08/12Compal Electronics, Inc.
LA-5752P
Within 500 mils minimum spacing to other
signal is 15mil
LEFT USB (COMBO)
Bluetooth
3G CARD
CARD READER
EXPRESS
WLAN
USB Camera
GPIO27 if pull down to turn off 1.8V VR
GPIO8Weak internal PU, don't PD
*
GNT2
Default-Internal pull up
Low=Configures DMI for ESIcompatible operation(forservers only.Not formobile/desktops)
*
override/Top-BlockLow=A16 swap
PCI_GNT3#
A16 swap overide Strap/Top-BlockSwap Override jumper
Swap Override enabledHigh=Default
Intel Anti-Theft Techonlogy
*
Weak internalPU,Do not pull low
Set to Vcc when HIGH
DMI Termination Voltage
NV_ALEHigh=Enabled
Low=Disable(floating)
NV_CLESet to Vss when LOW
NV_ALE
NV_CLE
Enable Intel Anti-TheftTechnology 8.2K PU to +3VS:Disable Intel Anti-TheftTechnology:floating(internal PD)
DMI termination voltage.weak internal PU, don't PD
11
PCI_GNT1#PCI_GNT0#
0
Boot BIOSLocation
1
LPC
Boot BIOS Strap
PCI
0
Reserved(NAND)
SPI
1
0
0
*
GPIO27
GPIO15*
5
BT
3G
6
4
CMOS
RIGHT SIDE0
DEVICEPORT
3
2
11
NEW CARD
USB PORT LIST
WIRELESS8
10
1
CARD READER
9
7
12
13
GPIO18 = NATIVE,5V,COREGPIO52 = NATIVE,5V,COREGPIO54 = NATIVE,5V,CORE
GPIO2 = GPI,5V,COREGPIO3 = GPI,5V,COREGPIO4 = GPI,5V,COREGPIO5 = GPI,5V,CORE
GPIO0 = GPI,3.3V,CORE
RIGHT USB
LEFT USB
LEFT SIDE
LEFT SIDE
56 5%-->checklist 1.654.9 1%-->CRB 1.0
H Intel ME: Crypto TransportLayer Security(TLS) chiper suitewith confidentiality
L Intel ME: Crypto TransportLayer Security(TLS) chiper suitewith no confidentiality
High Enable: s the internal VccVRMto have a clean supply for analograils. no need to use on boardfilter circuit.
Default Do : not connect(floating)
it have weak internal PU 20K
GPIO12 = GPI,3.3V,SUSGPIO8 = GPO,3.3V,SUSGPIO7 = GPI,3.3V,COREGPIO6 = GPI,3.3V,COREGPIO1 = GPI,3.3V,CORE
Check list Rev0.8 section1.23.2 If not implemented, theBraidwood interface signals can be left as No Connect (NC).
within 500mil
6
checklist 2.0 update 2009.0916
R429 10K_0402_5%1 2
R42710K_0402_5%1 2
R212 1K_0402_5%@1 2
R199 22_0402_5%
1 2
R506 0_0402_5%DIS@
1 2
R609 10K_0402_5%
@
1 2
R44910K_0402_5%1 2
R426 10K_0402_5%@1 2
RP5
8.2K_0804_8P4R_5%
1 82 73 64 5
R98 1K_0402_5%@ 1 2
R45610K_0402_5%12
R164 22.6_0402_1%1 2
R200 1K_0402_5%@ 1 2
GPIO
MISC
NCTF
RSVD
CPU
U 7F
IBEXPEAK-M_FCBGA1071
GPIO27AB12
GPIO28V13
GPIO24H10
GPIO57F8
LAN_PHY_PWR_CTRL / GPIO12K9
VSS_NCTF_1A4
VSS_NCTF_2A49
VSS_NCTF_3A5
VSS_NCTF_4A50
VSS_NCTF_5A52
VSS_NCTF_6A53
VSS_NCTF_7B2
VSS_NCTF_8B4
VSS_NCTF_9B52
VSS_NCTF_10B53
VSS_NCTF_11BE1
VSS_NCTF_12BE53
VSS_NCTF_13BF1
VSS_NCTF_14BF53
VSS_NCTF_15BH1
VSS_NCTF_16BH2
VSS_NCTF_17BH52
VSS_NCTF_18BH53
VSS_NCTF_19BJ1
VSS_NCTF_20BJ2
VSS_NCTF_21BJ4
VSS_NCTF_22BJ49
VSS_NCTF_23BJ5
VSS_NCTF_24BJ50
VSS_NCTF_25BJ52
VSS_NCTF_26BJ53
VSS_NCTF_27D1
VSS_NCTF_28D2
VSS_NCTF_29D53
VSS_NCTF_30E1
VSS_NCTF_31E53
TACH2 / GPIO6D37
TACH0 / GPIO17F38
TACH3 / GPIO7J32
TP9M18
TP10N18
TP11AJ24
TP12AK41
SATA3GP / GPIO37AB13
SATA5GP / GPIO49AA4
SCLOCK / GPIO22Y7
SLOAD / GPIO38V3
SDATAOUT0 / GPIO39P3
SDATAOUT1 / GPIO48AB6
A20GATEU2
PROCPWRGDBE10
RCIN#T1
PECIBG10
THRMTRIP#BD10
GPIO8F10
CLKOUT_PCIE6NAH45
CLKOUT_PCIE6PAH46
PCIECLKRQ6# / GPIO45H3
CLKOUT_PCIE7NAF48
CLKOUT_PCIE7PAF47
PCIECLKRQ7# / GPIO46F1
TP5AY46
TP4AY45
TP6AV43
TP7AV45
BMBUSY# / GPIO0Y3
TP16M30
TP17N30
NC_1AB45
NC_2AB38
NC_3AB42
NC_4AB41
GPIO15T7
TACH1 / GPIO1C38
TP13AK42
TP3BB22
TP1BA22
TP2AW22
TP14M32
TP15N32
SATA2GP / GPIO36AB7
NC_5T39
INIT3_3V#P6
STP_PCI# / GPIO34M11
SATACLKREQ# / GPIO35V6
SATA4GP / GPIO16AA2
TP24C10
TP8AF13
CLKOUT_BCLK0_N / CLKOUT_PCIE8NAM3
CLKOUT_BCLK0_P / CLKOUT_PCIE8PAM1
TP19AA23
TP18H12
R110
10K_0402_5%
12
R111
10K_0402_5%
12
PCI
NVRAM
USB
U7E
IBEXPEAK-M_FCBGA1071
AD0H40
AD1N34
AD2C44
AD20C42
AD21K46
AD22M51
AD23J52
AD24K51
AD25L34
AD26F42
AD27J40
AD28G46
AD29F44
AD3A38
AD30M47
AD31H36
AD4C36
AD5J34
AD6A40
AD7D45
AD8E36
AD9H48
C/BE0#J50
C/BE1#G42
C/BE2#H47
C/BE3#G34
PCIRST#K6
PERR#E50
PIRQA#G38
PIRQB#H51
PIRQC#B37
PIRQD#A44
PLOCK#D49
PLTRST#D5
PME#M7
REQ0#F51
REQ1# / GPIO50A46
REQ2# / GPIO52B45
REQ3# / GPIO54M53
SERR#E44
STOP#D41
TRDY#C48
NV_ALEBD3
NV_CE#0AY9
NV_CE#1BD1
NV_CE#2AP15
NV_CE#3BD8
NV_CLEAY6
NV_DQS0AV9
NV_DQS1BG8
NV_DQ0 / NV_IO0AP7
NV_DQ1 / NV_IO1AP6
NV_DQ10 / NV_IO10BD6
NV_DQ11 / NV_IO11BB7
NV_DQ12 / NV_IO12BC8
NV_DQ13 / NV_IO13BJ8
NV_DQ14 / NV_IO14BJ6
NV_DQ15 / NV_IO15BG6
NV_DQ2 / NV_IO2AT6
NV_DQ3 / NV_IO3AT9
NV_DQ4 / NV_IO4BB1
NV_DQ5 / NV_IO5AV6
NV_DQ6 / NV_IO6BB3
NV_DQ7 / NV_IO7BA4
NV_DQ8 / NV_IO8BE4
NV_DQ9 / NV_IO9BB6
NV_RB#AV7
NV_RCOMPAU2
NV_WR#0_RE#AY8
NV_WR#1_RE#AY5
NV_WE#_CK0AV11
NV_WE#_CK1BF5
USBP0NH18
USBP0PJ18
USBP10NA22
USBP10PC22
USBP11NG24
USBP11PH24
USBP12NL24
USBP12PM24
USBP13NA24
USBP13PC24
USBP1NA18
USBP1PC18
USBP2NN20
USBP2PP20
USBP3NJ20
USBP3PL20
USBP4NF20
USBP4PG20
USBP5NA20
USBP5PC20
USBP6NM22
USBP7NB21
USBP7PD21
USBP8NH22
USBP8PJ22
USBP9NE22
USBP9PF22
USBRBIAS#B25
USBRBIASD25
USBP6PN22
AD10E40
AD11C40
AD12M48
AD13M45
AD14F53
AD15M40
AD16M43
AD17J36
AD18K48
AD19F40
DEVSEL#F46
FRAME#C46
GNT0#F48
GNT1# / GPIO51K45
GNT2# / GPIO53F36
GNT3# / GPIO55H53
PIRQE# / GPIO2B41
PIRQF# / GPIO3K53
PIRQG# / GPIO4A36
PIRQH# / GPIO5A48
IRDY#A42
PARH44
OC0# / GPIO59N16
OC1# / GPIO40J16
OC2# / GPIO41F16
OC3# / GPIO42L16
OC4# / GPIO43E14
OC5# / GPIO9G16
OC6# / GPIO10F12
OC7# / GPIO14T15
CLKOUT_PCI0N52
CLKOUT_PCI1P53
CLKOUT_PCI2P46
CLKOUT_PCI3P51
CLKOUT_PCI4P48
R485 10K_0402_5%1 2
RP6
8.2K_0804_8P4R_5%
1 82 73 64 5
R414 10K_0402_5%@1 2
R48310K_0402_5%1 2
RP2
8.2K_0804_8P4R_5%
1 82 73 64 5
R10910K_0402_5%1 2
R107 10K_0402_5%12
R7610K_0402_5%1 2
R48010K_0402_5%1 2
R149 0_0402_5%1 2
R484 10K_0402_5%1 2
RP4
8.2K_0804_8P4R_5%
1 82 73 64 5
RP1
8.2K_0804_8P4R_5%
1 82 73 64 5
R50710K_0402_5%@ 12
R10432.4_0402_1%
@
1 2
R405 10K_0402_5%12
R42810K_0402_5%1 2
R155100K_0402_5%
12
RP3
8.2K_0804_8P4R_5%
1 82 73 64 5
RP7
8.2K_0804_8P4R_5%
1 82 73 64 5
R11210K_0402_5%1 2
R415 10K_0402_5%1 2
R51856_0402_5%
1 2
R48110K_0402_5%1 2
R44610K_0402_5%1 2
R408 100K_0402_1%12
R211 22_0402_5%
1 2
R4331K_0402_5%1 2
R515 1K_0402_5%@ 1 2
U5
MC74VHC1G08DFT2G SC70 5P@
B2
A1
Y4
P5
G3
R210 1K_0402_5%@1 2
R43210K_0402_5%12
R51956_0402_5%
12
C6460.1U_0402_16V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
P CH_V5REF_SUS
+PCH_VCC1_1_23
P CH_V5REF_SUS
+PCH_VCC1_1_22
+PCH_VCC1_1_20
+V1.1A_INT_VCCSUS
+VCCSST
+PCH_VCC1_1_21
+VCCRTCEXT
PCH_V5 REF_RUN
PCH_V5 REF_RUN
+VCCTX_LVDS
+VCCA_LVDS
+1.05VS
+1.05VS
+1.05VS
+3VS
+3VS
+VCCP
+3VS
+PCH_VRM
+1.05VS
+3VALW
+3VS
+VCCP
+RTCVCC
+1.05VS
+3VS
+1.05VS
+1.05VS
+3VALW
+1.05VS
+5VS +3VS+3VALW+5VALW
+3VS
+3VS
+PCH_VRM
+1.05VS
+PCH_VRM
+3VALW
+1.05VS
+3VS_DAC
+3VS
+1.8VS
+3VALW
+1.05VS
+3VS
+1.8VS
+VCCADPLLB
+VCCADPLLA+1.05VS
+VCCADPLLA
+VCCADPLLB
+PCH_VRM +1.8VS
+1.5V
Title
Size Document Number R e v
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
IBEX-M(5/6)-PWRCustom
17 51Thursday, October 29, 2009
2008/08/12 2009/08/12Compal Electronics, Inc.
LA-5752P
20 mils20 mils
3.208A
0.163A
1.998A
0.344A
0.052A
0.035A
0.072A
0.073A0.357A
2mA
>1mA
>1mA
6mA
0.032A
0.069A
0.030A
0.156A
6mA
0.035A
0.061A
0.059A
0.085A
0.042A
1.524A
0.0.0.0. 2A@3.3V2A@3.3V2A@3.3V2A@3.3V0.0.0.0. 4A@3.3V4A@3.3V4A@3.3V4A@3.3V0.0.0.0. 1A@1.1V1A@1.1V1A@1.1V1A@1.1V2mA2mA2mA2mA @3.3V@3.3V@3.3V@3.3V >1mA
UPDATE 0210
DG1.1 no M3support and notIntel LAN, VCCLANSource=>GND
0.1uH inductor, 200mA
10uH inductor, 120mA
10uH inductor, 120mA
lsolate AF32,AF34,AH34
from AH35,AJ35
for Intel request 09.09.08
C4
55
0.1
U_
04
02
_1
6V
4Z
1
2
C4530.1U_0402_16V4Z
1 2
C4
71
1U
_0
40
2_
6.3
V6
K
1
2
C4
75
1U
_0
40
2_
6.3
V6
K
1
2
C4540.1U_0402_16V4Z
1 2
C1390.1U_0402_16V4Z
1 2
C5
00
4.7
U_
06
03
_6
.3V
6K
1
2
C4
89
0.1
U_
04
02
_1
6V
4Z
1
2
L2610UH_LB2012T100MR_20%
1 2
D6
CH751H-40PT_SOD323-2
21
C492
10U_0805_6.3V6M
UMA@
1
2
R5090_0402_5%1 2
R489 0_0402_5%1 2
C2
24
0.1
U_
04
02
_1
6V
4Z
1
2
R410 0_0402_5%1 2
C4
74
1U
_0
40
2_
6.3
V6
K
1
2
D9
CH751H-40PT_SOD323-2
21
R411 0_0402_5%@
1 2
C4
83
1U
_0
40
2_
6.3
V6
K
1
2
C4
68
0.1
U_
04
02
_1
6V
4Z
1
2
C4931U_0402_6.3V4Z@
1
2
R42310_0402_1%
12
R208
0_0603_5%
1 2
R488 0_0402_5%1 2
R213 0.022_0805_1%UMA@1 2
C2
62
10
U_
08
05
_6
.3V
6M
1
2
R490 0_0402_5%1 2
C4630.1U_0402_16V4Z
1 2
C486
0.01U_0402_16V7K
UMA@
1
2
R5210_0402_5%@
12
R487 0_0402_5%1 2
L28
0.1UH_MLF1608DR10KT_10%_1608
UMA@
12
C4
77
0.0
1U
_0
40
2_
16
V7
K
@
1
2
C491 1U_0402_6.3V6K1 2
C4
84
1U
_0
40
2_
6.3
V6
K
1
2
C4
72
1U
_0
40
2_
6.3
V6
K
1
2
C4
65
1U
_0
40
2_
6.3
V6
K
1
2
C4
73
1U
_0
40
2_
6.3
V6
K
1
2
C4
64
1U
_0
40
2_
6.3
V6
K
1
2
R501 0_0402_5%
@
1 2
C485
0.01U_0402_16V7KUMA@
1
2
C4941U_0402_6.3V4Z@
1
2
+C507220U_B2_2.5VM_R35
UMA@
1
2
C452
0.1U_0402_16V4Z1 2
C4760.1U_0402_16V4Z
1
2
C4
78
0.1
U_
04
02
_1
6V
4Z
1
2
POWER
VCC CORE
DMI
PCI E*
CRT
LVDS
FDI
NAND / SPI
HVCMOS
U7G
IBEXPEAK-M_FCBGA1071
VCCCORE[1]AB24
VCCCORE[2]AB26
VCCCORE[3]AB28
VCCCORE[4]AD26
VCCCORE[5]AD28
VCCCORE[6]AF26
VCCCORE[7]AF28
VCCCORE[8]AF30
VCCCORE[9]AF31
VCCCORE[10]AH26
VCCCORE[11]AH28
VCCCORE[12]AH30
VCCCORE[13]AH31
VCCCORE[14]AJ30
VCCCORE[15]AJ31
VCCPNAND[4]AK19
VCCPNAND[3]AK20
VCCIO[27]AN23
VCCIO[28]AN24
VCCIO[29]AN26
VCCIO[30]AN28
VCCIO[54]AN30
VCCIO[55]AN31
VCCIO[33]AT26
VCCIO[34]AT28
VCCIO[35]AU26
VCCIO[36]AU28
VCCIO[37]AV26
VCCIO[38]AV28
VCCIO[39]AW26
VCCIO[40]AW28
VCCIO[41]BA26
VCCIO[42]BA28
VCCIO[43]BB26
VCCIO[44]BB28
VCCIO[45]BC26
VCCIO[46]BC28
VCCIO[47]BD26
VCCIO[48]BD28
VCCIO[49]BE26
VCCIO[50]BE28
VCCIO[51]BG26
VCCIO[52]BG28
VCCIO[53]BH27
VCCIO[31]BJ26
VCCIO[32]BJ28
VCCADAC[1]AE50
VCCADAC[2]AE52
VCCTX_LVDS[1]AP43
VCCTX_LVDS[2]AP45
VCCALVDSAH38
VCCVRM[2]AT24
VCCVRM[1]AT22
VCCAPLLEXPBJ24
VCCFDIPLLBJ18
VCCPNAND[6]AK13
VCCPNAND[5]AK15
VCCPNAND[7]AM12
VCCPNAND[8]AM13
VCCIO[24]AK24
VCCTX_LVDS[4]AT45
VCCTX_LVDS[3]AT46
VSSA_DAC[1]AF53
VSSA_LVDSAH39
VSSA_DAC[2]AF51
VCCIO[1]AM23
VCC3_3[2]AB34
VCC3_3[3]AB35
VCC3_3[4]AD35
VCC3_3[1]AN35
VCCME3_3[1]AM8
VCCME3_3[2]AM9
VCCME3_3[3]AP11
VCCME3_3[4]AP9
VCCPNAND[2]AK16
VCCPNAND[9]AM15
VCCPNAND[1]AM16
VCCDMI[1]AT16
VCCDMI[2]AU16
VCCIO[25]AN20
VCCIO[26]AN22C
51
5
10
U_
06
03
_6
.3V
6M
1
2
C4
62
1U
_0
40
2_
6.3
V6
K
1
2
R43810_0402_1%
12
+C506220U_B2_2.5VM_R35
UMA@
1
2
C4
35
1U
_0
40
2_
6.3
V6
K
1
2
C4
67
0.1
U_
04
02
_1
6V
4Z
1
2C
50
2
10
U_
06
03
_6
.3V
6M
1
2
POWER
SATA
USB
Clock and Miscellaneous
HDA
CPU
PCI/GPIO/LPC
RTC
PCI/GPIO/LPC
U 7J
IBEXPEAK-M_FCBGA1071
DCPSUSBYPY20
VCCME[1]AD38
VCCME[2]AD39
VCCME[3]AD41
VCCME[5]AF41
VCCME[6]AF42
VCCSUSHDAL30
VCCSUS3_3[28]U23
VCCIO[56]V23
VCCIO[13]AD19
VCCIO[14]AF20
VCCIO[15]AF19
VCCME[7]V39
VCCME[8]V41
VCCME[9]V42
VCCME[10]Y39
VCCME[11]Y41
VCCME[12]Y42
V5REFK49
VCC3_3[8]J38
VCC3_3[9]L38
VCC3_3[10]M36
VCC3_3[11]N36
VCC3_3[12]P36
VCC3_3[13]U35
VCCRTCA12
VCCSUS3_3[27]A26
VCCSUS3_3[26]A28
VCCSUS3_3[25]B27
VCCSUS3_3[24]C26
VCCSUS3_3[23]C28
VCCSUS3_3[22]E26
VCCSUS3_3[21]E28
VCCSUS3_3[20]F26
VCCSUS3_3[19]F28
VCCSUS3_3[18]G26
VCCSUS3_3[17]G28
VCCSUS3_3[16]H26
VCCSUS3_3[15]H28
VCCSUS3_3[14]J26
VCCSUS3_3[13]J28
VCCSUS3_3[12]L26
VCCSUS3_3[11]L28
VCCSUS3_3[10]M26
VCCSUS3_3[9]M28
VCCSUS3_3[8]N26
VCCSUS3_3[7]N28
VCCSUS3_3[6]P26
VCCSUS3_3[5]P28
VCCSUS3_3[4]U24
VCCSUS3_3[3]U26
VCCSUS3_3[2]U28
VCCSUS3_3[1]V28
VCCIO[11]AD20
VCCIO[20]AD22
VCCIO[10]AH19
VCCADPLLA[2]BB53
VCCADPLLB[1]BD51
VCCIO[22]AJ35
V5REF_SUSF24
VCCIO[16]AH20
VCCIO[17]AB19
VCCIO[18]AB20
VCCIO[19]AB22
VCCIO[12]AF22
VCC3_3[14]AD13
VCCIO[9]AH22
VCCVRM[4]AT20
DCPSUSY22
VCCIO[2]AF34
VCCIO[3]AH34
VCCLAN[1]AF23
VCCLAN[2]AF24
VCCADPLLA[1]BB51
VCCADPLLB[2]BD53
VCCVRM[3]AU24
VCCACLK[1]AP51
VCCACLK[2]AP53
DCPRTCV9
VCCIO[4]AF32
VCCME[4]AF43
VCCIO[23]AH35
VCCIO[21]AH23
DCPSSTV12
VCCSATAPLL[2]AK1
VCCSATAPLL[1]AK3
VCCME[13]AA34
VCCME[14]Y34
VCCME[15]Y35
VCCME[16]AA35
VCC3_3[5]V15
VCC3_3[6]V16
VCC3_3[7]Y16
VCCSUS3_3[29]P18
VCCSUS3_3[30]U19
VCCSUS3_3[31]U20
VCCSUS3_3[32]U22
VCCIO[5]V24
VCCIO[6]V26
VCCIO[7]Y24
VCCIO[8]Y26
V_CPU_IO[1]AT18
V_CPU_IO[2]AU18
C4471U_0402_6.3V6K
1
2
C5
16
10
U_
06
03
_6
.3V
6M
1
2
R527
0_0603_5%
@
1 2
R2140_0402_5%DIS@
12
C4
42
0.1
U_
04
02
_1
6V
4Z
1
2
C456 0.1U_0402_16V4Z1 2
C5
14
10
U_
06
03
_6
.3V
6M
1
2
C4
70
1U
_0
40
2_
6.3
V6
K
1
2
C4
40
0.1
U_
04
02
_1
6V
4Z
1
2
T8P AD
R508 0_0402_5%1 2
R4860_0402_5%
12 C461 0.1U_0402_16V4Z
1 2
R528
0_0402_5%
DIS@
12
C4691U_0402_6.3V4Z@
1
2
C4481U_0402_6.3V6K
1
2
C4
66
1U
_0
40
2_
6.3
V6
K
1
2
C5
03
10
U_
06
03
_6
.3V
6M
1
2
C5
01
0.1
U_
04
02
_1
6V
4Z
1
2
L2510UH_LB2012T100MR_20%
1 2
C5
04
10
U_
06
03
_6
.3V
6M
1
2
C457 0.1U_0402_16V4Z1 2
C505
10U_0805_6.3V6M
UMA@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number R e v
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
IBEX-M(6/6)-GNDCustom
18 51Thursday, October 29, 2009
2008/10/31 2009/10/31Compal Electronics, Inc.
LA-5752P
U7H
IBEXPEAK-M_FCBGA1071
VSS[1]AA19
VSS[2]AA20
VSS[3]AA22
VSS[5]AA24
VSS[6]AA26
VSS[7]AA28
VSS[8]AA30
VSS[9]AA31
VSS[10]AA32
VSS[11]AB11
VSS[12]AB15
VSS[13]AB23
VSS[14]AB30
VSS[15]AB31
VSS[16]AB32
VSS[17]AB39
VSS[18]AB43
VSS[19]AB47
VSS[20]AB5
VSS[21]AB8
VSS[22]AC2
VSS[23]AC52
VSS[24]AD11
VSS[25]AD12
VSS[26]AD16
VSS[27]AD23
VSS[28]AD30
VSS[29]AD31
VSS[30]AD32
VSS[31]AD34
VSS[33]AD42
VSS[34]AD46
VSS[35]AD49
VSS[36]AD7
VSS[37]AE2
VSS[38]AE4
VSS[39]AF12
VSS[43]AF35
VSS[44]AP13
VSS[46]AF45
VSS[47]AF46
VSS[48]AF49
VSS[49]AF5
VSS[50]AF8
VSS[51]AG2
VSS[52]AG52
VSS[53]AH11
VSS[54]AH15
VSS[55]AH16
VSS[56]AH24
VSS[57]AH32
VSS[59]AH43
VSS[60]AH47
VSS[61]AH7
VSS[62]AJ19
VSS[63]AJ2
VSS[64]AJ20
VSS[65]AJ22
VSS[66]AJ23
VSS[67]AJ26
VSS[68]AJ28
VSS[69]AJ32
VSS[70]AJ34
VSS[71]AT5
VSS[72]AJ4
VSS[73]AK12
VSS[76]AK26
VSS[77]AK22
VSS[78]AK23
VSS[79]AK28
VSS[80]AK30
VSS[81]AK31
VSS[82]AK32
VSS[83]AK34
VSS[84]AK35
VSS[85]AK38
VSS[86]AK43
VSS[87]AK46
VSS[88]AK49
VSS[89]AK5
VSS[90]AK8
VSS[91]AL2
VSS[92]AL52
VSS[93]AM11
VSS[96]AM20
VSS[97]AM22
VSS[98]AM24
VSS[99]AM26
VSS[100]AM28
VSS[102]AM30
VSS[103]AM31
VSS[104]AM32
VSS[105]AM34
VSS[106]AM35
VSS[107]AM38
VSS[108]AM39
VSS[109]AM42
VSS[110]AU20
VSS[111]AM46
VSS[112]AV22
VSS[113]AM49
VSS[114]AM7
VSS[116]BB10
VSS[117]AN32
VSS[118]AN50
VSS[119]AN52
VSS[120]AP12
VSS[121]AP42
VSS[122]AP46
VSS[123]AP49
VSS[124]AP5
VSS[125]AP8
VSS[126]AR2
VSS[127]AR52
VSS[128]AT11
VSS[131]AT32
VSS[132]AT36
VSS[133]AT41
VSS[134]AT47
VSS[135]AT7
VSS[136]AV12
VSS[137]AV16
VSS[138]AV20
VSS[139]AV24
VSS[140]AV30
VSS[141]AV34
VSS[142]AV38
VSS[143]AV42
VSS[144]AV46
VSS[145]AV49
VSS[146]AV5
VSS[147]AV8
VSS[148]AW14
VSS[149]AW18
VSS[150]AW2
VSS[151]BF9
VSS[152]AW32
VSS[153]AW36
VSS[154]AW40
VSS[155]AW52
VSS[156]AY11
VSS[157]AY43
VSS[158]AY47
VSS[40]Y13
VSS[42]AU4
VSS[45]AN34
VSS[115]AA50
VSS[0]AB16
VSS[58]AV18
VSS[32]AU22
VSS[4]AM19
VSS[74]AM41
VSS[75]AN19
VSS[41]AH49
VSS[129]BA12
VSS[130]AH48
VSS[101]BA42
VSS[95]AD24
VSS[94]BB44
U7I
IBEXPEAK-M_FCBGA1071
VSS[159]AY7
VSS[160]B11
VSS[161]B15
VSS[162]B19
VSS[163]B23
VSS[164]B31
VSS[165]B35
VSS[166]B39
VSS[167]B43
VSS[168]B47
VSS[169]B7
VSS[170]BG12
VSS[171]BB12
VSS[172]BB16
VSS[173]BB20
VSS[174]BB24
VSS[175]BB30
VSS[176]BB34
VSS[177]BB38
VSS[178]BB42
VSS[179]BB49
VSS[180]BB5
VSS[181]BC10
VSS[182]BC14
VSS[183]BC18
VSS[184]BC2
VSS[185]BC22
VSS[186]BC32
VSS[187]BC36
VSS[188]BC40
VSS[189]BC44
VSS[190]BC52
VSS[191]BH9
VSS[192]BD48
VSS[193]BD49
VSS[194]BD5
VSS[195]BE12
VSS[196]BE16
VSS[197]BE20
VSS[198]BE24
VSS[199]BE30
VSS[200]BE34
VSS[201]BE38
VSS[202]BE42
VSS[203]BE46
VSS[204]BE48
VSS[205]BE50
VSS[206]BE6
VSS[207]BE8
VSS[208]BF3
VSS[209]BF49
VSS[210]BF51
VSS[211]BG18
VSS[212]BG24
VSS[213]BG4
VSS[214]BG50
VSS[215]BH11
VSS[216]BH15
VSS[217]BH19
VSS[218]BH23
VSS[219]BH31
VSS[220]BH35
VSS[221]BH39
VSS[222]BH43
VSS[223]BH47
VSS[224]BH7
VSS[225]C12
VSS[226]C50
VSS[227]D51
VSS[228]E12
VSS[229]E16
VSS[230]E20
VSS[231]E24
VSS[232]E30
VSS[233]E34
VSS[234]E38
VSS[235]E42
VSS[236]E46
VSS[237]E48
VSS[264]K47
VSS[265]K7
VSS[266]L14
VSS[267]L18
VSS[268]L2
VSS[269]L22
VSS[270]L32
VSS[271]L36
VSS[272]L40
VSS[273]L52
VSS[274]M12
VSS[275]M16
VSS[276]M20
VSS[277]N38
VSS[278]M34
VSS[279]M38
VSS[280]M42
VSS[281]M46
VSS[282]M49
VSS[283]M5
VSS[284]M8
VSS[285]N24
VSS[286]P11
VSS[288]P22
VSS[289]P30
VSS[290]P32
VSS[291]P34
VSS[292]P42
VSS[293]P45
VSS[294]P47
VSS[295]R2
VSS[296]R52
VSS[297]T12
VSS[298]T41
VSS[299]T46
VSS[300]T49
VSS[301]T5
VSS[302]T8
VSS[303]U30
VSS[304]U31
VSS[305]U32
VSS[306]U34
VSS[307]P38
VSS[308]V11
VSS[309]P16
VSS[310]V19
VSS[311]V20
VSS[312]V22
VSS[313]V30
VSS[314]V31
VSS[315]V32
VSS[316]V34
VSS[238]E6
VSS[239]E8
VSS[240]F49
VSS[241]F5
VSS[242]G10
VSS[243]G14
VSS[244]G18
VSS[245]G2
VSS[246]G22
VSS[247]G32
VSS[248]G36
VSS[249]G40
VSS[250]G44
VSS[251]G52
VSS[317]V35
VSS[318]V38
VSS[319]V43
VSS[320]V45
VSS[321]V46
VSS[322]V47
VSS[323]V49
VSS[324]V5
VSS[325]V7
VSS[326]V8
VSS[327]W2
VSS[328]W52
VSS[329]Y11
VSS[330]Y12
VSS[331]Y15
VSS[332]Y19
VSS[333]Y23
VSS[334]Y28
VSS[335]Y30
VSS[336]Y31
VSS[337]Y32
VSS[338]Y38
VSS[339]Y43
VSS[340]Y46
VSS[342]Y5
VSS[343]Y6
VSS[344]Y8
VSS[341]P49
VSS[345]P24
VSS[287]AD15
VSS[252]AF39
VSS[253]H16
VSS[254]H20
VSS[255]H30
VSS[256]H34
VSS[257]H38
VSS[258]H42
VSS[346]T43
VSS[347]AD51
VSS[348]AT8
VSS[349]AD47
VSS[350]Y47
VSS[351]AT12
VSS[352]AM6
VSS[353]AT13
VSS[354]AM5
VSS[355]AK45
VSS[356]AK39
VSS[366]AV14
VSS[262]K11
VSS[263]K43
VSS[259]H49
VSS[260]H5
VSS[261]J24
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VGA_CRT_RVGA_CRT_GVGA_CRT_B
VGA_DDCDATA_CVGA_DDCCLK_C
VGA_LVDS_SCL_CVGA_LVDS_SDA_C
XTALIN
PCIE_CTX_GRX_N1PCIE_CTX_GRX_P1
PCIE_CTX_GRX_P0PCIE_CTX_GRX_N0
PCIE_CTX_GRX_N4PCIE_CTX_GRX_P4
PCIE_CTX_GRX_P5PCIE_CTX_GRX_N5
PCIE_CTX_GRX_N6PCIE_CTX_GRX_P6
PCIE_CTX_GRX_P7PCIE_CTX_GRX_N7
PCIE_CTX_GRX_N8PCIE_CTX_GRX_P8
PCIE_CTX_GRX_P9PCIE_CTX_GRX_N9
PCIE_CTX_GRX_N10PCIE_CTX_GRX_P10
PCIE_CTX_GRX_N11PCIE_CTX_GRX_P11
PCIE_CTX_GRX_N12PCIE_CTX_GRX_P13PCIE_CTX_GRX_N13
PCIE_CTX_GRX_P12
PCIE_CTX_GRX_P14PCIE_CTX_GRX_N14PCIE_CTX_GRX_P15PCIE_CTX_GRX_N15
PCIE_CRX_GTX_N12PCIE_CRX_GTX_P12
PCIE_CRX_C_GTX_N12PCIE_CRX_GTX_P13PCIE_CRX_GTX_N13
PCIE_CRX_GTX_P9PCIE_CRX_GTX_N9
PCIE_CRX_GTX_N15PCIE_CRX_GTX_P15PCIE_CRX_GTX_N14PCIE_CRX_GTX_P14
PCIE_CRX_GTX_P0PCIE_CRX_GTX_N0
PCIE_CRX_GTX_N6PCIE_CRX_GTX_P6
PCIE_CRX_GTX_N2
PCIE_CRX_C_GTX_P14
PCIE_CRX_C_GTX_P15PCIE_CRX_C_GTX_N14
PCIE_CRX_C_GTX_N15
PCIE_CRX_C_GTX_P0PCIE_CRX_C_GTX_N0
PCIE_CRX_C_GTX_N1PCIE_CRX_C_GTX_P1
PCIE_CRX_C_GTX_P2
PCIE_CRX_C_GTX_P3PCIE_CRX_C_GTX_N3
PCIE_CRX_GTX_P4
PCIE_CRX_C_GTX_N2
PCIE_CRX_GTX_N4 PCIE_CRX_C_GTX_N4PCIE_CRX_C_GTX_P5
PCIE_CRX_C_GTX_P4
PCIE_CRX_C_GTX_N5
PCIE_CRX_GTX_N1PCIE_CRX_GTX_P1
PCIE_CRX_GTX_P11PCIE_CRX_GTX_N11
PCIE_CRX_GTX_P8PCIE_CRX_GTX_N8
PCIE_CRX_GTX_P5PCIE_CRX_GTX_N5
PCIE_CRX_GTX_N[0..15]
PCIE_CRX_GTX_P[0..15]
CLK_PCIE_VGA#CLK_PCIE_VGA
PCIE_CTX_GRX_P2PCIE_CTX_GRX_N2
PCIE_CTX_GRX_N3PCIE_CTX_GRX_P3
PCIE_CRX_GTX_P2
PCIE_CRX_C_GTX_N6
PCIE_CRX_GTX_P3
PCIE_CRX_C_GTX_P6
PCIE_CRX_GTX_N3
PCIE_CRX_C_GTX_N7PCIE_CRX_C_GTX_P7
PCIE_CRX_C_GTX_P8PCIE_CRX_C_GTX_N8
PCIE_CRX_GTX_N10PCIE_CRX_GTX_P10
PCIE_CRX_C_GTX_P9PCIE_CRX_C_GTX_N9
PCIE_CRX_C_GTX_N10PCIE_CRX_C_GTX_P10
PCIE_CRX_C_GTX_P11PCIE_CRX_C_GTX_N11PCIE_CRX_C_GTX_P12
PCIE_CRX_GTX_P7PCIE_CRX_GTX_N7
PCIE_CRX_C_GTX_P13PCIE_CRX_C_GTX_N13
XTALOUT
VGA_GPIO14
VGA_CRT_B
VGA_GPIO14VGA_GPIO11
JTAG_TMS
VGA_CRT_R
DACA_VREF
VGA_CRT_G
VGA_LVDS_SCL_C
VGA_LVDS_SDA_C
DACA_RSET
JTAG_TCK
VGA_ENBKL_RVGA_ENVDD_R
VGA_GPIO11
JTAG_TRST_N
JTAG_TDOJTAG_TDI
GPU_VID0GPU_VID1
SMB_EC_DA2_R
VGA_DDCDATA_C
VGA_LVDS_SCL_C
SMB_EC_CK2_R
VGA_DDCCLK_C
VGA_LVDS_SDA_C
HDCP_SMB_CK1HDCP_SMB_DAI
I2CB_SDAI2CB_SCL
VGA_DDCDATA_C
VGA_DDCCLK_C
NV_INVTPWM
PCIE_CTX_GRX_N[0..15]
PCIE_CTX_GRX_P[0..15]
PEG_CLKREQ#
TESTMODE
VGA_LVDS_SCL <27>VGA_LVDS_SDA <27>
VGA_DDCDATA <26>VGA_DDCCLK <26>
PCIE_CTX_GRX_P[0..15]<6>
PCIE_CRX_GTX_N[0..15]<6>
PCIE_CRX_GTX_P[0..15]<6>
CLK_PCIE_VGA<14>CLK_PCIE_VGA#<14>
GPU_VID1 <45>
HDMI_DETECT_VGA <24>
GPU_VID0 <45>
VGA_ENBKL_R <27>VGA_ENVDD_R <27>
VGA_CRT_G <26>VGA_CRT_B <26>
VGA_VSYNC <26>
VGA_CRT_R <26>
VGA_HSYNC <26>
SMB_EC_CK2_R <14,31>SMB_EC_DA2_R <14,31>
PCIE_CTX_GRX_N[0..15]<6>
PEG_CLKREQ#<14>
BUF_PLT_RST#<5,16,28,29>
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
N10M-GE1 PCIE,GPIO,CLK
B
19 51Thursday, October 29, 2009
2007/10/15 2008/10/15Compal Electronics, Inc.
LA-5752P
N10M-GS(40nm)
Device ID
0x0A74
CRT OUT
I2CS is VDD33 power plane same as EC +3.3VS.
DIS@
I2CS is internal thermal sensor.
1
Deep P12
1
0.85V
P-State
1.0V
VGA_COREGPU_VID0
0
GPU_VID1
0.8V
P01
P8
00
GPIO6GPIO5
1
Deep P12
1
0.85V
P-State
0.9V
VGA_COREGPU_VID0
0
GPU_VID1
0.8V
P01
P8
00
0x0A7DN11M-GE1/LP1(40nm)
Device ID
Removed external HDCP. 07/17/2009
Pull Hi at CRT CONN side.
C96 0.1U_0402_16V7KDIS@ 1 2
C104 0.1U_0402_16V7KDIS@ 1 2
R505
10K_0402_5%
@
12
R538 150_0402_1%DIS@1 2C77 0.1U_0402_16V7KDIS@ 1 2
T13PAD
R537 150_0402_1%DIS@1 2
L8MBK1608121YZF_0603DIS@
1 2
C93 0.1U_0402_16V7KDIS@ 1 2
T4PAD
R517 2.2K_0402_5%DIS@1 2C101 0.1U_0402_16V7KDIS@ 1 2C100 0.1U_0402_16V7KDIS@ 1 2
R512 0_0402_5%DIS@1 2
C450
12P_0402_50V8J
DIS@
1
2
C94 0.1U_0402_16V7KDIS@ 1 2
R444 4.7K_0402_5%@ 12
R511 0_0402_5%DIS@1 2
R516 2.2K_0402_5%DIS@
1 2
C112 0.1U_0402_16V7KDIS@ 1 2
R24 10K_0402_5%DIS@1 2
C114 0.1U_0402_16V7KDIS@ 1 2
R540 200_0402_5% @1 2
R51310K_0402_5%
@
12
C120 0.1U_0402_16V7KDIS@ 1 2
C107 0.1U_0402_16V7KDIS@ 1 2
C79 0.1U_0402_16V7KDIS@ 1 2
T12PAD
C106 0.1U_0402_16V7KDIS@ 1 2
C97 0.1U_0402_16V7KDIS@ 1 2
T11PAD
R530 150_0402_1%DIS@1 2
R499
2.2K_0402_5%DIS@
R54210K_0402_5%
DIS@
1 2
C98 0.1U_0402_16V7KDIS@ 1 2
T9PAD
R478
2.2K_0402_5%DIS@
R2510K_0402_5% @1 2
C451
12P_0402_50V8JDIS@
1
2
C81 0.1U_0402_16V4ZDIS@ 12
R543 0_0402_5%@1 2
R539 10K_0402_5%DIS@1 2
C113 0.1U_0402_16V7KDIS@ 1 2T14PAD
C115 0.1U_0402_16V7KDIS@ 1 2
R3410K_0402_5%
DIS@
12
C119 0.1U_0402_16V7KDIS@ 1 2
C102 0.1U_0402_16V7KDIS@ 1 2
C109 0.1U_0402_16V7KDIS@ 1 2
R64 2.2K_0402_5%DIS@ 12
C99 0.1U_0402_16V7KDIS@ 1 2
C110 0.1U_0402_16V7KDIS@ 1 2
C118 0.1U_0402_16V7KDIS@ 1 2
R4210K_0402_5%
DIS@
12
C108 0.1U_0402_16V7KDIS@ 1 2
R48 124_0402_1%DIS@
C116 0.1U_0402_16V7KDIS@ 1 2
R443 4.7K_0402_5%@ 12
L7 MBK1608121YZF_0603DIS@1 2
R63 2.2K_0402_5%DIS@ 12
R46
10K_0402_5%@
12
C103 0.1U_0402_16V7KDIS@ 1 2
C6920P_0402_50V8
DIS@
1
2
C105 0.1U_0402_16V7KDIS@ 1 2
GP
IO
PC
I E
XP
RE
SS
TE
ST
CL
K
Part 1 of 5
I2C
DA
CA
DA
CB
U22A
N11M-GE1-S-A2 _BGA533
DIS@
PEX_RX0AE12
PEX_RX0_NAF12
PEX_RX1AG12
PEX_RX1_NAG13
PEX_RX2AF13
PEX_RX2_NAE13
PEX_RX3AE15
PEX_RX3_NAF15
PEX_RX4AG15
PEX_RX4_NAG16
PEX_RX5AF16
PEX_RX5_NAE16
PEX_RX6AE18
PEX_RX6_NAF18
GPIO0N1
GPIO1G1
GPIO2C1
GPIO3M2
GPIO4M3
GPIO5K3
GPIO6K2
GPIO7J2
GPIO8C2
GPIO9M1
GPIO10D2
GPIO11D1
GPIO13J1
DACA_HSYNCAD2
DACA_VSYNCAD1
DACA_REDAE2
DACA_BLUEAD3
DACA_GREENAE3
DACA_RSETAE1
DACA_VREFAF1
PEX_TSTCLK_OUTAF10
PEX_TSTCLK_OUT_NAE10
GPIO14K1
GPIO15F3
GPIO16G3
GPIO17G2
GPIO18F1
GPIO19F2
GPIO12J3
PEX_REFCLKAB10
PEX_REFCLK_NAC10
PEX_RST_NAD9
PEX_RX7AG18
PEX_RX7_NAG19
PEX_RX8AF19
PEX_RX8_NAE19
PEX_RX9AE21
PEX_RX9_NAF21
PEX_RX10AG21
PEX_RX10_NAG22
PEX_RX11AF22
PEX_RX11_NAE22
PEX_RX12AE24
PEX_RX12_NAF24
PEX_RX13AG24
PEX_RX13_NAF25
PEX_RX14AG25
PEX_RX14_NAG26
PEX_RX15AF27
PEX_RX15_NAE27
PEX_TERMPAG10
PEX_TX0AD10
PEX_TX0_NAD11
PEX_TX1AD12
PEX_TX1_NAC12
PEX_TX2AB11
PEX_TX2_NAB12
PEX_TX3AD13
PEX_TX3_NAD14
PEX_TX4AD15
PEX_TX4_NAC15
PEX_TX5AB14
PEX_TX5_NAB15
PEX_TX6AC16
PEX_TX6_NAD16
PEX_TX7AD17
PEX_TX7_NAD18
PEX_TX8AC18
PEX_TX8_NAB18
PEX_TX9AB19
PEX_TX9_NAB20
PEX_TX10AD19
PEX_TX10_NAD20
PEX_TX11AD21
PEX_TX11_NAC21
PEX_TX12AB21
PEX_TX12_NAB22
PEX_TX13AC22
PEX_TX13_NAD22
PEX_TX14AD23
PEX_TX14_NAD24
PEX_TX15AE25
PEX_TX15_NAE26
PEX_CLKREQ_NAE9
DACB_HSYNCU6
DACB_VSYNCU4
DACB_REDT5
DACB_BLUER4
DACB_GREENT4
DACB_VREFR6
DACB_RSETV6
JTAG_TCKAF3
JTAG_TDIAG4
JTAG_TDOAE4
JTAG_TMSAF4
JTAG_TRST_NAG3
TESTMODEAD25
XTAL_SSIND11
XTAL_OUTBUFFE9
XTAL_OUTE10
XTAL_IND10
I2CS_SCLT1
I2CS_SDAT2
I2CH_SCLA3
I2CH_SDAA4
I2CC_SCLA2
I2CC_SDAB1
I2CB_SCLR2
I2CB_SDAR3
I2CA_SCLR1
I2CA_SDAT3
C85
12P_0402_50V8JDIS@
1
2
C80 0.1U_0402_16V7KDIS@ 1 2
Y2
27MHZ_16PF_X7S027000BG1H-UDIS@
OUT3
GND2
GND4
IN1
R541 2.49K_0402_1% DIS@1 2
C5620P_0402_50V8
DIS@
1
2
C95 0.1U_0402_16V7KDIS@ 1 2
C117 0.1U_0402_16V7KDIS@ 1 2
C86
12P_0402_50V8J
DIS@
1
2
L17 MBK1608121YZF_0603DIS@
1 2
L18 MBK1608121YZF_0603DIS@1 2
C78 0.1U_0402_16V7KDIS@ 1 2
C111 0.1U_0402_16V7KDIS@ 1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FB_VREF1
IFPC_AUX
FBA_D[0..63]
VGA_LVDS_A1VGA_LVDS_A1#
VGA_LVDS_A0
VGA_LVDS_A2#VGA_LVDS_A2
VGA_LVDS_A0#
VGA_LVDS_ACLK#VGA_LVDS_ACLK
ROM_SI
ROM_SO
ROM_SCLK
STRAP2
STRAP1
STRAP0
IFPC_AUXIFPC_AUX_N
SPDIF_IN
FBA_D62FBA_D63
FBA_D0FBA_D1FBA_D2FBA_D3FBA_D4FBA_D5FBA_D6FBA_D7FBA_D8FBA_D9FBA_D10FBA_D11FBA_D12FBA_D13FBA_D14FBA_D15FBA_D16FBA_D17FBA_D18FBA_D19FBA_D20FBA_D21FBA_D22FBA_D23FBA_D24FBA_D25FBA_D26FBA_D27FBA_D28FBA_D29FBA_D30FBA_D31FBA_D32FBA_D33FBA_D34FBA_D35FBA_D36FBA_D37FBA_D38FBA_D39FBA_D40FBA_D41FBA_D42FBA_D43FBA_D44FBA_D45FBA_D46FBA_D47FBA_D48FBA_D49FBA_D50FBA_D51FBA_D52FBA_D53FBA_D54FBA_D55FBA_D56FBA_D57FBA_D58FBA_D59FBA_D60FBA_D61
FBA_BA2
FBBA3
FBBA5
FBAA2
FBAA3
FBAA0
FBAWE#
FBBA2
FBAA1
FBAA11
FBAA10
FBAA8
FBAA9FBAA6
FBAA5
FBBACS0#
FBAA7
FBAA_CKE
FBACAS#
FBA_BA1
FBA_BA0
FBA_RSTFBAA12
FBBA4
FBARAS#
FBBA_CKE
FBAA[0..13]
FBBA[2..5]
FBADQS#2FBADQS#1
FBADQS#3FBADQS#4
FBADQS#6FBADQS#5
FBADQS#7
FBADQS#0
FBADQS2FBADQS1
FBADQS3FBADQS4
FBADQS6FBADQS5
FBADQS7
FBADQS0
FBADQM5FBADQM4
FBADQM0
FBADQM2FBADQM1
FBADQM3
FBADQM7FBADQM6
FBADQM[0..7]
FBADQS#[0..7]
FBADQS[0..7]
FBAA4
FBAACS0#
IFPC_AUX_N
FBAA13
FBBAODT0
FBAAODT0
VGA_LVDS_ACLK#
VGA_LVDS_ACLK
FBACLK0 <23>FBACLK0# <23>
FBACLK1 <23>FBACLK1# <23>
VGA_HDMI_SCL <24>
VGA_HDMI_SDA <24>
FBAD[0..63]<23>
VGA_LVDS_ACLK#<27>VGA_LVDS_ACLK<27>
VGA_LVDS_A0<27>
VGA_LVDS_A1<27>
VGA_LVDS_A2<27>
VGA_LVDS_A0#<27>
VGA_LVDS_A1#<27>
VGA_LVDS_A2#<27>
ROM_SO <22>
ROM_SCLK <22>
ROM_SI <22>
STRAP1 <22>
STRAP2 <22>
STRAP0 <22>
FBBA_CKE <23>
FBAWE# <23>
FBA_BA2 <23>
FBA_BA0 <23>
FBACAS# <23>
FBBACS0# <23>
FBAA_CKE <23>
FBA_RST <23>FBAA12 <23>
FBA_BA1 <23>
FBARAS# <23>
FBADQS#[0..7]<23>
FBADQS[0..7]<23>
FBADQM[0..7]<23>
FBAACS0# <23>FBAAODT0 <23>
FBBAODT0 <23>VGA_HDMI_TX2+<24>
VGA_HDMI_TX0+<24>
VGA_HDMI_TX2-<24>
VGA_HDMI_TX1-<24>VGA_HDMI_TX1+<24>
VGA_HDMI_CLK-<24>VGA_HDMI_CLK+<24>VGA_HDMI_TX0-<24>
+1.5VS
+3VS
+3VS
+3VS
+3VS
+1.5VS
FBAA[0..13]<23>
FBBA[2..5]<23>
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
N10M-GE1 LVDS,Memory Bus
B
20 51Thursday, October 29, 2009
2007/10/15 2008/10/15Compal Electronics, Inc.
LA-5752P
10mil1.27V~0.9V
5V PULL UP IN CONNECTER SIDE
HDMI
LVDS
C430.01U_0402_16V7K@
1
2
R39 1K_0402_1%DIS@1 2
Q38A
2N7002DW-T/R7_SOT363-6
DIS@
61
2
R44510K_0402_5%DIS@
12
R2310K_0402_5%DIS@
12
Q38B
2N7002DW-T/R7_SOT363-6
DIS@
3
5
4
R2210K_0402_5%DIS@
12
T2PAD
T3PAD
R531
4.7K_0402_5%DIS@
12
R40 1K_0402_1%@1 2
R301.3K_0402_1%@
12
R32 36K_0402_5%DIS@1 2
R1810K_0402_5%DIS@
12
R1510K_0402_5%DIS@
12
R291.3K_0402_1%@
12
T1PAD
R477 1K_0402_1%@1 2
R44 1K_0402_1%@1 2
C64912P_0402_50V8J
@ 1
2
R46810K_0402_5%DIS@
12
C650
12P_0402_50V8J
@1
2
ME
MO
RY
IN
TE
RF
AC
E
Part 2 of 5U22B
N11M-GE1-S-A2 _BGA533DIS@
FBA_D36T23
FBA_CMD0F26
FBA_CMD1J24
FBA_CMD2F25
FBA_CMD3M23
FBA_CMD4N27
FBA_CMD5M27
FBA_CMD6K26
FBA_CMD7J25
FBA_CMD8J27
FBA_CMD9G23
FBA_CMD10G26
FBA_CMD11J23
FBA_CMD12M25
FBA_CMD13K27
FBA_CMD14G25
FBA_CMD15L24
FBA_CMD16K23
FBA_CMD17K24
FBA_CMD18G22
FBA_CMD19K25
FBA_CMD20H22
FBA_CMD21M26
FBA_CMD22H24
FBA_CMD23F27
FBA_CMD24J26
FBA_CMD25G24
FBA_CMD26G27
FBA_CMD27M24
FBA_CMD28K22
FBA_DEBUGM22
FBA_CLK1N24
FBA_CLK1_NN23
FBA_CLK0F24
FBA_CLK0_NF23
FB_VREFA16
FBA_DQS_WP2E19
FBA_DQS_WP4T22
FBA_DQS_RN2E18
FBA_DQS_RN4R22
FBA_DQM2D19
FBA_DQM4T24
FBA_CMD29J22
FBA_CMD30L22
FBA_DQM1B19
FBA_DQM3D23
FBA_DQM0C26
FBA_DQM5AA23
FBA_DQM6AB27
FBA_DQM7T26
FBA_DQS_RN1A18
FBA_DQS_RN3B24
FBA_DQS_RN0D25
FBA_DQS_RN5Y24
FBA_DQS_RN6AA27
FBA_DQS_RN7R27
FBA_DQS_WP1A19
FBA_DQS_WP3A24
FBA_DQS_WP0C25
FBA_DQS_WP5AA24
FBA_DQS_WP6AA26
FBA_DQS_WP7T27
FBA_D63N26
FBA_D62N25
FBA_D60R26
FBA_D61T25
FBA_D59V27
FBA_D56V25
FBA_D57R25
FBA_D58V26
FBA_D55AD27
FBA_D44AA22
FBA_D51W25
FBA_D52AB25
FBA_D53AB26
FBA_D54AD26
FBA_D49W27
FBA_D50W26
FBA_D48AA25
FBA_D47V22
FBA_D46W22
FBA_D45W23
FBA_D40AC24
FBA_D41AB23
FBA_D42AB24
FBA_D43W24
FBA_D39P22
FBA_D38P24
FBA_D37R23
FBA_D32U24
FBA_D33V24
FBA_D34V23
FBA_D35R24
FBA_D31A26
FBA_D30B25
FBA_D29A25
FBA_D28C22
FBA_D0D22
FBA_D1E24
FBA_D2E22
FBA_D3D24
FBA_D4D26
FBA_D5D27
FBA_D6C27
FBA_D7B27
FBA_D8A21
FBA_D9B21
FBA_D10C21
FBA_D11C19
FBA_D12C18
FBA_D13D18
FBA_D14B18
FBA_D15C16
FBA_D16E21
FBA_D17F21
FBA_D18D20
FBA_D19F20
FBA_D20D17
FBA_D21F18
FBA_D22D16
FBA_D23E16
FBA_D24A22
FBA_D25C24
FBA_D26D21
FBA_D27B22
R1610K_0402_5%DIS@
12
R2610K_0402_5%DIS@
1 2
Part 3 of 5
NC
RF
U
LV
DS
/ T
MD
S
GE
NE
RA
LS
TR
AP
SE
RIA
L
U22C
N11M-GE1-S-A2 _BGA533DIS@
IFPA_TXCAC4
IFPA_TXC_NAD4
IFPA_TXD0V5
IFPA_TXD0_NV4
IFPA_TXD1AA5
IFPA_TXD1_NAA4
IFPA_TXD2W4
IFPA_TXD2_NY4
IFPA_TXD3AB4
IFPA_TXD3_NAB5
BUFRST_NN5
THERMDND8
ROM_SCLKC9
ROM_SIA10
ROM_SOC10
ROM_CS_NB10
STRAP0C7
IFPB_TXCAB3
IFPB_TXC_NAB2
IFPB_TXD4W1
IFPB_TXD4_NV1
IFPB_TXD5W3
IFPB_TXD5_NW2
IFPB_TXD6AA2
IFPB_TXD6_NAA3
IFPB_TXD7AB1
IFPB_TXD7_NAA1
IFPD_AUX_I2CX_SCLD3
IFPD_AUX_I2CX_SDA_ND4
IFPD_L0F5
IFPD_L0_NF4
IFPD_L1E4
IFPD_L1_ND5
IFPD_L2C3
IFPD_L2_NC4
IFPD_L3B3
IFPD_L3_NB4
IFPC_AUX_I2CW_SCLG4
IFPC_AUX_I2CW_SDA_NG5
IFPC_L0P4
IFPC_L0_NN4
IFPC_L1M5
IFPC_L1_NM4
IFPC_L2L4
IFPC_L2_NK4
IFPC_L3H4
IFPC_L3_NJ4
IFPE_AUX_I2CY_SCLF7
IFPE_AUX_I2CY_SDA_NG6
IFPE_L0D6
IFPE_L0_NC6
IFPE_L1A6
IFPE_L1_NA7
IFPE_L2B6
IFPE_L2_NB7
IFPE_L3E6
IFPE_L3_NE7
IFPE_RSETF8
IFPD_RSETM6
IFPC_RSETR5
IFPAB_RSETAB6
STRAP2A9
STRAP1B9
SPDIFF9
CECN2
NCC15
NCD15
NCJ5
RFU_1T6
RFU_2W6
RFU_3Y6
RFU_4AA6
RFU_5N3
THERMDPD9
R526
4.7K_0402_5%DIS@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+PEX_PLLVDD
+DACA_VDD
+PEX_SVDD_3V3
+1.05VS_PLL
+FB_PLLAVDD
+DACB_VDD
+FB_PLLAVDD
+IFPC_PLLVDD
+IFPAB_PLLVDD
+SP_PLLVDD
+SP_PLLVDD
+IFPAB_PLLVDD+DACA_VDD
+PEX_SVDD_3V3
+IFPB_IOVDD
+IFPC_IOVDD
+IFPC_PLLVDD
+IFPA_IOVDD
+VGASENSE+VGASENSE <45>
+VGA_CORE
+3VS
+3VS
+1.5VS
+3VS
+1.8VS
+3VS
+1.05VS
+1.05VS
+1.05VS
+1.05VS
+1.05VS
+1.5VS
+1.05VS
+1.05VS
+1.05VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
N10M-GE1 PWR
Custom
21 51Thursday, October 29, 2009
2007/10/15 2008/10/15Compal Electronics, Inc.
LA-5752P
N10M-GS: 15.8AN11M-GE1:16.7A
NEAR BALL
120mA
NEAR BALL
PLACE UNDER GPU
12~16mil
120mA
NEAR BGA
NEAR BGA
300mA
NEAR BGANEAR BALL
NEAR BGA
NEAR BALL
285mA
220mA
NEAR BGA
NEAR BALL
120mA
CLOSE TO GPU
NEAR BALL
NEAR BALL NEAR BGA
NEAR BGA2A
VID_PLLVDD=45mASP_PLLVDD=45mAPLLVDD=60mA
FB_PLLVDD=100mAFB_DLLVDD=100mA
220mA
NEAR BGA
NEAR BALL
NEAR BGA
120mA
NEAR BALL
NEAR BGA
NEAR BGA
NEAR BALL NEAR BGA
The power is base on VRAM type.
N10M-GS: 2.63AN11M-GE1:2.55A
C496
0.1U_0402_10V7K
DIS@
1
2
R465 40.2_0402_1%DIS@
C459
1U_0402_6.3V6K
DIS@
1
2
C499
1U_0402_6.3V6K
DIS@
1
2
R4710K_0402_5%@12
C24
4.7U 6.3V K X5R 0603
DIS@
1
2
C458
0.1U_0402_10V7K
DIS@
1
2
L4MBK1608121YZF_0603
DIS@1 2
C537
4.7U 6.3V K X5R 0603
DIS@
1
2
C32
0.047U_0402_25V7K
DIS@
1
2
C47
0.1U_0402_10V7K
DIS@
1
2
C512
4.7U 6.3V K X5R 0603
DIS@
1
2
C511
0.1U_0402_10V7K
DIS@
1
2
C49
1U_0402_6.3V6K
DIS@
1
2
C61
0.1U_0402_10V7K
DIS@
1
2
L6
MBK1608121YZF_0603
DIS@
1 2
R4110K_0402_5%DIS@
12
R4310K_0402_5%DIS@12
C26
4.7U 6.3V K X5R 0603
DIS@
1
2
C46
0.1U_0402_10V7K
DIS@
1
2
C65
1U_0402_6.3V6K
DIS@
1
2
C63
0.1U_0402_10V7K
DIS@
1
2
R49 0_0402_5%DIS@
1 2
C84
4.7U 6.3V K X5R 0603
DIS@
1
2
C523
470P_0402_50V7K
DIS@
1
2
C538
10U_0805_6.3V6M
DIS@
1
2
C60
0.1U_0402_10V7K
DIS@
1
2
C482
4.7U 6.3V K X5R 0603
DIS@
1
2
C481
0.1U_0402_10V7K
DIS@
1
2
C519
1U_0402_6.3V6K
DIS@
1
2
C42
0.047U_0402_25V7K
DIS@
1
2
C36
0.047U_0402_25V7K
DIS@
1
2
R45 10K_0402_5%DIS@1 2
C40
0.01U_0402_16V7K
DIS@
1
2
C488
4.7U 6.3V K X5R 0603
DIS@
1
2
C71
1U_0402_6.3V6K
DIS@
1
2
C54
0.1U_0402_10V7K
DIS@
1
2
C520
0.1U_0402_10V7K
DIS@
1
2
C62
0.1U_0402_10V7K
DIS@
1
2
C58
0.1U_0402_10V7K
DIS@
1
2
C524
4.7U 6.3V K X5R 0603
DIS@
1
2
C28
0.01U_0402_16V7K
DIS@
1
2
C41
0.047U_0402_25V7K
DIS@
1
2
C37
0.01U_0402_16V7K
DIS@
1
2
C82
4.7U 6.3V K X5R 0603
DIS@
1
2
C513
0.1U_0402_10V7K
DIS@
1
2
C31
0.047U_0402_25V7K
DIS@
1
2
C35
1U_0402_6.3V6K
DIS@
1
2
C30
1U_0402_6.3V6K
DIS@
1
2
C521
0.1U_0402_10V7K
DIS@
1
2
L24
MBK1608121YZF_0603DIS@
1 2
C50
0.1U_0402_10V7K
DIS@
1
2
Part 4 of 5
PO
WE
R
U22D
N11M-GE1-S-A2 _BGA533DIS@
VDDR13
VDDR14
VDDR15
VDDR16
VDDR17
VDDT9
VDDT11
VDDT17
VDDU9
VDDP11
VDDN19
VDDN17
VDDN16
VDDN15
VDDN14
VDDR12
VDDM11
VDDN12
VDDM9
VDDL9
VDDJ13
VDDJ12
VDDJ10
VDDJ9
VDDN13
VDDP12
VDDP13
VDDP14
VDDP15
VDDP16
VDDP17
VDDR9
VDDR11
VDDN11
VDDM17
VDDN9
VDDU19
VDDW9
VDDW13
VDDW18
VDDW19
FBVDDQA13
FBVDDQB13
FBVDDQC13
FBVDDQD13
FBVDDQD14
FBVDDQE13
FBVDDQF13
FBVDDQF14
FBVDDQF15
FBVDDQF16
VDDW12
VDDW10
FBVDDQF17
FBVDDQF19
FBVDDQF22
FBVDDQH23
FBVDDQH26
FBVDDQJ15
FBVDDQJ16
FBVDDQJ18
FBVDDQJ19
FBVDDQL19
FBVDDQL23
FBVDDQL26
FBVDDQM19
FBVDDQN22
FBVDDQU22
FBVDDQY22
PEX_IOVDDQAB7
PEX_IOVDDQAB8
PEX_IOVDDQAB9
PEX_IOVDDQAB13
PEX_IOVDDQAB16
PEX_IOVDDQAB17
PEX_IOVDDQAC7
PEX_IOVDDQAC13
PEX_IOVDDQAD6
PEX_IOVDDQAE6
PEX_IOVDDQAF6
PEX_IOVDDQAG6
PEX_IOVDDAG7
PEX_IOVDDAF7
PEX_IOVDDAE7
PEX_IOVDDAD8
PEX_IOVDDAD7
PEX_IOVDDAC9
PEX_PLLVDDAF9
VID_PLLVDDK6
SP_PLLVDDL6
PLLVDDK5
FB_PLLAVDDR19
VDD_SENSEW15
FB_CAL_PD_VDDQB15
DACB_VDDW5
DACA_VDDAG2
FB_PLLAVDDAC19
FB_DLLAVDDT19
VDD_SENSEE15
VDD33A12
VDD33B12
VDD33C12
VDD33D12
VDD33E12
VDD33F12
IFPE_PLLVDDD7
IFPD_PLLVDDN6
IFPC_PLLVDDP6
IFPAB_PLLVDDAD5
IFPDE_IOVDDH6
IFPC_IOVDDJ6
IFPB_IOVDDV2
IFPA_IOVDDV3
PEX_SVDD_3V3AG9
C23
4.7U 6.3V K X5R 0603
DIS@
1
2
C29
0.01U_0402_16V7K
DIS@
1
2
L1
MBK1608121YZF_0603DIS@
1 2
C44
0.1U_0402_10V7K
DIS@
1
2
C497
0.1U_0402_10V7K
DIS@
1
2
C64
1U_0402_6.3V6K
DIS@
1
2
L21
MBK1608121YZF_0603
DIS@
12
C57
4.7U 6.3V K X5R 0603
DIS@
1
2
C48
1U_0402_6.3V6K
DIS@
1
2
C38
0.047U_0402_25V7K
DIS@
1
2
C74
0.1U_0402_10V7K
DIS@
1
2
C39
0.01U_0402_16V7K
DIS@
1
2
C552
22U_0805_6.3V6M
DIS@
1
2
C480
0.1U_0402_10V7K
DIS@
1
2
L27MBK1608121YZF_0603
DIS@1 2
C27
0.01U_0402_16V7K
DIS@
1
2
C52
0.01U_0402_16V7K
DIS@
1
2
C53
0.01U_0402_16V7K
DIS@
1
2
C73
4.7U 6.3V K X5R 0603
DIS@
1
2
C83
1U_0402_6.3V6K
DIS@
1
2
L5
MBK1608121YZF_0603
DIS@
1 2
C51
0.01U_0402_16V7K
DIS@
1
2
L29
MBK1608121YZF_0603
DIS@12
C55
0.1U_0402_10V7K
DIS@
1
2
C66
0.1U_0402_10V7K
DIS@
1
2
C522
4700P_0402_25V7K
DIS@
1
2
C510
0.1U_0402_10V7K
DIS@
1
2
L3
MBK1608121YZF_0603
DIS@
1 2
C553
10U_0805_6.3V6M
DIS@
1
2
C59
0.1U_0402_10V7K
DIS@
1
2
C551
4.7U 6.3V K X5R 0603
DIS@
1
2
C45
1U_0402_6.3V6K
DIS@
1
2
C67
1U_0402_6.3V6K
DIS@
1
2
C68
4.7U 6.3V K X5R 0603
DIS@
1
2
C498
1U_0402_6.3V6K
DIS@
1
2
C72
1U_0402_6.3V6K
DIS@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
STRAP1STRAP2
ROM_SOROM_SIROM_SCLKSTRAP0
STRAP2<20>STRAP1<20>STRAP0<20>
ROM_SO<20>ROM_SI<20>
ROM_SCLK<20>
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
N10M-GE1 GND & STRAP
B
22 51Thursday, October 29, 2009
2007/10/15 2008/10/15Compal Electronics, Inc.
LA-5752P
A total of 8 signals are required for GB1 strapping this includes
2 reference signals
A total of 24 logical strapping bits are available
6 physical strapping pins
4 logical strapping bits
Place Components Close to BGA
DG-04642-001-V01(May 22, 2009)
Memory/PKG
40.2 ohm
FB_CAL_PU_GND FBCAL_PD_VDDQ
DDR3
FBCAL_TERM_GNDFBVDDQ
+1.5VS
Must be used 1% resister for driver calibration
40.2/60.4 ohm40.2 ohm
N11M-GE1 LP1
X76
STRAP1 use for 3GIO_PADCFG to set 35K pull up.(PUN-04335-001_V10 HW9 update)
K4W1G1646E-HC12
H5TQ1G63BFR-12C
PU 30KPD 10K
PU 35KN11M-GE1 LP1(0x0A7D)40nm
PD 15K
PD 15K
ROM_SO
PU 35K
ROM_SIROM_SCLK STRAP0STRAP1STRAP2GPU
Samsung800MHz(defaul)
PU 45K
FB Memory (DDR3)
PU 45KPD 10K PD 20K64Mx16
Hynix800MHz
PU 30K
PD 15K64Mx16
R466
10
K_
04
02
_5
%
DIS@
12
R46440.2K_0402_1%DIS@
12
R470
20
K_
04
02
_1
%
X76@
12
R472
34
.8K
_0
40
2_
1%
DIS@
12
R467
2K
_0
40
2_
5%
@
12
R476
10
K_
04
02
_5
%
@
12
GN
D
Part 5 of 5U22E
N11M-GE1-S-A2 _BGA533DIS@
GNDB2
GNDB5
GNDB8
GNDB11
GNDB14
GNDB17
GNDB20
GNDB23
GNDB26
GNDE2
GNDE5
GNDE8
GNDE11
GNDT14
GNDT15
GNDT16
GNDU2
GNDU5
GNDU11
GNDU12
GNDU13
GNDU14
GNDU15
GNDU16
GNDU17
GNDAF14
GNDAF17
GNDAF20
GNDAF23
GNDAF26
GNDU23
GNDU26
GNDV9
GNDV19
GNDW11
GNDW14
GNDW17
GNDY2
GNDY5
GNDY23
GNDY26
GNDAC2
GNDAC5
GNDAC6
GNDAC8
GNDAC11
GNDAC14
GNDAC17
GNDAC20
GNDAC23
GNDAC26
GNDAF2
GNDAF5
GNDAF8
GNDAF11
GNDE17
GNDE20
GNDE23
GNDE26
GNDH2
GNDH5
GNDJ11
GNDJ14
GNDJ17
GNDK9
GNDK19
GNDL2
GNDL5
GNDL11
GNDL12
GNDL13
GNDL14
GNDL15
GNDL16
GNDL17
GNDM12
GNDM13
GNDM14
GNDM15
GNDM16
GNDP2
GNDP5
GNDP9
GNDP19
GNDP23
GNDP26
GNDT12
GNDT13
GND_SENSEE14
GND_SENSEW16
FB_CAL_PU_GNDA15
FB_CAL_TERM_GNDB16
MULTI_STRAP_REF0_GNDF10
MULTI_STRAP_REF1_GNDF11
GNDF6
R475
30
K_
04
02
_1
%
DIS@
12
R471
34
.8K
_0
40
2_
1%
@
12
R473
45
.3K
_0
40
2_
1% DIS@
12
R27 60.4_0402_1%DIS@
1 2
R46340.2K_0402_1%DIS@
12
R469
2K
_0
40
2_
5%
@
12
R28 40.2_0402_1%DIS@1 2
R474
30
K_
04
02
_1
%@
12
R50
15
K_
04
02
_1
%
@
12
R51
15
K_
04
02
_1
%
DIS@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FBACLK1#FBACLK1
FBADQS#1
FBADQM1
FBADQS1
FBACLK1FBACLK1#FBACLK0#
FBACLK0
FBADQS#2
FBADQM2
FBADQS2
FBA_BA1
FBAA11
FBAA5FBAA4
FBACAS#F BAWE#
FBA_BA0
FBAA12
FBAA7
FBAA10
FBAA_CKE
FBAA0
FBAA9
FBAA6
FBAA2
FBAA8
FBAA3
FBAA1
FBAA13
FBA_BA2
FBAACS0#FBARAS#
FBA_RST
FBAAODT0
FBA_RST
FBAA0
FBAA12FBAA13
FBAACS0#
FBAA2
FBAA5
F BAWE#
FBAA3
FBAAODT0
FBAA9
FBAA7
FBACAS#FBARAS#
FBAA4
FBAA_CKE
FBA_BA0
FBAA1
FBA_BA2
FBAA6
FBA_BA1
FBAA11FBAA10
FBAA8
FBARAS#
FBA_BA1
FBBA2
FBBA4FBBA3
FBBACS0#
FBAA11
FBACAS#F BAWE#
FBA_BA0
FBBA5
FBAA12
FBA_RST
FBAA7
FBAA10
FBAA0
FBAA9
FBAA6
FBAA8
FBAA1
FBAA13
FBA_BA2
FBBAODT0
FBA_BA0
FBBAODT0
FBAA9
FBBACS0#
FBAA8
FBBA2
FBAA13
FBAA10
FBARAS#
FBBA5FBAA6
FBA_RST
FBAA11
FBBA4
F BAWE#
FBA_BA2
FBAA0
FBA_BA1
FBAA12
FBAA1
FBAA7
FBACAS#
FBBA3
FBBA_CKEFBBA_CKE
FBACLK1#
FBACLK1
FBACLK0#
FBACLK0
FBADQS6
FBADQM6
FBADQS#6
FBADQM[0..7]
FBADQS#[0. .7]
FBADQS[0. .7]
FBA_D[0..63]
FBAA[0. .13]
FBBA[2. .5]
FBA_D23
FBA_D21
FBA_D20
FBA_D18
FBA_D19
FBA_D17
FBA_D22FBA_D16
FBADQS5
FBADQM5
FBADQS#5
FBA_D24FBA_D29
FBA_D27
FBA_D28
FBA_D26
FBA_D25
FBA_D31
FBA_D30
FBADQS3
FBADQM3
FBADQS#3
FBADQS0
FBADQS#0
FBADQM0
FBA_D0FBA_D7
FBA_D5
FBA_D6
FBA_D1FBA_D4
FBA_D3
FBA_D2FBA_D58
FBA_D60
FBA_D56
FBA_D59
FBA_D62
FBA_D63
FBA_D57FBA_D61
FBA_D39
FBA_D35
FBA_D38
FBA_D37
FBADQM7
FBADQS#7
FBADQS7FBADQS4
FBADQM4
FBADQS#4
FBA_D48
FBA_D50
FBA_D55
FBA_D54
FBA_D52
FBA_D53
FBA_D51
FBA_D49
FBA_D8
FBA_D9
FBA_D13FBA_D11
FBA_D10
FBA_D15
FBA_D12
FBA_D14
FBA_D41
FBA_D40
FBA_D42
FBA_D44FBA_D43
FBA_D45
FBA_D46
FBA_D47FBA_D34
FBA_D33
FBA_D36
FBA_D32
FBACLK0#<20> FBACLK1#<20>FBACLK1<20>FBACLK0<20>
FBAD[0..63]<20>
FBADQS#[0..7]<20>
FBADQS[0..7]<20>
FBADQM[0..7]<20>
F BARAS#<20>
FBA_BA0<20>FBA_BA1<20>FBA_BA2<20>
FBAA_CKE<20>FBBA_CKE<20>
FBA_RST<20>
FBAAODT0<20> FBBAODT0<20>FBAACS0#<20> FBBACS0#<20>
F BACAS#<20>FB AWE#<20>
+1.5VS
+1.5VS
+1.5VS
+1.5VS
+1.5VS
+1.5VS
+1.5VS
+1.5VS
+1.5VS
+1.5VS
+1.5VS
+1.5VS
+1.5VS
+1.5VS
+1.5VS +1.5VS
+VRAM_VREFA +VRAM_VREFB
+VRAM_VREFC +VRAM_VREFD
+VRAM_VREFA
+VRAM_VREFB
+VRAM_VREFA
+VRAM_VREFB
+VRAM_VREFC
+VRAM_VREFD
+VRAM_VREFC
+VRAM_VREFD
FBAA[0..13]<20>
FBBA[2..5]<20>
Title
Size Document Number R e v
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
VRAM DDR3
C
23 51Thursday, October 29, 2009
2007/10/15 2008/10/15Compal Electronics, Inc.
LA-5752P
N10x 40nm DDR3 MAPPING
NVIDIA COCUMENT FOR DA-3978-001
12MIL 12MIL
12MIL 12MIL
3
2
7 6
4 5
0
1
C518
10U_0603_6.3V6M
D IS@
1
2
R523
240_0402_1%
D IS@
12
C1
01U_0402_6.3V4Z
D IS@
1
2
100-BALLSDRAM DDR3
U1
K4B1G1646D-HCF8_FBGA100X76@
WEL4
RASJ4
CASK4
CSL3
CKE/CKE0K10
CKJ8
CKK8
DQSUB8
BA0M3
BA1N9
A2P4
A3N3
A4P9
A5P3
A6R9
A7R3
A8T9
A9R4
A10/APL8
A11R8
DQL0E4
DQL1F8
DQL2F3
DQL3F9
DQL4H4
DQL5H9
DQL6G3
DQL7H8
VSSQD2
VSSA10
VSSE2
VSSB4
NC/ODT1J2
VDDB3
VDDD10
VDDQA2
VDDQA9
VDDQC2
VDDQC10
NC/CS1L2
NC/CE1J10
VDDQE10
ZQ/ZQ0L9
RESETT3
DQSLF4
DMUD4
DMLE8
VSSQB2
VSSQB10
VSSQD9
VSSQE3
DQSUC8
VSSQE9
DQSLG4
VDDQF2
VSSQF10
VSSQG2
VDDQH3
VDDQH10
VSSQG10
VREFCAM9
VSSG9
VDDG8
ODT/ODT0K2
A0N4
A1P8
VDDK3
A12N8
VSSJ3
VDDK9
DQU1C4
DQU2C9
DQU3C3
DQU4A8
DQU5A3
DQU6B9
DQU7A4
DQU0D8
A13T4
A14T8
A15/BA3M8
BA2M4
VREFDQH2
NCZQ1L10
VDDN2
VDDN10
VDDR2
VDDR10
VSSJ9
VSSM2
VSSM10
VSSP2
VSSP10
VSST2
VSST10
VDDQD3
NCA1
NCA11
NCT1
NCT11
C4
46
1U_0402_6.3V4Z
D IS@
1
2
C4
95
0.1
U_
04
02
_1
0V
6K
D IS@
1
2
+
C4
36
22
0U
_B
2_
2.5
VM
_R
35
1
2
R 21
240_0402_1%
D IS@
12
C1
6
1U_0402_6.3V4Z
D IS@
1
2
C5
26
1U_0402_6.3V4Z
D IS@
1
2
100-BALLSDRAM DDR3
U 23
K4B1G1646D-HCF8_FBGA100
X76@
WEL4
RASJ4
CASK4
CSL3
CKE/CKE0K10
CKJ8
CKK8
DQSUB8
BA0M3
BA1N9
A2P4
A3N3
A4P9
A5P3
A6R9
A7R3
A8T9
A9R4
A10/APL8
A11R8
DQL0E4
DQL1F8
DQL2F3
DQL3F9
DQL4H4
DQL5H9
DQL6G3
DQL7H8
VSSQD2
VSSA10
VSSE2
VSSB4
NC/ODT1J2
VDDB3
VDDD10
VDDQA2
VDDQA9
VDDQC2
VDDQC10
NC/CS1L2
NC/CE1J10
VDDQE10
ZQ/ZQ0L9
RESETT3
DQSLF4
DMUD4
DMLE8
VSSQB2
VSSQB10
VSSQD9
VSSQE3
DQSUC8
VSSQE9
DQSLG4
VDDQF2
VSSQF10
VSSQG2
VDDQH3
VDDQH10
VSSQG10
VREFCAM9
VSSG9
VDDG8
ODT/ODT0K2
A0N4
A1P8
VDDK3
A12N8
VSSJ3
VDDK9
DQU1C4
DQU2C9
DQU3C3
DQU4A8
DQU5A3
DQU6B9
DQU7A4
DQU0D8
A13T4
A14T8
A15/BA3M8
BA2M4
VREFDQH2
NCZQ1L10
VDDN2
VDDN10
VDDR2
VDDR10
VSSJ9
VSSM2
VSSM10
VSSP2
VSSP10
VSST2
VSST10
VDDQD3
NCA1
NCA11
NCT1
NCT11
C4
37
1U_0402_6.3V4Z
D IS@
1
2
C1
9
1U_0402_6.3V4Z
D IS@
1
2
C4
79
1U_0402_6.3V4Z
D IS@
1
2
100-BALLSDRAM DDR3
U 21
K4B1G1646D-HCF8_FBGA100X76@
WEL4
RASJ4
CASK4
CSL3
CKE/CKE0K10
CKJ8
CKK8
DQSUB8
BA0M3
BA1N9
A2P4
A3N3
A4P9
A5P3
A6R9
A7R3
A8T9
A9R4
A10/APL8
A11R8
DQL0E4
DQL1F8
DQL2F3
DQL3F9
DQL4H4
DQL5H9
DQL6G3
DQL7H8
VSSQD2
VSSA10
VSSE2
VSSB4
NC/ODT1J2
VDDB3
VDDD10
VDDQA2
VDDQA9
VDDQC2
VDDQC10
NC/CS1L2
NC/CE1J10
VDDQE10
ZQ/ZQ0L9
RESETT3
DQSLF4
DMUD4
DMLE8
VSSQB2
VSSQB10
VSSQD9
VSSQE3
DQSUC8
VSSQE9
DQSLG4
VDDQF2
VSSQF10
VSSQG2
VDDQH3
VDDQH10
VSSQG10
VREFCAM9
VSSG9
VDDG8
ODT/ODT0K2
A0N4
A1P8
VDDK3
A12N8
VSSJ3
VDDK9
DQU1C4
DQU2C9
DQU3C3
DQU4A8
DQU5A3
DQU6B9
DQU7A4
DQU0D8
A13T4
A14T8
A15/BA3M8
BA2M4
VREFDQH2
NCZQ1L10
VDDN2
VDDN10
VDDR2
VDDR10
VSSJ9
VSSM2
VSSM10
VSSP2
VSSP10
VSST2
VSST10
VDDQD3
NCA1
NCA11
NCT1
NCT11
R91.33K_0402_1%
D IS@
12
C5
09
1U_0402_6.3V4Z
D IS@
1
2
R5291.33K_0402_1%
D IS@
12
C4
38
1U_0402_6.3V4Z
D IS@
1
2
C7
10U_0603_6.3V6M
D IS@
1
2
C9
1U_0402_6.3V4Z
D IS@
1
2
C4
87
1U_0402_6.3V4Z
D IS@
1
2
C1
7
1U_0402_6.3V4Z
D IS@
1
2
100-BALLSDRAM DDR3
U2
K4B1G1646D-HCF8_FBGA100X76@
WEL4
RASJ4
CASK4
CSL3
CKE/CKE0K10
CKJ8
CKK8
DQSUB8
BA0M3
BA1N9
A2P4
A3N3
A4P9
A5P3
A6R9
A7R3
A8T9
A9R4
A10/APL8
A11R8
DQL0E4
DQL1F8
DQL2F3
DQL3F9
DQL4H4
DQL5H9
DQL6G3
DQL7H8
VSSQD2
VSSA10
VSSE2
VSSB4
NC/ODT1J2
VDDB3
VDDD10
VDDQA2
VDDQA9
VDDQC2
VDDQC10
NC/CS1L2
NC/CE1J10
VDDQE10
ZQ/ZQ0L9
RESETT3
DQSLF4
DMUD4
DMLE8
VSSQB2
VSSQB10
VSSQD9
VSSQE3
DQSUC8
VSSQE9
DQSLG4
VDDQF2
VSSQF10
VSSQG2
VDDQH3
VDDQH10
VSSQG10
VREFCAM9
VSSG9
VDDG8
ODT/ODT0K2
A0N4
A1P8
VDDK3
A12N8
VSSJ3
VDDK9
DQU1C4
DQU2C9
DQU3C3
DQU4A8
DQU5A3
DQU6B9
DQU7A4
DQU0D8
A13T4
A14T8
A15/BA3M8
BA2M4
VREFDQH2
NCZQ1L10
VDDN2
VDDN10
VDDR2
VDDR10
VSSJ9
VSSM2
VSSM10
VSSP2
VSSP10
VSST2
VSST10
VDDQD3
NCA1
NCA11
NCT1
NCT11
R5221.33K_0402_1%
D IS@
12
C2
2
0.1
U_
04
02
_1
0V
6K
D IS@
1
2
C1
8
1U_0402_6.3V4Z
D IS@
1
2
R 111.33K_0402_1%
D IS@
12
R 191.33K_0402_1%
D IS@
12
C1
1
1U_0402_6.3V4Z
D IS@
1
2
C8 0
.1U
_0
40
2_
10
V6
K
D IS@
1
2
R 12
240_0402_1%
D IS@
12
R81.33K_0402_1%
D IS@
12
C444
10U_0603_6.3V6M
D IS@
1
2
R 101.33K_0402_1%
D IS@
12
C5
1U_0402_6.3V4Z
D IS@
1
2
R7
240_0402_1%
D IS@
12
C1
2
1U_0402_6.3V4Z
D IS@
1
2
C6
10U_0603_6.3V6M
D IS@
1
2
C4 0
.1U
_0
40
2_
10
V6
K
D IS@
1
2
C4
45
1U_0402_6.3V4Z
D IS@
1
2
C 21
10U_0603_6.3V6M
D IS@
1
2
C3
10U_0603_6.3V6M
D IS@
1
2
C5
17
1U_0402_6.3V4Z
D IS@
1
2
C2
0
1U_0402_6.3V4Z
D IS@
1
2
R 14243_0402_1%D IS@
12
R 442243_0402_1%D IS@
12
C5
25
1U_0402_6.3V4Z
D IS@
1
2
R 201.33K_0402_1%
D IS@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HDMI_TX1+_CK
HDMI_TX2-_CK
HDMI_TX1-_CK
HDMI_CLK-_CK
HDMI_TX2+_CK
HDMI_TX0+_CKHDMI_TX0-_CK
HDMI_CLK+_CK
HDMI_DETECT_VGA
HDMI_TX1+_CK
HDMI_TX2-_CK
HDMI_TX1-_CK
HDMI_CLK-_CK
HDMI_TX2+_CK
HDMI_TX0+_CKHDMI_TX0-_CK
HDMI_CLK+_CK
HDMIDAT_RHDMICLK_R
+5VS_HDMI
HDMI_TX0+_CONN
HDMI_TX1-_CONN
HDMI_TX2+_CONN
HDMI_TX1+_CONN
HDMI_CLK-_CONN
HDMI_CLK+_CONN
HDMI_TX2-_CONN
HDMI_TX0-_CONN
HDMI_TX1-_CONN
HDMI_TX1+_CONN
HDMI_TX0+_CONN
HDMI_TX0-_CONN
HDMI_CLK+_CONN
HDMI_TX2-_CONN
HDMI_CLK-_CONN
HDMI_TX2+_CONN
HDMI_TX1+_CK
HDMI_TX2-_CK
HDMI_TX1-_CK
HDMI_CLK-_CK
HDMI_TX2+_CK
HDMI_TX0+_CK
HDMI_TX0-_CK
HDMI_CLK+_CK
HDMI_TX1-_CONNHDMI_TX2+_CONN
HDMI_TX0+_CONNHDMI_TX0-_CONN
HDMI_CLK+_CONN
HDMI_TX1+_CONN
HDMI_TX2-_CONN
HDMI_CLK-_CONN
HDMI_TX1+_CK
HDMI_TX2-_CK
HDMI_TX1-_CK
HDMI_CLK-_CK
HDMI_TX2+_CK
HDMI_TX0+_CKHDMI_TX0-_CK
HDMI_CLK+_CK
HDMICLK_R
HDMIDAT_R
HDMIDAT_R
HDMICLK_R
HDMI_CLK-_CONN
HDMI_CLK+_CONNHDMI_TX0-_CONN
HDMI_TX0+_CONNHDMI_TX1-_CONN
HDMI_TX1+_CONNHDMI_TX2-_CONN
HDMI_TX2+_CONN
HDMI_DET_UMA
HDMI_DETECT_VGA<19>
VGA_HDMI_SCL<20>VGA_HDMI_SDA<20>
HDMICLK_R<25>HDMIDAT_R<25>
VGA_HDMI_TX0-<20>VGA_HDMI_TX0+<20>
VGA_HDMI_TX1-<20>
VGA_HDMI_CLK-<20>
VGA_HDMI_TX1+<20>
VGA_HDMI_TX2-<20>VGA_HDMI_TX2+<20>
VGA_HDMI_CLK+<20>
HDMI_TX1+_CK<25>HDMI_TX1-_CK<25>HDMI_TX2+_CK<25>HDMI_TX2-_CK<25>
HDMI_CLK+_CK<25>HDMI_CLK-_CK<25>HDMI_TX0+_CK<25>HDMI_TX0-_CK<25>
HDMI_DET_UMA<25>
+3VS
+5VS
+5VS
+5VS +5VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
HDMI CONN
Custom
24 51Thursday, October 29, 2009
2008/03/25 2008/04/Compal Electronics,Ltd.
LA-5752P
NEAR CONNECT
C599 0.1U_0402_16V7KDIS@1 2
R595 499_0402_1%DIS@1 2
C281 0.1U_0402_16V7KDIS@1 2
D28RB491D_SC59-3
HDMI@
21
R2572.2K_0402_5%HDMI@1
2
R5810_0805_5%
@R591 499_0402_1%DIS@1 2
C284 0.1U_0402_16V7KDIS@1 2
R587 499_0402_1%DIS@1 2
C6270.1U_0402_16V4Z
HDMI@
1
2
R584 0_0402_5%HDMI@1 2
C302
12P_0402_50V8J
DIS@
1
2
L16 MBK1608121YZF_0603DIS@1 2
L35
WCM-2012-900T_4P
@
11
44 3 3
2 2
L36
WCM-2012-900T_4P
@
11
44 3 3
2 2
R590 0_0402_5%HDMI@1 2
R588 0_0402_5%HDMI@1 2
R57910K_0402_1%
DIS@1 2
D23BAT54S-7-F_SOT23-3
@
23
1
C282 0.1U_0402_16V7KDIS@1 2
D25BAT54S-7-F_SOT23-3
@2
3
1
R582 0_0402_5%HDMI@1 2
C601 0.1U_0402_16V7KDIS@1 2
R594 0_0402_5%HDMI@1 2
R2492.2K_0402_5%
HDMI@ 12
R589 499_0402_1%DIS@1 2
R597 499_0402_1%DIS@1 2
C600 0.1U_0402_16V7KDIS@1 2
D24BAT54S-7-F_SOT23-3
@2
3
1
L15 MBK1608121YZF_0603DIS@
1 2
R592 0_0402_5%HDMI@1 2
D22RB751V_SOD323
@
21
JHDMI1
TAITW_PDVBR9-19FLBS4NN4N1
ME@
D2+1D2_shield2D2-3D1+4D1_shield5D1-6D0+7D0_shield8D0-9CK+10CK_shield11CK-12CEC13Reserved14SCL15SDA16DDC/CEC_GND17+5V18HP_DET19
GND 20
GND 21
GND 22
GND 23
C295
12P_0402_50V8J
DIS@
1
2
R585 499_0402_1%DIS@1 2
R583 499_0402_1%DIS@1 2
G
D
SQ412N7002W-T/R7_SOT323-3
DIS@
2
13
L33
WCM-2012-900T_4P
@
11
44 3 3
2 2
R593 499_0402_1%DIS@1 2
R578100K_0402_5%DIS@
12
L34
WCM-2012-900T_4P
@
11
44 3 3
2 2
C283 0.1U_0402_16V7KDIS@1 2
R596 0_0402_5%HDMI@1 2
C614 0.1U_0402_16V7KDIS@1 2
R586 0_0402_5%HDMI@1 2
C603330P_0402_50V7K
DIS@L30MBK1608121YZF_0603
DIS@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HDMI_CLK+_CK
HDMI_TX2-_CK
TMDS_B_HPD#
HDMI_TX2+_CK
HDMI_DET_UMA
HDMI_CLK-_CK
HDMI_TX0+_CK
HDMIDAT_R
HDMICLK_R
HDMI_TX1+_CK
HDMI_TX0-_CK
HDMI_TX1-_CK
TMDS_B_HPD#
TMDS_B_DATA2<15>TMDS_B_DATA2#<15>
TMDS_B_CLK<15>TMDS_B_CLK#<15>
TMDS_B_HPD# <15>
TMDS_B_DATA1<15>TMDS_B_DATA1#<15>
TMDS_B_DATA0<15>TMDS_B_DATA0#<15>
HDMICLK_R<24>
HDMIDAT_R<24>
HDMI_DET_UMA<24>
HDMICLK_NB <15>
HDMIDAT_NB <15>
HDMI_CLK+_CK <24>HDMI_CLK-_CK <24>
HDMI_TX0+_CK <24>HDMI_TX0-_CK <24>
HDMI_TX1+_CK <24>HDMI_TX1-_CK <24>
HDMI_TX2+_CK <24>HDMI_TX2-_CK <24>
+3VS
+3VS
+3VS
+3VS+3VS
+3VS
+3VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
Level Shiftter_ASM1442
Custom
25 51Thursday, October 29, 2009
2008/03/25 2008/04/Compal Electronics,Ltd.
LA-5752P
P/N:SA00001U900 (CH7318A)P/N:SA00002D700 (8101T)
internal pull down
internal pull down
FOR 7318C PIN6 PULL DOWN 1.2Kohm
PIN7 PULL DOWN 7.5Kohm
PIN7 PULL UP 20Kohm
input
output
R428 STUFF
RESERVE THE R668 PULL UP TO 3VS
FOR asmedia
RESERVE THE R670 PULL DOWN TO GND
CHANGE R483 FROM 499 TO 3.4K OHM
P/N:SA00003GT00 (ASM1442)
R25320K_0402_1%@
12
R232 4.7K_0402_5%@1 2
U12
ASM1442_QFN48_7X7UMA_HDMI@
VCC 2
REXT 6
HPD# 7
SDA 8
SCL 9
RT_EN# 10
GND 12GND 5GND 1
GND 18
GND 24
GND 27
GND 31
GND 36
GND 37
GND 43
VCC 11
VCC 15
VCC 21
VCC 26
VCC 33
VCC 40
VCC 46
PC1 4
PC0 3
OUT_D4+ 13
OUT_D4- 14
OUT_D3+ 16
OUT_D3- 17
OUT_D2+ 19
IN_D4+48
IN_D4-47
IN_D3+45
IN_D3-44
IN_D2+42
IN_D2-41
IN_D1-38
OE#25
SCL_SINK28
SDA_SINK29
HPD_SINK30
DDC_EN32
OUT_D2- 20
OUT_D1+ 22
OUT_D1- 23IN_D1+39
CFG034
CFG135
PAD 49
R2554.7K_0402_5%
@1 2
R245 3.4K_0402_1%UMA_HDMI@1 2
R2544.7K_0402_5%
@1 2R2430_0402_5%
@
12
R2300_0402_5%
UMA_HDMI@
12
C6020.1U_0402_16V4Z
UMA_HDMI@1
2
R248 4.7K_0402_5%@1 2
R2474.7K_0402_5%
@1 2
C28510U_0805_10V4Z
UMA_HDMI@1
2
R2527.5K_0402_1%@
12
R244
4.7K_0402_5%
@
12
R246 4.7K_0402_5%@1 2
C6040.1U_0402_16V4Z
UMA_HDMI@1
2
C2800.1U_0402_16V4Z
UMA_HDMI@1
2R242
4.7K_0402_5%
UMA_HDMI@
12
R2310_0402_5%
@1
2
R256
4.7K_0402_5%
@1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
CRT_R
CRT_G
CRT_BDAC_BLU
DAC_RED
DAC_GRN
CRT_R
CRT_R
CRT_G
CRT_BVGA_CRT_B
VGA_CRT_R
VGA_CRT_G
CRT_G
CRT_B
R EDGREENBLUE
CRT_DDC_DAT_CONN
CRT_DDC_DAT_CONN
CRT_DDC_CLK_CONN
R ED
CRT_DDC_DATA
CRT_DDC_CLK
CRT_HSYNC_1
GREEN
JVGA_HS
BLUE
VSYNC_G
JVGA_VSJVGA_HS
CRT_DDC_CLK_CONN
HS YNC_G
CRT_VSYNC_1 JVGA_VS
R ED
GREEN
JVGA_HS
JVGA_VS
BLUE
VGA_DDCDATA
VGA_DDCCLK
CRT_DDC_DATA_R
CRT_DDC_CLK_R
VGA_HSYNC<19>
CRT_HSYNC<15>
CRT_DDC_DATA<15>
CRT_DDC_CLK<15>
VGA_VSYNC<19>
CRT_VSYNC<15>
VGA_DDCDATA<19>
VGA_DDCCLK<19>
DAC_RED<15>
DAC_GRN<15>
DAC_BLU<15>
VGA_CRT_R<19>
VGA_CRT_G<19>
VGA_CRT_B<19>
+3VS
+5VS +5VS +5VS +5VS +5VS
+5VS
+CRT_VCC
+CRT_VCC
+CRT_VCC
+CRT_VCC
+3VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
CRT ConnectorCustom
26 51Thursday, October 29, 2009
2007/10/15 2008/10/15Compal Electronics, Inc.
LA-5752P
UMA only
DIS only
CLOSE TO CONN
CRT Connector
W=40mils
C619
0.1U_0402_16V4Z
1
2
C145
10P_0402_50V8J
1
2
R93 0_0402_5%UMA@1 2
R153150_0402_1%
12
R91 0_0402_5%UMA@1 2
L10
FCM1608CF-121T03 0603
1 2
R71 0_0402_5%DIS@ 12
L9
FCM1608CF-121T03 0603
1 2
R575
1K_0402_5%
1 2
D21
RB491D_SC59-3
2 1
C146
10P_0402_50V8J
1
2
C620
0.1U_0402_16V4Z
1
2
L31 FCM1608CF-121T03 06031 2
U25SN74AHCT1G125DCKR_SC70-5
A2 Y 4OE
#1
G3
P5
C157
10P_0402_50V8J
1
2
R66 0_0402_5%DIS@1 2
R67 0_0402_5%DIS@1 2
R94 0_0402_5%UMA@
1 2
R70 0_0402_5%DIS@ 12
C62510P_0402_50V8J@
1
2
U26SN74AHCT1G125DCKR_SC70-5
A2 Y 4OE
#1
G3
P5
Q13B2N7002DW-T/R7_SOT363-6
3
5
4
R65 0_0402_5%DIS@1 2
G
G
JCRT1
TYCO_1775763-1
ME@
61117
1228
1339
144
10155
1617
C178100P_0402_50V8J
@1
2
R580
1K_0402_5%
1 2
D3
BAT54S-7-F_SOT23-3@
2
3
1
R97 0_0402_5%UMA@ 12
Q13A2N7002DW-T/R7_SOT363-6
61
2
C13710P_0402_50V8J
1
2
R68 0_0402_5%DIS@
1 2
L11
FCM1608CF-121T03 0603
1 2
R1582.2K_0402_5%
12
R1572.2K_0402_5%
12
C17768P_0402_50V8K
@1
2
R1592.2K_0402_5%
12
C629
0.1U_0402_16V4Z
1
2
R92 0_0402_5%UMA@1 2
D27BAT54S-7-F_SOT23-3
@2
3
1
L32 FCM1608CF-121T03 06031 2
D1BAT54S-7-F_SOT23-3
@2
3
1
R131150_0402_1%
12
R69 0_0402_5%DIS@
1 2
D2BAT54S-7-F_SOT23-3
@2
3
1
R90150_0402_1%
12
C628
100P_0402_50V8J<BOM Structure>
1
2
D26BAT54S-7-F_SOT23-3
@2
3
1
R95 0_0402_5%UMA@
1 2
F1
1.1A_6V_SMD1812P110TF
21
R96 0_0402_5%UMA@ 12
R1622.2K_0402_5%
12
C62610P_0402_50V8J
@1
2
C13610P_0402_50V8J
1
2
C158
10P_0402_50V8J
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BKOFF#
DAC_BRIG
LCD_ENVDD
DISPOFF#
EDID_CLKEDID_DATA CONN_LVDS_SDA
CONN_LVDS_SCL
CONN_LVDS_A1CONN_LVDS_A1#
CONN_LVDS_ACLK#CONN_LVDS_ACLK
CONN_LVDS_A0CONN_LVDS_A0#
CONN_LVDS_A2#CONN_LVDS_A2
LVDS_A2#LVDS_A2
LVDS_A1#LVDS_A1
LVDS_A0LVDS_A0#
INVPWM
INVPWM
CMOS1
CONN_LVDS_SDACONN_LVDS_SCL
VGA_LVDS_SDAVGA_LVDS_SCL
VGA_LVDS_A1VGA_LVDS_A1#
VGA_LVDS_ACLK#VGA_LVDS_ACLK
VGA_LVDS_A0VGA_LVDS_A0#
VGA_LVDS_A2#VGA_LVDS_A2
CONN_LVDS_A1CONN_LVDS_A1#
CONN_LVDS_ACLK#CONN_LVDS_ACLK
CONN_LVDS_A0CONN_LVDS_A0#
CONN_LVDS_A2#CONN_LVDS_A2
INVPWM
DISPOFF#
CONN_LVDS_A1
CONN_LVDS_A2#
CONN_LVDS_A1#
CONN_LVDS_A2
CONN_LVDS_ACLK#CONN_LVDS_ACLK
CONN_LVDS_A0CONN_LVDS_A0#
CONN_LVDS_SCL
USB20_N2USB20_P2
DISPOFF#INVPWM
CONN_LVDS_SDA
LVDS_ACLKLVDS_ACLK#
PCH_PWM_R
BKOFF#<34>
PCH_PWM<15>
CMOS_OFF#<34>
USB20_N2 <16>USB20_P2 <16>
INVT_PWM<34>
DAC_BRIG<34>
LCD_COLOR_1
VGA_LVDS_SCL<19>VGA_LVDS_SDA<19>
EDID_CLK<15>EDID_DATA<15>
VGA_LVDS_A0<20>VGA_LVDS_A0#<20>
VGA_LVDS_A1<20>VGA_LVDS_A1#<20>
VGA_LVDS_A2<20>VGA_LVDS_A2#<20>
VGA_LVDS_ACLK<20>VGA_LVDS_ACLK#<20>
LVDS_A2<15>LVDS_A2#<15>
LVDS_A1<15>LVDS_A1#<15>
LVDS_A0<15>LVDS_A0#<15>
LVDS_ACLK#<15>LVDS_ACLK<15>
PCH_ENBKL<15>
VGA_ENBKL_R<19> ENBKL <34>
VGA_ENVDD_R<19>
PCH_ENVDD<15>
+3VS
+3VS
+LCDVDD +5VALW
+LCDVDD_CONN+LCDVDD
+3VS
+3VS
+5VS
+LEDVDD B+
+LCDVDD_CONN
+3VS
+CMOS_PW
+3VS
+CMOS_PW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
LVDS/CAMERA
B
27 51Thursday, October 29, 2009
2007/10/15 2008/10/15Compal Electronics, Inc.
LA-5752P
LCD POWER CIRCUIT
DTC124EK
W=60mils
W=60mils
For EMI
For GMCH DPST
CMOS
CMOS Camera
(60 MIL)
R3830_0402_5% UMA@ 12
R850_0402_5% DIS@ 12
C13
47
0P
_0
40
2_
50
V7
K
@1
2
R3840_0402_5% UMA@ 12
R1500_0402_5% DIS@ 12
R549 0_0805_5%1 2
R3850_0402_5% UMA@ 12
R3870_0402_5% UMA@ 12
R259100K_0402_1%
12
C34
0.1U_0402_16V4Z
1
2
C33710U_0805_10V4Z
CMOS@
1
2
C25
0.1U_0402_16V4Z
1
2
R261 0_0402_5%DIS@
1 2
C14
680P_0402_50V7K@
1
2
R31100K_0402_5%
12
R3820_0402_5% UMA@ 12
R1610_0402_5%
UMA@
1 2
U6
NC7SZ14P5X_NL_SC70-5
UMA@
A2
Y4
P5
NC
1
G3
R36 0_0402_5%DIS@
12
R1600_0402_5%
@
1 2
C296
47
0P
_0
40
2_
50
V7
K
@1
2
C33
4.7U_0805_10V4Z
1
2
R3890_0402_5% UMA@ 12
C3260.01U_0402_16V7K
CMOS@
1 2
C5394.7U_0805_10V4Z
1
2
R550 0_0805_5%1 2
Q21DTC124EKAT146_SC59-3
CMOS@
IN2
OU
T1
GN
D3
C5664.7U_0805_25V6-K
1
2
R27010K_0402_5%
CMOS@
12
C567680P_0402_50V7K
@
1
2
R1260_0402_5% DIS@ 12
R3930_0402_5% UMA@ 12
G
DS
Q12
2N7002_SOT23
@
2
13
C2750.1U_0402_16V4ZCMOS@
1
2
D12
CH751H-40PT_SOD323-2
21
R1270_0402_5% DIS@ 12
R37100K_0402_5%
@
12
R840_0402_5% DIS@ 12
R170_0402_5% DIS@
1 2
R3860_0402_5% UMA@ 12
R3880_0402_5% UMA@ 12
C15
47
0P
_0
40
2_
50
V7
K
@1
2
R260 0_0402_5%UMA@
1 2
R860_0402_5% DIS@ 12
R1280_0402_5% DIS@ 12
R2800_0603_5%CMOS@
12
JLVDS1
ACES_87142-3041ME@
GND31
GND32
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
2525
2626
2727
2828
2929
3030
G
D
S
Q32N7002_SOT23
21
3
R3922.2K_0402_5%
@
R35 0_0402_5%UMA@
12
R1250_0402_5% DIS@ 12
G
DS
Q24 AO3413_SOT23-3
CMOS@
2
13
R13150_0603_1%
R3910_0402_5% DIS@ 12
R38 220K_0402_5%
1 2
R250
4.7K_0402_5%
12
G
D
S
Q4AO3413_SOT23-3
2
13
R395
2.2K_0402_5%
@
R15610K_0402_5% @
12
R3900_0402_5% DIS@ 12
R3940_0402_5% UMA@ 12
L2
FBMA-L11-201209-221LMA30T_0805
1 2
Q5DTC124EKAT146_SC59-3
IN2
OU
T1
GN
D3
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
WLAN_CLKREQ1#
BT_ACTIVEPCIE_WAKE#
C PUSB#
PERST#
EC_TX_P80_DATAEC_RX_P80_CLK
WLAN_LED#
SYSON
SUSP#
UIM_DATAUIM_VPP
UIM_CLKUIM_RST
+UIM_PWR
+UIM_PWR
+UIM_PWRUIM_DATA
PERST#
C PUSB#
USB20_P10USB20_N10
C PUSB#
+UIM_PWRUIM_DATAUIM_CLKUIM_RST
PCIECLKREQ3#
USB20_N13USB20_P13
BT_ACTIVEPCIE_WAKE#
UIM_VPP
EC_TX_P80_DATAEC_RX_P80_CLK
LPC_FRAME#LPC_AD3LPC_AD2LPC_AD1LPC_AD0
LPC_FRAME#_RLPC_AD3_RLPC_AD2_RLPC_AD1_RLPC_AD0_R
LPC_FRAME#_RLPC_AD3_RLPC_AD2_RLPC_AD1_RLPC_AD0_R
PCI_RST#_RCLK_PCI_DB
PCI_RST#CLK_PCI_DBPCI_RST#_R
CLK_PCIE_WLAN1<14>
PCIE_WAKE#<15>
WLAN_CLKREQ1#<14>
CLK_PCIE_WLAN1#<14>
BUF_PLT_RST#<5,16,19,29>
CPUSB#<16>
USB20_N8 <16>USB20_P8 <16>
BUF_PLT_RST# <5,16,19,29>W L_OFF# <34>
EC_TX_P80_DATA<34,35>EC_RX_P80_CLK<34,35>
WLAN_LED# <36>
BT_ACTIVE<37>
SYSON<34,39,44>
SUSP#<16,34,39,42,44,46>
SMB_CLK_S3 <10,11,12,14>SMB_DATA_S3 <10,11,12,14>PCIE_PTX_C_DRX_N2<14>
PCIE_PTX_C_DRX_P2<14>
PCIE_PRX_DTX_N2<14>PCIE_PRX_DTX_P2<14>
PCIE_PRX_DTX_P5<14>
C PUSB#<16>
USB20_N10<16>
CLK_PCIE_EXP_PCH<14>
PCIE_PRX_DTX_N5<14>
CLK_PCIE_EXP_PCH#<14>
SMB_DATA_S3<10,11,12,14>SMB_CLK_S3<10,11,12,14>
CLKREQ_EXP#<14>
PCIE_PTX_C_DRX_P5<14>
USB20_P10<16>
PCIE_WAKE#<15>
PCIE_PTX_C_DRX_N5<14>
C LK_PCIE_CARD_PCH<14>
PCIE_WAKE#<15>
PCIECLKREQ3#<14>
BUF_PLT_RST# <5,16,19,29>
CLK_PCIE_CARD_PCH#<14>
SMB_CLK_S3 <10,11,12,14>SMB_DATA_S3 <10,11,12,14>
3G_OFF# <34>
EC_TX_P80_DATA<34,35>EC_RX_P80_CLK<34,35>
BT_ACTIVE<37>
PCIE_PRX_DTX_N4<14>
USB20_P13 <16>USB20_N13 <16>
PCIE_PTX_C_DRX_N4<14>PCIE_PTX_C_DRX_P4<14>
PCIE_PRX_DTX_P4<14>
LPC_AD2 <13,34>LPC_AD1 <13,34>
LPC_AD3 <13,34>
LPC_AD0 <13,34>
LPC_FRAME# <13,34>
PCI_RST# <16,34>CLK_PCI_DB <14>
+3VS
+1.5VS
+3VALW
+3VS
+3VALW
+1.5VS_CARD1
+3VALW_CARD1
+3VS_CARD1
+1.5VS
+3VS
+3VALW
+3VS
+3VS+3VALW
+3VALW
+3VS
+3VS
+3VS_CARD1
+1.5VS_CARD1
+3VALW_CARD1
+3VS_CARD1
+1.5VS_CARD1
+3VALW_CARD1
+1.5VS
+1.5VS
+3VS
+3VS
+3VS
+3VS
+3VALW
+1.5VS
Title
Size Document Number R e v
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0 .3
Mini-Card/Nwe Card/SIM
28 51Thursday, October 29, 2009
2007/10/15 2008/10/15Compal Electronics, Inc.
LA-5752P
Mini-Express Card for WLAN/WiMAX(Half)
60mil
40mil
40mil
Express Card Power Switch
2Watt
40mil
Mini-Express Card for WWAN(Full)
New Card 34mm Socket (Left/TOP)
Imax = 0.275A
Imax = 0.75A
Imax = 1.35A
Mini-Express Card(WWAN 3G)
Vcc 3.3V +/- 8%Peak Icc 2750mAwith max supply droop 50mAAverage Icc 1000mA
2Watt
Mini-Express Card(WLAN/WiMAX)
Reserve for SW mini-pcie debug card.
Series resistors closed to KBC side.
C1
88
4.7
U_
08
05
_1
0V
4Z
1
2
R 366 0_0402_5%@1 2
C36010U_0805_10V4Z
1
2
C 4220.1U_0402_16V4Z
1
2
R 368 0_0402_5%3G@1 2
R371300_0402_5% 12
C3570.1U_0402_16V4Z
1
2
R 369 0_0402_5%@1 2 D5
DAN217T146_SC59-3
@
2
31
R274100_0402_1%
1 2
R 334 100K_0402_5%@1 2
R284 0_0402_5%@1 2
J P2
TAITW_PMPAT6-06GLBS7N14N0ME@
VCC1
RST2
CLK3
GND4
VPP5
I/O6
GND8
GND9
DET7
C41810U_0805_10V4Z
1
2
R 376 0_0402_5%@1 2
D4
CM1293-04SO_SOT23-6
@
CH36
Vp5
CH44
CH23
Vn2
CH11
C3580.1U_0402_16V4Z
1
2
R273100_0402_1%
1 2
R 373 0_0402_5%@1 2
R287 0_0402_5%@1 2
R286 0_0402_5%@1 2
C3860.1U_0402_16V4Z
1
2
J4
JUMP_43X79
@
11
22
R285 0_0402_5%@1 2
R 377 0_0402_5%1 2
R 374 0_0402_5%@1 2
C38810U_0805_10V4Z
1
2
R288 0_0402_5%@1 2
U 15
G577BSR91U_QFN20
3.3Vin2
3.3Vin4
3.3Vout3
3.3Vout5
SYSRST#6
SHDN#20
STBY#1
PERST#8
OC#19
RCLKEN18
AUX_IN17
AUX_OUT15
CPPE#10
CPUSB#9
NC16
GND7
1.5Vin12
1.5Vin14
1.5Vout11
1.5Vout13
C35610U_0805_10V4Z
@1
2
R370 0_0402_5%@1 2
R15210K_0402_5%
@
12
R 365 0_0402_5%@1 2
JP10
TAITW_PFPET0-AFGLBG1ZZ4N0ME@
WAKE#1
NC3
NC5
CLKREQ#7
GND9
REFCLK-11
REFCLK+13
GND15
NC17
NC19
GND21
PERn023
PERp025
GND27
GND29
PETn031
PETp033
GND35
NC37
NC39
NC41
NC43
NC45
NC47
NC49
NC51
GND53
3.3V2
GND4
1.5V6
NC8
NC10
NC12
NC14
NC16
GND18
NC20
PERST#22
+3.3Vaux24
GND26
+1.5V28
SMB_CLK30
SMB_DATA32
GND34
USB_D-36
USB_D+38
GND40
LED_WWAN#42
LED_WLAN#44
LED_WPAN#46
+1.5V48
GND50
+3.3V52
GND54
C3590.1U_0402_16V4Z
1
2
C42010U_0805_10V4Z
@1
2
C 4170.1U_0402_16V4Z
1
2
R290 0_0402_5%@1 2
R333 0_0402_5%@1 2
C4190.1U_0402_16V4Z
1
2
R 375 0_0402_5%1 2
R1
51
10
K_
04
02
_5
%
12
R364100_0402_1%
3G@1 2
R 367 0_0402_5%@1 2
C3720.1U_0402_16V4Z
1
2
C3870.1U_0402_16V4Z
1
2
J P9
TAITW_PFPET0-AFGLBG1ZZ4N0ME@
WAKE#1
NC3
NC5
CLKREQ#7
GND9
REFCLK-11
REFCLK+13
GND15
NC17
NC19
GND21
PERn023
PERp025
GND27
GND29
PETn031
PETp033
GND35
NC37
NC39
NC41
NC43
NC45
NC47
NC49
NC51
GND53
3.3V2
GND4
1.5V6
NC8
NC10
NC12
NC14
NC16
GND18
NC20
PERST#22
+3.3Vaux24
GND26
+1.5V28
SMB_CLK30
SMB_DATA32
GND34
USB_D-36
USB_D+38
GND40
LED_WWAN#42
LED_WLAN#44
LED_WPAN#46
+1.5V48
GND50
+3.3V52
GND54
C1760.1U_0402_16V4Z
1
2
R372300_0402_5% @ 12
R363100_0402_1%
3G@1 2
JEXP1
SANTA_130801-5_LTME@
GND1
USB_D-2
USB_D+3
CPUSB#4
RSV5
RSV6
SMB_CLK7
SMB_DATA8
+1.5V9
+1.5V10
WAKE#11
+3.3VAUX12
PERST#13
+3.3V14
+3.3V15
CLKREQ#16
CPPE#17
REFCLK-18
REFCLK+19
GND20
PERn021
PERp022
GND23
PETn024
PETp025
GND26
GND27
GND28
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
LAN_CSLAN_SK#LAN_DI
ACTIVITY#
VCTRL12ISOLATEB
LAN_XTALOLAN_XTALI
ISOLATEB
LAN_DI
LAN_CS
EN_WOL#
PCIE_IRX_C_PTX_N3
PCIE_IRX_C_PTX_P3
LAN_XTALOLAN_XTALI
VCTRL12
MDI1+MDI0-MDI0+
MDI2+MDI1-
MDI2-MDI3+MDI3-
CLK_PCIE_LAN#<14>CLK_PCIE_LAN<14>
CLKREQ_LAN#<14>
LAN_WAKE#<34>
BUF_PLT_RST#<5,16,19,28>
EN_WOL#<34>
PCIE_PRX_DTX_N3<14>
PCIE_PRX_DTX_P3<14>
PCIE_PTX_C_DRX_N3<14>
PCIE_PTX_C_DRX_P3<14>
MDI1+ <30>
MDI2- <30>MDI2+ <30>
MDI0- <30>MDI0+ <30>
MDI1- <30>
MDI3+ <30>MDI3- <30>
ACTIVITY# <30>
LAN_SK# <30>
+EVDD12+LAN_VDD12
+3VS
+3V_LAN
+3V_LAN
+3V_LAN
+3V_LAN+3VALW
+5VALW
+3V_LAN
+EVDD12
+LAN_VDD12
+LAN_VDD12
+3V_LAN
+3V_LAN
+LAN_VDD12
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
RTL8103EL
Custom
29 51Thursday, October 29, 2009
2006/08/04 2006/10/06
Compal Electronics, Inc.
LA-5752P
Place Close to Chip
Layout Notice : Place as closech ip as possible.
Close to 8111DL pins--1,29,37
The trace length L69 to 8111DL's pin<200mils.L69 to C934/C941<200mils. Close to U44 pin19
Close to U44 pin10,13,30,36
For RTL8111DL pin43: pull hi if switching regulator is enable.pull low if external power 1.2Vis used.For RTL8103EL is NC.
40 mil width
60 mil width
60 mil width
Close to pin.
C246
0.1U_0402_16V4Z
1
2
R1720_0603_5%GIGA@
1 2
C238
22
U_
08
05
_6
.3V
6M 1
2
R20515K_0402_5%
R1700_0603_5%100@
1 2
R21933K_0402_5%
12
C2
61
4.7
U_
08
05
_1
0V
4Z
C251
1U_0603_10V4Z
1
2
L12
S INDUC_ 4.7UH +-20% SIA4012-4R7M
GIGA@
1 2
G
D S Q17
AO3414_SOT23-3
2
1 3
R1770_0402_5%GIGA@
12
C597
0.1U_0402_16V4Z
1
2
C239
0.1
U_
04
02
_1
6V
4Z
1
2
C244
22
U_
08
05
_6
.3V
6M
GIGA@
1
2
C611
30P_0402_50V8J
1
2
R180
0_0402_5%
GIGA@12
RTL8111DL
U24
RTL8111DL-VB-GR_LQFP48_7X7
GIGA@
AVDD331
MDIP02
MDIN03
FB124
MDIP15
MDIN16
GND7
MDIP28
MDIN29
AVDD1210
MDIP311
MDIN312
RSET46
SROUT1248
GND47
CKTAL242
CKTAL141
AVDD3340
VDDSR44
LED038
VDD3337
ENSR43
DVDD1213
GND14
HSIP15
HSIN16
REFCLK_P17
REFCLK_N18
EVDD1219
HSOP20
HSON21
EGND22
GPO23
NC24
LED1/EESK35
LED2/EEDI/AUX34
LED3/EEDO33
EECS32
DVDD1236
GND31
DVDD1230
VDD3329
ISOLATEB28
PERSTB27
LANWAKEB26
CLKREQB25
AVDD1239
VDDSR45
C593 0.1U_0402_16V7K
C612
30P_0402_50V8J
1
2
R182 3.6K_0402_5%
100@
1 2
C245
0.1
U_
04
02
_1
6V
4Z
1
2
J1JOPEN
@
12
R179
0_0402_5%
@12
R1730_0603_5%GIGA@
1 2
C613
0.1U_0402_16V4Z
1
2
C243
0.1U_0402_16V4Z
GIGA@
12
U24
RTL8103EL-VB-GR100@
R171 2.49K_0402_1%1 2
R203 1K_0402_5%1 2
C267
0.1U_0402_16V4Z1
2
C242
0.1U_0402_16V4ZGIGA@1
2
R206 10K_0402_5%
@
12
R5760_0603_5%GIGA@
1 2
R5770_0603_5%100@
1 2
C594 0.1U_0402_16V7K
C247
0.1U_0402_16V4Z
1
2C248
0.1U_0402_16V4Z
1
2
Y3
25MHZ_20P
1 2
C260
0.1U_0402_16V4Z
1
2
R2041K_0402_5%
12
C2501U_0603_10V4Z
1
2
G
D
SQ182N7002_SOT23-3
2
13
R1810_0402_5%GIGA@
12
C259
0.1U_0402_16V4Z1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MDI1-
MDI1+
MDI0+
MDI0- MDO0-
MDO0+
MCT0
MCT1
MDO1-
MDO1+
MDO2+
MDO2-
MCT2
MCT3
MDO3+
MDO3-
MDI2+
MDI2-
MDI3-
MDI3+
ACTIVITY#
LAN_SK#
MDO2+
MDO0-
MDO1+
MDO1-
MDO2-
MDO3+
MDO3-
MDO0+
MDI0+<29>
MDI0-<29>
MDI1+<29>
MDI1-<29>
MDI2-<29>
MDI2+<29>
MDI3-<29>
MDI3+<29>
LAN_SK#<29>
ACTIVITY#<29>
+3V_LAN
+3V_LAN
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
LAN_Transformer
Custom
30 51Thursday, October 29, 2009
2009/03/20 2010/03/20
Compal Electronics, Inc.
LA-5752P
RJ45 Conn.
Place close to TCT pin
Close to T14
For EMI.
R52 75_0402_5%12
T16
HH-065100@
R574 300_0402_5%12
R178 300_0402_5%12
C132 0.01U_0402_16V7KGIGA@
12
C130 0.01U_0402_16V7K12
R53 75_0402_5%12
1:1
1:1
1:1
1:1
T16
LG-2446SGIGA@
TCT11
TD1+2
TD1-3
TCT24
TD2+5
TD2-6
TCT37
TD3+8
TD3-9
TCT410
TD4+11
TD4-12 MX4- 13
MX3- 16
MCT3 18
MX2- 19
MX2+ 20
MCT2 21
MX1- 22
MX1+ 23
MCT1 24
MX4+ 14
MCT4 15
MX3+ 17
JRJ45
FOX_JM36113-P2221-7F
ME@
PR1-2
PR1+1
PR2+3
PR3+4
PR3-5
PR2-6
PR4+7
PR4-8
Green LED+9
Green LED-10
Amber LED+11
Amber LED-12
SHLD4 16
SHLD3 15
SHLD2 14
SHLD1 13
C131 0.01U_0402_16V7K12
C70470P_0402_50V7K
@
12
R55 75_0402_5%GIGA@ 12
C24968P_0402_50V8K@
1
2
R54 75_0402_5%GIGA@ 12
C133 0.01U_0402_16V7KGIGA@
12
C609
68P_0402_50V8K
@
1
2
C128
1000P_1206_2KV7K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FAN_PWM
SMB_EC_DA2_R
V DD
REMOTE2+
REMOTE2-
REMOTE1-
REMOTE1+
TACH
TRIP_SETREMOTE2+
REMOTE2-
ALERT#
SMB_EC_CK2_R
SHDN_SEL
TACH_RFAN_PWM_R
FAN_PWM_R
TACH
FAN_PWM
TACH_R
REMOTE1-
REMOTE1+
REMOTE2-
REMOTE2+
SMB_EC_DA2_R
SMB_EC_CK2_R
ALERT#
V DD
REMOTE2-
REMOTE2+
REMOTE1-
REMOTE1+
REMOTE1+
REMOTE1-REMOTE2+
REMOTE2-
SMB_EC_DA2_R <14,19>SMB_EC_CK2_R<14,19>
EC_FAN_PWM<34>
EC_TACH<34>
+3VS+3VS +3VS+3VS
+5VS
+3VS+3VS +3VS
+3VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
EMC2103/1403_Thermal sensor/FAN
Custom
31 51Thursday, October 29, 2009
2008/03/25 2008/04/Compal Electronics,Ltd.
LA-5752P
TRIP_SET
R439 (1%)
Shutdown
Temp
93
94
95
96
97
98
99
100
101
102
103
104
105
953ohm
1020ohm
1100ohm
1150ohm
1240ohm
1330ohm
1400ohm
1500ohm
1580ohm
1690ohm
1820ohm
1960ohm
2050ohm
SMSC thermal sensor
placed near by VRAM
internal pull up 1.2K to 1.5V
R for initial thermal
shutdown temp
Close to DDR
Under WWAN
FAN_PWM & TACH
for PWM FAN
FAN1 Conn
Address 0101_110xb
REMOTE1,2+/-:
Trace width/space:10/10 mil
Trace length:<8"
Address 1001_101xb
Close U20
1403:
@C508/@C324=100p
E
B
C
Q39MMST3904-7-F_SOT323-3
2
31
C4430.1U_0402_16V4Z
1
2
C3241000P_0402_50V7K
@1
2
R620 0_0402_5%1 2
R46210K_0402_5%
2103@
12
U29
EMC1403-2-AIZL-TR_MSOP10
1403@
DN13
DP12
VDD1
GND 6
ALERT# 8
DP24
DN25
THERM# 7
SMDATA 9
SMCLK 10
C6512200P_0402_50V7K
1
2
R441
10K_0402_5%
2103@
12U20
EMC2103-2-AP-TR_QFN16_4X4
2103@
DN11
VDD3
GPIO25
SYS_SHDN#7
GPIO1 4DP1 2
ALERT# 6
SMDATA 8
SMCLK9
PWM11
SHDN_SEL13
TACH 10
GND 12
TRIP_SET 14
DN2 / DP315 DP2 / DN3 16
GPAD 17
R622 0_0402_5%
2103@
1 2
C490
10U_0805_10V4Z1
2
R624
10K_0402_5%@
12
C4492200P_0402_50V7K
1403@1
2
JP12
ACES_85205-04001ME@
11
22
33
G55
G66
44
R617 0_0402_5%@1 2
R46010K_0402_5%
2103@
12
R430
0_0402_5%
1403@
R461
10K_0402_5%
2103@
12
C5081000P_0402_50V7K
@1
2
R623 0_0402_5%
2103@
1 2
R430
68_0402_5%
2103@
12
R618 0_0402_5%@1 2
R44010K_0402_5%@
12
R439
1.5K_0402_1%@
12
R459
6.8K_0402_5%
2103@
12
R619 0_0402_5%1 2
E
B
C
Q22MMST3904-7-F_SOT323-3
2
31
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
SATA_DTX_IRX_P1
SATA_DTX_C_IRX_P0
SATA_ITX_DRX_N0
SATA_DTX_IRX_N0SATA_DTX_C_IRX_N0
SATA_ITX_DRX_N1
SATA_DTX_C_IRX_N1
SATA_DTX_IRX_P0
SATA_ITX_DRX_P1
SATA_DTX_IRX_N1
SATA_ITX_DRX_P0
SATA_DTX_C_IRX_P1
ODD_Power_ON#
SATA_DTX_C_IRX_N1<13>
SATA_ITX_DRX_P1<13>
SATA_ITX_DRX_P0<13>
SATA_DTX_C_IRX_N0<13>
SATA_DTX_C_IRX_P1<13>
SATA_DTX_C_IRX_P0<13>
SATA_ITX_DRX_N1<13>
SATA_ITX_DRX_N0<13>
ODD_Power_ON#<34>
ODD_OFF#<34>
+5VS
+5V_ODD
+3VS
+3VS
+5VS +3VS
+5VS +5V_ODD
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
HDD/ODD Connector
B
32 51Thursday, October 29, 2009
2007/10/15 2008/10/15Compal Electronics, Inc.
LA-5752P
SATA HDD Conn.
SATA ODD Conn.
ODD Power Control
R37810K_0402_5%
@
12
Q36DTC124EKAT146_SC59-3
@
IN2
OU
T1
GN
D3
G
DS
Q37 AO3413_SOT23-3
@
2
13
C12210U_0805_10V4Z
1
2
C426 0.01U_0402_16V7K1 2
C4230.01U_0402_16V7K
@
1 2
C425 0.01U_0402_16V7K1 2
C1251000P_0402_50V7K
1
2
R379 0_0402_5%@1 2
JODD1
OCTEK_SLS-13SB1G_RV
ME@
GND1
A+2
A-3
GND4
B-5
B+6
GND7
DP8
+5V9
+5V10
MD11
GND12
GND13
GND17
GND16
C43110U_0805_10V4Z
@
1
2
C12310U_0805_10V4Z
1
2
J6
JUMP_43X79@
11
22
R380
10K_0402_5%@1 2
C4240.1U_0402_16V4Z
1
2
C433 0.01U_0402_16V7K1 2
JHDD1
SUYIN_127043FB022G208ZR_RVME@
GND1
A+2
A-3
GND4
B-5
B+6
GND7
VCC3.38
VCC3.39
VCC3.310
GND11
GND12
GND13
VCC514
VCC515
VCC516
GND17
RESERVED18
GND19
VCC1220
VCC1221
VCC1222
C434 0.01U_0402_16V7K1 2
C1241U_0603_10V4Z
1
2
C1210.1U_0402_16V4Z
@1
2
C1260.1U_0402_16V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PC_BEEP
HDA_SDOUT_CODEC
HDA_BITCLK_CODEC
HDA_RST_CODEC#
HDA_SY NC_CODEC
PC_BEEPPC_BEEP1
SPK_L2+
SPK_R1-
SPK_L1-
SPK_R2+
SPK_R2+SPK_L1-SPK_L2+
SPK_R1-
EC_MUTE#
+VAUX_3.3
GN DA
MIC_INL
MIC_INR
MIC_INL
MIC_INR
HDA_BITCLK_CODEC
HDA_SY NC_CODEC
HDA_RST_CODEC#
HDA_SDOUT_CODEC
SPK_L2+_CONNSPK_L1-_CONNSPK_R2+_CONNSPK_R1-_CONN
MIC_INR MIC_INL
HP_OUTR_RHP_OUTL_R
HDA_RST_CODEC#<13>
HDA_BITCLK_CODEC<13>
HD A_SDIN1<13>HDA_SY NC_CODEC<13>
P CH_SPKR<13>
BEEP#<34>
E APD<34>
HDA_SDOUT_CODEC<13>
M IC_JD <38>PLUG_IN <38>
EC_MUTE#<34>
HP_OUTL <38>HP_OUTR <38>
EXT_MIC_R <38>EXT_MIC_L <38>
+3VS
+1.5V
+LDO_OUT_3.3V
+3VS
+5VS
+5VS
+VAUX_3.3
+MICBIASC
+MICBIASC
+3VALW
+3VALW
+3VS
+3VS
+MICBIASB
+MICBIASB
Title
Size Document Number R e v
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0 .3
CX20671 Codec
C
33 51Thursday, October 29, 2009
2008/03/25 2008/04/
Compal Electronics,Ltd.
LA-5752P
AVDD_3.3 pinis output ofinternal LDO. NOT connectto external supply.
To suuport Wake-on-Jack or Wake-on-Ring, the CODECVAUX_3.3 & VDD_IO pins must be powerd by a rail that is not removed unless AC power is removed.*DSH page42 has more detail.
Please bypass caps very close to device.
PC Beep
ICH Beep
EC Beep
Internal SPEAKER
Port CPort A
wide 20MIL
External MIC
Sense resistors must beconnected same powerthat is used for VAUX_3.3
CX20671High Definition Audio Codec SoCWith Integrated Class-D StereoAmplifier.An integrated 5 V to 3.3 V Low-dropoutvoltage regulator (LDO).
GND GNDA
EAPD active low0=power down ex AMP1=power up ex AMP
10K only needed if supply to VAUX_3.3 is removed during system re-start.
Headphone
Internal MIC
EMI
An integrated 3.3 V to 1.8V Low-dropoutvoltage regulator (LDO).
Layout Note:Path from +5VS to LPWR_5.0 RPWR_5.0 must be very low resistance (<0.01 ohms)
R309
10K_0402_5%
12
C 374 1U_0603_10V4Z
12
C3
93
0.1
U_
04
02
_1
6V
4Z
1
2
R355
0_0402_5%1 2
C3
71
10
U_
08
05
_1
0V
4Z
1
2
C394 2.2U_0603_10V7K
1 2
C3
70
22
P_
04
02
_5
0V
8J
1
2
D 15
RB751V_SOD323
@
21
R 3280_0402_5%12
MIC1
WM-64PCY_2P45@
12
L23 0_0603_5%1 2
C4
11
0.1
U_
04
02
_1
6V
4Z
1
2
C405
0.1U_0402_16V4Z1 2
L19 0_0603_5%1 2L20 0_0603_5%1 2
R3430_0402_5%12
R362
0_0402_5%1 2
C6
32
10
00
P_
04
02
_5
0V
7K
1
2
R 332
10
K_
04
02
_5
%
12
C3
81
10
U_
08
05
_1
0V
4Z
1
2
C3
92
0.1
U_
04
02
_1
6V
4Z
1
2
C352
1U_0603_10V4Z
12
C6
34
10
00
P_
04
02
_5
0V
7K
1
2
R350 100_0402_1%
C416
0.1U_0402_16V4Z1 2
R 3370_0402_5%@ 12
R 336 33_0402_5%1 2
R354
0_0402_5%1 2
R351 2.2K_0402_5%
C4
04
10
U_
08
05
_1
0V
4Z
1
2
C 3450.1U_0402_16V4Z@
1
2
C4
08
0.1
U_
04
02
_1
6V
4Z
1
2
C351
1U_0603_10V4Z
12
C 368
1U_0603_10V4Z
12
C3
76
22
P_
04
02
_5
0V
8J
@
1
2
C4
06
0.1
U_
04
02
_1
6V
4Z
1
2
C401 1U_0603_10V4Z1 2
R344 5.11K_0402_1%1 2
C3
75
22
P_
04
02
_5
0V
8J
@
1
2
C4
09
0.1
U_
04
02
_1
6V
4Z
1
2
C395
0.1U_0402_16V4Z1 2
R32510K_0402_1%
12
R6015.1_0402_5% 1 2
C402 2.2U_0603_10V7K
@
1 2
C3
69
1U
_0
60
3_
10
V4
Z
1
2
C3
79
0.1
U_
04
02
_1
6V
4Z
1
2
C3
91
0.1
U_
04
02
_1
6V
4Z
1
2
J7
SHORT PADS
1 2
R 6000_0402_5%1 2
C4
13
10
U_
08
05
_1
0V
4Z
1
2
C4
00
0.1
U_
04
02
_1
6V
4Z
1
2
R6025.1_0402_5% 1 2
R 3390_0402_5%12
R346 39.2K_0402_1%1 2
C4
10
10
U_
08
05
_1
0V
4Z
1
2
C415 2.2U_0603_10V7K1 2
R 327 20K_0402_5%1 2
R3494.7K_0402_5%
12
R 3290_0402_5%@ 12
C4
12
0.1
U_
04
02
_1
6V
4Z
1
2
C4
14
1U
_0
60
3_
10
V4
Z
1
2
U 17
CX20671-11Z_QFN40_6X6
VD
D_IO
7
VA
UX
_3.3
2
SDATA_OUT4
BIT_CLK5
SDATA_IN6
DV
DD
_3.3
18
SYNC8
RESET#9
PORTA_L22
PORTA_R23
AV
DD
_3.3
27
PORTC_L30
RPWR_5.015
LPWR_5.012
FLY_P19
FLY_N20
RIGHT-14
RIGHT+16
PORTB_L34
B_BIAS33
PORTB_R35
DMIC_CLK40
AVEE21
C_BIAS32
PORTC_R31
FIL
T_1.6
529
LEFT-13
GPIO1/SPK_MUTE#37
DMIC_1/21
AV
DD
_5V
28
GPIO0/EAPD#38
LEFT+11
SENSE_A36
CLASS-D_REF17A
VD
D_H
P26
FIL
T_1.8
3
PC_BEEP10
GN
D41
NC24
NC25
NC39
C6
33
10
00
P_
04
02
_5
0V
7K
1
2
JSPK1
ACES_88231-04001
ME@
11
22
33
44
GND15
GND26
R348
0.1_1206_1%
1 2
R311
560_0402_5%
1 2
C403 2.2U_0603_10V7K1 2
C6
35
10
00
P_
04
02
_5
0V
7K
1
2
R 310
560_0402_5%
1 2
C3
78
22
P_
04
02
_5
0V
8J
@
1
2
C3
90
10
U_
08
05
_1
0V
4Z
1
2
R 335
20K_0402_5%
@12
C3
99
10
U_
08
05
_1
0V
4Z
1
2C
38
0
0.1
U_
04
02
_1
6V
4Z
1
2
R345 10K_0402_1%1 2
L22 0_0603_5%1 2
R3380_0402_5% 1 2
R33133_0402_5%1 2
C4
07
10
U_
08
05
_1
0V
4Z
1
2
R352 2.2K_0402_5%
C3
77
0.1
U_
04
02
_1
6V
4Z
1
2
C396
0.1U_0402_16V4Z1 2
R32610K_0402_1%
12
R 3300_0402_5% @ 12
R356 100_0402_1%
C
B
E
Q30
2SC2411KT146_SOT23-3
1
2
3
KSO[0..17]
KSI[0..7]
KSO9
SPI_CLK
KSI0
KSO10
KSO2
EC_RST#
CAPS_LED#
KSI2
KSO14
KSO4KSO3
KSI6
ECAGND
EC_SMB_CK1
KSO8
ACOFF
EC_SCI#
ACIN
BKOFF#
CHARGE_LED0#
KSO1
EC_SMI#
LPC_AD0
CHARGE_LED1#
KSO13
LPC_AD3
BATT_OVP
KSI5
EC_SMB_DA2
KSO7
FWR#SPI_SI
EC_ONEC_LID_OUT#
TP_CLKKSO0
LPC_AD1 BATT_TEMP
KSO12
EC_SMB_CK2
IREF
EC
AG
ND
KSI4
KSI1
KSO6
FRD#SPI_SO
EC_PME#
LID_SW#
LPC_AD2
DAC_BRIG
KSO11
INVT_PWM
SYSON
TP_DATA
KSI3
EC_SMB_DA1
KSI7
KSO15
KSO5
EC_MUTE#
ICH_POK_EC ICH_POK
BEEP#
USB_ON
KB_RST#
SUSP#PBTN_OUT#
I2C_INT
SUSP#
XCLKO
FSEL#SPICS#
KSO1
KSO2
USB_ON#
TP_DATA
TP_CLK
BATT_OVP
ACIN
BATT_TEMP
EC_SMB_CK2EC_SMB_DA2
FRD#SPI_SO
FSEL#SPICS#
EC_SMB_DA1
EC_SMB_CK1
ESB_CLK
ESB_DAT
ESB_CLKESB_DAT
I2C_INT
ODD_OFF#
RST#
PM_BTN#KSO16KSO17
EC_FAN_PWM
PCH_TEMP_ALERT#ODD_Power_ON#
EC_FAN_PWM
EC_ID
EC_ID
EC_TACH
H_PROCHOT#
XCLKI
EC_TX_P80_DATA
XCLKO
EC_RX_P80_CLK
EC_TACH
XCLKI
CLK_PCI_LPC<16>
KSO[0..17]<35>
KSI[0..7]<35>
EC_SMB_CK1<41>
EC_SMB_DA2<14>
EC_SMB_DA1<41>EC_SMB_CK2<14>
NUM_LED#<38>
SLP_S3#<15>SLP_S5#<15>EC_SMI#<16>
GATEA20<16>
LPC_FRAME#<13,28>
LPC_AD2<13,28>LPC_AD1<13,28>
LPC_AD3<13,28>
LPC_AD0<13,28>
PCI_RST#<16,28>
EC_SCI#<16>
EC_RX_P80_CLK<28,35>EC_TX_P80_DATA<28,35>
BATT_OVP <42>BATT_TEMP <41>
DAC_BRIG <27>
IREF <42>
TP_DATA <35>TP_CLK <35>
CHARGE_LED1# <36>CAPS_LED# <38>CHARGE_LED0# <36>
SYSON <28,39,44>
EC_RSMRST# <15>
EC_ON <38>
ACIN <40>VR_ON <48>
FSTCHG <42>
ON/OFF#<38>
BKOFF# <27>
INVT_PWM <27>
ACOFF <40,42>
LID_SW#<35>
EC_LID_OUT# <14>
USB_ON# <37>
ENBKL <27>
EC_MUTE# <33>
ADP_I <42>
LAN_WAKE#<29>
PCI_PME#<16>
SERIRQ<13>
WL_OFF# <28>
ICH_POK <15>
SLP_S4# <15>
BEEP# <33>
FRD#SPI_SO <36>
SPI_CLK <36>FWR#SPI_SI <36>
SUSP# <16,28,39,42,44,46>PBTN_OUT# <15>
KILL_SW#<35>
EN_WOL# <29>
PWR_LED# <36>
KB_RST#<16>
CHGVADJ <42>
CMOS_OFF# <27>
3G_OFF#<28>
EAPD <33>
FSEL#SPICS# <36>
KSI3<35>KSI4<35>
BT_OFF# <37>
BATT_SEL_EC <42>
AC_PRESENT <15>
ME_FLASH <13>
I2C_INT <38>
ESB_DAT<38>ESB_CLK<38>
ODD_OFF# <32>
EC_TACH<31>
DRAMRST_CNTRL_EC <5>
PM_BTN# <38>
RST# <38>
SUS_PWR_DN_ACK <15>
EC_FAN_PWM <31>
PCH_TEMP_ALERT# <16>
H_PROCHOT#<5,48>
NOVO# <38>
ODD_Power_ON# <32>
+3VALW+EC_AVCC
+3VALW
+3VALW +EC_AVCC
+3VALW
+3VALW
+3VS
+3VALW
+3VS
+3VALW
+5VS
+3VALW
+3VS
+3VALW
+3VS
+3VALW
+3VALW
+3VS
+3VS
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
BIOS & EC I/O Port
Custom
34 51Thursday, October 29, 2009
2007/10/15 2008/10/15Compal Electronics, Inc.
LA-5752P
KB926 SPI STRAP PIN
needed to update to D3 version
SA00001J580
ENE UPDATE 08/10/21
6
FAN control by EC 09.09.08
changed 09.09.08changed 09.09.08
changed 09.09.08
EC_ID to identify KB926 D or EC298 100P_0402_50V8J
1 2
C3
39
0.1
U_
04
02
_1
6V
4Z
1
2
R262 100K_0402_1%@1 2
C3
41
10
00
P_
04
02
_5
0V
7K
1
2
R303 0_0402_5%@1 2
R61310K_0402_5%@
12
R614
4.7K_0402_5%@1 2
C291100P_0402_50V8J
@1
2
C2930.1U_0402_16V4Z
1
2
C3181000P_0402_50V7K
@1
2
R258 0_0402_5%1 2
L13 FBM-11-160808-601-T_06031 2
R265 47K_0402_5%1 2
C3
27
10
00
P_
04
02
_5
0V
7K
1
2
R615
4.7K_0402_5%@1 2
R289 10_0402_5%@12
R271 100K_0402_1%@1 2
R263 47K_0402_5%1 2
C340 22P_0402_50V8J@12
R235 4.7K_0402_5%1 2
R238 10K_0402_5%1 2
R227
2.2K_0402_5%@
C3
29
0.1
U_
04
02
_1
6V
4Z
1
2
R226
2.2K_0402_5%@
R29210K_0402_5%
12
C3
19
0.1
U_
04
02
_1
6V
4Z
1
2
R251 10K_0402_5%
@
1 2
C321 15P_0402_50V8J1 2
C292100P_0402_50V8J
@1
2
D11 RB751V_SOD323@
21
C2
90
0.1
U_
04
02
_1
6V
4Z
1
2
R234 4.7K_0402_5%@1 2
R266 47K_0402_5%1 2
R6074.7K_0402_5%1 2
R236 4.7K_0402_5%1 2
R294
4.7K_0402_5%1 2
G
DS
Q26
2N7002_SOT23
@
2
13
C328 100P_0402_50V8J1 2
C322 15P_0402_50V8J1 2
L14FBM-11-160808-601-T_0603
1 2
C297 100P_0402_50V8J1 2
C2941000P_0402_50V7K
1
2
R291
4.7K_0402_5%1 2
R293 0_0402_5%1 2
R237 10K_0402_5%1 2
R61110K_0402_5%
12
C3230.1U_0402_16V4Z
1
2
C3204.7U_0805_10V4Z
1
2
R239
4.7K_0402_5%1 2
X2
32.768KHZ_12.5PF_1TJS125DJ4A420P
OUT4
IN1
NC3
NC2
R26420M_0603_5%
@
12
R240
4.7K_0402_5%1 2
LPC & MISC
Int. K/B Matrix
SM Bus
GPIO
GPIO
AD Input
PWM Output
DA Output
PS2 Interface
SPI Device Interface
SPI Flash ROM
GPO
GPI
U13
KB926QFA1_LQFP128
GA20/GPIO001
KBRST#/GPIO012
SERIRQ#3
LFRAME#4
LAD35
PM_SLP_S3#/GPIO046
LAD27
LAD18
VC
C9
LAD010
GN
D1
1
PCICLK12
PCIRST#/GPIO0513
PM_SLP_S5#/GPIO0714
EC_SMI#/GPIO0815
LID_SW#/GPIO0A16
SUSP#/GPIO0B17
PBTN_OUT#/GPIO0C18
EC_PME#/GPIO0D19
SCI#/GPIO0E20
INVT_PWM/PWM1/GPIO0F21
VC
C2
2
BEEP#/PWM2/GPIO1023
GN
D2
4
EC_THERM#/GPIO1125
FANPWM1/GPIO1226
ACOFF/FANPWM2/GPIO1327
FAN_SPEED1/FANFB1/GPIO1428
FANFB2/GPIO1529
EC_TX/GPIO1630
EC_RX/GPIO1731
ON_OFF/GPIO1832
VC
C3
3
PWR_LED#/GPIO1934
GN
D3
5
NUMLED#/GPIO1A36
ECRST#37
CLKRUN#/GPIO1D38
KSO0/GPIO2039
KSO1/GPIO2140
KSO2/GPIO2241
KSO3/GPIO2342
KSO4/GPIO2443
KSO5/GPIO2544
KSO6/GPIO2645
KSO7/GPIO2746
KSO8/GPIO2847
KSO9/GPIO2948
KSO10/GPIO2A49
KSO11/GPIO2B50
KSO12/GPIO2C51
KSO13/GPIO2D52
KSO14/GPIO2E53
KSO15/GPIO2F54
KSI0/GPIO3055
KSI1/GPIO3156
KSI2/GPIO3257
KSI3/GPIO3358
KSI4/GPIO3459
KSI5/GPIO3560
KSI6/GPIO3661
KSI7/GPIO3762
BATT_TEMP/AD0/GPIO3863
BATT_OVP/AD1/GPIO3964
ADP_I/AD2/GPIO3A65
AD3/GPIO3B66
AV
CC
67
DAC_BRIG/DA0/GPIO3C68
AG
ND
69
EN_DFAN1/DA1/GPIO3D70
IREF/DA2/GPIO3E71
DA3/GPIO3F72
CIR_RX/GPIO4073
CIR_RLC_TX/GPIO4174
AD4/GPIO4275
SELIO2#/AD5/GPIO4376
SCL1/GPIO4477
SDA1/GPIO4578
SCL2/GPIO4679
SDA2/GPIO4780
KSO16/GPIO4881
KSO17/GPIO4982
PSCLK1/GPIO4A83
PSDAT1/GPIO4B84
PSCLK2/GPIO4C85
PSDAT2/GPIO4D86
TP_CLK/PSCLK3/GPIO4E87
TP_DATA/PSDAT3/GPIO4F88
FSTCHG/SELIO#/GPIO5089
BATT_CHGI_LED#/GPIO5290
CAPS_LED#/GPIO5391
BATT_LOW_LED#/GPIO5492
SUSP_LED#/GPIO5593
GN
D9
4
SYSON/GPIO5695
VC
C9
6
SDICS#/GPXOA0097
SDICLK/GPXOA0198
SDIDO/GPXOA0299
EC_RSMRST#/GPXO03100
EC_LID_OUT#/GPXO04101
EC_ON/GPXO05102
EC_SWI#/GPXO06103
ICH_PWROK/GPXO06104
BKOFF#/GPXO08105
WL_OFF#/GPXO09106
GPXO10107
GPXO11108
SDIDI/GPXID0109
PM_SLP_S4#/GPXID1110
VC
C1
11
ENBKL/GPXID2112
GN
D1
13
GPXID3114
GPXID4115
GPXID5116
GPXID6117
GPXID7118
SPIDI/RD#119
SPIDO/WR#120
VR_ON/XCLK32K/GPIO57121
XCLK1122
XCLK0123
V18R124
VC
C1
25
SPICLK/GPIO58126
AC_IN/GPIO59127
SPICS#128
R24110K_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
KSO[0..17]
KSI[0..7]
KSO2
KSO15
KSO6
KSO8
KSO13
KSO12
KSO11
KSO10
KSO3
KSO4
KSI0
KSO0
KSO1
KSO7
KSI2
KSO5
KSI3
KSO14
KSI7
KSI6
KSI5
KSI4
KSO9
KSI1
TP_CLKTP_DATA
EC_TX_P80_DATAEC_RX_P80_CLK
+VCC_LID
KSO12
KSO0
KSI0KSO1
KSO11
KSO5
KSO7
KSI6
KSO17KSO16
KSO3
KSI5
KSO14
KSI3
KSO4
KSO15
KSO6
KSI4
KSO13
KSI2
KSO2
KSI7KSI1
KSO10
KSO8
KSO9
KSO16
KSO17
KSO[0..17] <34>
KSI[0..7] <34>
TP_CLK<34>TP_DATA<34>
EC_RX_P80_CLK<28,34>EC_TX_P80_DATA<28,34>
LID_SW# <34>
KILL_SW#<34>
+5VS
+3VALW
+3VALW
+3VALW
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
KB /SW /LPC Debug Conn.B
35 51Thursday, October 29, 2009
2007/10/15 2008/10/15Compal Electronics, Inc.
LA-5752P
INT_KBD Conn.
To TP/B Conn.
EC DEBUG PORT
CONN PIN define need double check
CONN PIN define need double check
Lid Switch
KILL_SW#
Kill Switch
1,2(LOW)
STATUS
OFF
2,3(HI) ON
Kill
reversal of NIWE1
U18
A3212ELHLT-T_SOT23W-3
GN
D1
OUTPUT 3
VD
D2
C151100P_0402_50V8J
@1
2
C154 100P_0402_50V8J@1 2
C185 100P_0402_50V8J@1 2
C174 100P_0402_50V8J@1 2
C150
0.1U_0402_16V4Z
JP5
ACES_85201-3005NME@
G1 31
G2 32
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
2525
2626
2727
2828
2929
3030
C236 100P_0402_50V8J@1 2
C175 100P_0402_50V8J@1 2
R353 100K_0402_5%1 2
C156 100P_0402_50V8J@1 2
C204 100P_0402_50V8J@1 2
C173 100P_0402_50V8J@1 2
C226 100P_0402_50V8J@1 2
C3980.1U_0402_16V4Z
1
2
JP4
E&T_6905-E04N-00RME@
11223344
R347 0_0402_5%1 2
C225 100P_0402_50V8J@1 2
C227 100P_0402_50V8J@1 2
JP11
ACES_85205-0400
ME@
11
22
33
44
C203 100P_0402_50V8J@1 2
C228 100P_0402_50V8J@1 2
C235 100P_0402_50V8J@1 2
C172 100P_0402_50V8J@1 2
C636 100P_0402_50V8J@1 2
C234 100P_0402_50V8J@1 2
C233 100P_0402_50V8J@1 2
C155 100P_0402_50V8J@1 2
R295100K_0402_5%
12
C637 100P_0402_50V8J@1 2
C241 100P_0402_50V8J@1 2
C205 100P_0402_50V8J@1 2
C187 100P_0402_50V8J@1 2
SW2
LSSM12-P-V-T-R_3P
11
22
33
C39710P_0402_50V8J
1
2
C152100P_0402_50V8J
@1
2
C186 100P_0402_50V8J@1 2
C206 100P_0402_50V8J@1 2
C153 100P_0402_50V8J@1 2
FWR#SPI_SI
SPI_CLKSPI_CLK_RHOLD#FRD#SPI_SO SPI_SO
SPI_CLK_R
FSEL#SPICS#
SPI_SI_ECFWR#SPI_SI <34>
SPI_CLK <34>FRD#SPI_SO<34>
FSEL#SPICS#<34>
HDD_LED#<13>
BT_LED#<37>
WLAN_LED#<28>
PWR_LED#<34>
CHARGE_LED1#<34>
CHARGE_LED0#<34>
+3VALW
+5VS
+5VS
+5VALW
+3VALW
+5VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
LED/EC SPI ROM
B
36 51Thursday, October 29, 2009
2007/10/15 2008/10/15Compal Electronics, Inc.
LA-5752P
LED
20mils
EMI 3G
A:H_2P8
C:H_3P8
D:H_3P8 X2
G:H_3P2 X2
I:H_3P0 X1
J:H_2P8 X1
H_4P5X3P0N H_6P0N
White
White
AmberBATT_LOW_LED#
BATT_CHG_LED#
White
White
H_3P0X4P0N
Colse to EC
Changed to BEAD for EMI.Close to EC after C1059.
G:H_3P2 X2
FOR EC 256KB SPI ROM
(150mil PACKAGE)
P/N : SA00003GK00
SC500006M00
SC500005B00
SC500005B00
SC500005B00R361300_0402_5%12
H2HOLEA
1
LED3
19-213A-T1D-CP2Q2HY-3T_WHITE
21
R216
0_0402_5%@
12
H14HOLEA
1
H7HOLEA
1
C2650.1U_0402_16V4Z
1
2
LED4
19-213A-T1D-CP2Q2HY-3T_WHITE
21
H16HOLEA
1
D16
RB751V_SOD323
21
H18HOLEA
1
C26610P_0402_50V8J
1
2
H27HOLEA
1
H6HOLEA
1
H11HOLEA
1
O
W
LED2
18-225A-S2T3D-C01-3T_ORG-WHITE
21
43
R360300_0402_5%12
H17HOLEA
1
H10HOLEA
1
H19HOLEA
1
H3HOLEA
1
C26412P_0402_50V8J
@
1
2
H12HOLEA
1
R359300_0402_5%12
FD4
1
H15HOLEA
1
FD1
1
R20115_0402_5%1 2
FD2
1
H5HOLEA
1
R218 15_0402_5%1 2
H20HOLEA
1
D17
RB751V_SOD323
21
H23HOLEA
1
H13HOLEA
1
FD3
1
H22HOLEA
1
R21710K_0402_5%
12
H9HOLEA
1
R358300_0402_5%12
H21HOLEA
1
R357300_0402_5%12
H1HOLEA
1
R215 FBMA-10-100505-101T 0402
1 2
H4HOLEA
1
U9
MX25L2005CMI-12G SOP
VCC8
HOLD#7
CLK6
DIO5
GND4
WP#3
DO2
CS#1
H8HOLEA
1
H24HOLEA
1
LED1
19-213A-T1D-CP2Q2HY-3T_WHITE
21
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
BTON_LED
+USB_VCCA
SATA_DTX_IRX_P4SATA_DTX_IRX_N4SATA_DTX_C_IRX_N4
SATA_DTX_C_IRX_P4
USB20_N1USB20_P1
+USB_VCCB
SATA_ITX_DRX_N4_CONNSATA_ITX_DRX_P4_CONN
USB_ON#
USB_ON#
USB20_N3USB20_P3
USB20_P0USB20_N0
USB20_N1
USB20_P1
USB20_P11USB20_N11
BT_ACTIVE
BT_LED#<36>
BT_OFF#<34>
USB20_N1<16>USB20_P1<16>
SATA_DTX_C_IRX_P4<13>SATA_DTX_C_IRX_N4<13>
SATA_ITX_DRX_P4_CONN<13>SATA_ITX_DRX_N4_CONN<13>
USB_ON#<34>
USB_ON#<34> USB_OC#0 <16>
USB_OC#1 <16>
USB20_P0<16>USB20_N0<16>
USB20_N3<16>USB20_P3<16>
USB20_P11<16>USB20_N11<16>
BT_ACTIVE<28>
+3VS
+5VALW
+3VS_BT
+USB_VCCA
+USB_VCCB
+USB_VCCB
+5VALW
+USB_VCCA
+USB_VCCB
+5VALW
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
USB ports/BT/E-SATA
Custom
37 51Thursday, October 29, 2009
2006/08/18 2007/8/18
Compal Electronics, Inc.
LA-5752P
BT MODULE CONN
30mils
W=80mils
W=80mils
Left USB Conn.
Right USB Conn.
ESATA and USB Conn.
W=80mils
A+ = RXP
A- = RXN
B+ = TXP
B- = TXN
RIGHT USB PORT X1
E-SATA COMBO
LEFT USB PORT
USB
Low Active
Low Active
Q31DTC124EKAT146_SC59-3BT@
IN2
OU
T1
GN
D3
C421 0.1U_0402_16V4Z
12
U27
APL3510BKI_SO8
GND1
IN2
OC#5
OUT6
OUT8
IN3
EN4
OUT7
R304100K_0402_5%
BT@
12
+C430
150U_B2_6.3VM_R35M
1
2
D10
PJD
LC
05
_S
OT
23
-3
@
231
R616100K_0402_5%
BT@
1 2
USB
ESATA
JESAT1
TYCO_1759576-1ME@
VBUS1
D-2
D+3
GND4
GND5
A+6
A-7
GND8
B-9
B+10
GND11
GND12
GND13
GND14
GND15
C622470P_0402_50V7K
1
2
G
DS
Q32 AO3413_SOT23-3
BT@
2
13
C432470P_0402_50V7K
1
2
JUSB2
SUYIN_020173MR004S558ZL
ME@
11
22
33
44
GND5
GND6
GND7
GND8
C6101000P_0402_50V7K@
1
2
JUSB1
ACES_85205-04001ME@
11
22
33
G55
G66
44
C3530.1U_0402_16V4Z
BT@
1 2
+C615
150U_B2_6.3VM_R35M
1
2
U19
APL3510BKI_SO8
GND1
IN2
OC#5
OUT6
OUT8
IN3
EN4
OUT7
C621 0.1U_0402_16V4Z
12
C237470P_0402_50V7K
1
2
C3540.1U_0402_16V4Z
BT@
1
2
JP7
ACES_87213-0600GME@
11
22
33
44
55
66
G17
G28
D7
PJD
LC
05
_S
OT
23
-3
@
231
Q29DTC124EKAT146_SC59-3BT@
IN2
OU
T1
GN
D3
C6230.01U_0402_16V7K ESATA@
12
C6240.01U_0402_16V7KESATA@
12
C4291000P_0402_50V7K@
1
2
ON/OFF#
51_ON#
EC_ON
NOVO_BTN# ON/OFFBTN#
51_ON#NOVO_BTN#
NOVO#
ON/OFFBTN#
PM_BTN#
I2C_INT_R
NOVO_BTN#ON/OFFBTN#
PM_BTN#
PM_BTN#
MIC_JD
PLUG_IN
USB20_P5
EXT_MIC_L
HP_OUTR
USB20_N5
EXT_MIC_R
HP_OUTL
EC_ON<34>
ON/OFF# <34>
51_ON# <40>
51_ON#<40>
NOVO#<34>
I2C_INT<34>ESB_DAT<34>ESB_CLK<34>
CAPS_LED#<34>
PM_BTN#<34>
NUM_LED#<34>
RST#<34>
MIC_JD<33>
PLUG_IN<33>
USB20_P5<16>
EXT_MIC_L<33>
HP_OUTR<33>
USB20_N5<16>
EXT_MIC_R<33>
HP_OUTL<33>
+3VALW
+3VALW
+5VS
+3VS
+5VS
+3VS
+3VALW
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
Audio Jack & SW connector
Custom
38 51Thursday, October 29, 2009
2008/03/25 2008/04/Compal Electronics,Ltd.
LA-5752P
TOP Side
Bottom Side
ON/OFF switch
Power Button
Cap Sensor Board Conn. 6pin
EMI REQUEST 1ST = SCA00000E00
2ST = SCA00000R00
Card Reader/Audio Jack SB CONN
ENE SB3534Power Bottom Board Conn. 8pin
R1 0_0402_5%
1 2
D20
PJSOT24C 3P C/A SOT-23@
231
D19
PJSOT24C 3P C/A SOT-23@
231
R272100K_0402_5%
12
C133P_0402_50V8J
@
1
2
R296100K_0402_5%
12
R603
100K_0402_1%
12
R2 0_0402_5%
1 2
JP3
ACES_85201-08051
ME@
GND9
GND10
11
22
33
44
55
66
77
88
D13
DAN202UT106_SC70-3
2
31
R3 0_0402_5%1 2
JP8
ACES_85201-1205N
ME@
11
22
33
44
55
66
77
88
99
1010
1111
1212GND 13
GND 14
SW1
SMT1-05_4P
@
3
2
1
4
56
G
D
SQ282N7002_SOT23-3
2
13
J5
SHORT PADS
1 2
D14
DAN202UT106_SC70-3
2
31
JP1
ACES_85201-08051
ME@
GND9GND10
1122334455667788
R302
10K_0402_5%
12
C233P_0402_50V8J
@
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SUSPSUSP
SUSP
SUSPSUSP
SYSON# SUSP SUSPSUSP
SUSP
1.5VS_GATE5VS_GATE
SUSP
SUSPSYSON#
SYSON
5VS_GATE_R
SUSP<8,44,45>
SUSP#<16,28,34,42,44,46> SYSON<28,34,44>
+5VALW +3VALW
+1.5V
+3VS
+1.5VS
B+
+5VS
+1.5V +VCCP+1.8VS +0.75VS
B+
+1.05VS
+5VALWRTCVREF+5VALW
B+
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
DC Interface
Custom
39 51Thursday, October 29, 2009
2006/08/18 2007/8/18
Compal Electronics, Inc.
LA-5752P
+3VALW TO +3VS+5VALW TO +5VS +1.5V to +1.5VS
For Intel S3 Power Reduction.
C2780.1U_0603_25V7K
1
2
C3631U_0603_10V4Z
1
2
U10
SI4800BDY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
R143470_0603_5%@
12
U4
SI4800BDY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
G
D
S
Q202N7002_SOT23
2
13
G
D
S Q402N7002_SOT23
2
13
C38910U_0805_10V4Z
1
2
R5100K_0402_5%
@
12
R142470_0603_5%@
12
R6100K_0402_5%
@
12
R8947K_0402_5%
12
R22920K_0402_5%
R202
470_0603_5%@
12
Q1DTC124EKAT146_SC59-3
IN2
OU
T1
GN
D3
C12710U_0805_10V4Z
1
2
G
D
S
Q92N7002_SOT23
2
13
C1440.1U_0603_25V7K
1
2
R174470_0603_5%@
12
R314470_0603_5%@
12
R4100K_0402_5%
12
G
D
S Q352N7002_SOT23@
2
13
R312100K_0402_5%
12
R313
0_0402_5%
@12
G
D
S Q342N7002_SOT23@
2
13
R87
470_0603_5%@
12
G
D
S
Q33
2N7002_SOT23
2
13
U16
SI4800BDY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
G
D
S Q62N7002_SOT23@
2
13
G
D
S Q162N7002_SOT23@
2
13
R56822_0603_5%
12
C36210U_0805_10V4Z
1
2
C373
0.1U_0603_25V7K
DIS@1
2
C1351U_0603_10V4Z
1
2
R342470_0603_5%@
12
C27910U_0805_10V4Z
1
2
Q2DTC124EKAT146_SC59-3
@
IN2
OU
T1
GN
D3
C13410U_0805_10V4Z
1
2
C2761U_0603_10V4Z
1
2
G
D
S Q112N7002_SOT23@
2
13
C27710U_0805_10V4Z
1
2
C3610.1U_0603_25V7K
1
2
G
D
S Q152N7002_SOT23@
2
13
R228
10K_0402_5%
12
R88
0_0402_5%
@12
G
D
S Q102N7002_SOT23@
2
13
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
51ON-3
51ON-1
51ON-2
CHGRTCINRTCVREF-1
CHGRTCP
VINDE-1
VINDE-2
PACINVINDE-3
APDIN APDIN1
PR
G+
+
51_ON#<38>
ACIN <34>
PACIN <42>
ACOFF<34,42>
ACON<42>
MAINPWON<41,43>
PACIN <42>
VIN
VS
BATT+
RTCVREF
+CHGRTC
VIN
VIN
RTCVREF
VINVS
+RTCBATT
+CHGRTC
B+
RTCVREF
VL
VS
+5VALW
VIN
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
DCIN & DETECTOR
Custom
40 51Thursday, October 29, 2009
2009/01/06 2010/01/06
Compal Electronics, Inc.
3.3V
3.3V
- +
RTC Battery
DC030006J00
BATT ONLY
L-->H 7.196V 7.349V 7.505V
Precharge detector Min. typ. Max.
H-->L 6.138V 6.214V 6.056V
Precharge detector Min. typ. Max.
H-->L 13.860V 14.247V 14.621V
L-->H 14.991V 15.381V 15.782V
ACIN
L-->H 17.430V 17.901V 18.384V
Vin Detector Min. typ. Max.
H-->L 16.976V 17.262V 17.728V
PC
13
0.1
U_
04
02
_1
6V
7K
12
PC
98
0.1
U_
06
03
_2
5V
7K
12
PR
39
10
0K
_0
40
2_
1%
12
PR14168_1206_5%
12
PD13RLS4148_LL34-2
12
PC
80
.1U
_0
60
3_
25
V7
K
12
PC
97
0.0
1U
_0
40
2_
25
V7
K
12
PU8G920AT24U_SOT89-3
IN2
GND
1
OUT3
PR13647K_0402_5%
12
PC
61
00
P_
04
02
_5
0V
8J
12
PR1810K_0402_1%
1 2
PQ12
DTC115EUA_SC70-3
2
13
PR123200_0603_5%
12
PR1710K_0402_5%
12
PQ11
DTC115EUA_SC70-3
2
13
PQ4TP0610K-T1-E3_SOT23-3
2
13
PC
12
0.0
1U
_0
40
2_
25
V7
K
12
PD10RB715F_SOT323-3
2
31
PR
19
10
K_
04
02
_5
%
12
LLZ4V3B_LL34-2PD9
21
PQ26TP0610K-T1-E3_SOT23-3
2
13
PC
51
00
0P
_0
40
2_
50
V7
K
12
JDCIN4602-Q04C-09R 4P P2.5@
11
33
44
22
PQ25DTC115EUA_SC70-3
2
13
PR
22
49
9K
_0
40
2_
1%
12
PR261M_0402_1%
1 2
PD12LL4148_LL34-2
12
PD2LL4148_LL34-2
12
PR2722K_0402_1%
1 2
PC
11
10
00
P_
04
02
_5
0V
7K
12
PR1421K_1206_5%
1 2
PC
14
10
00
P_
06
03
_5
0V
7K
12
G
D
S
PQ3SSM3K7002F_SC59-3
2
13
PF17A_24VDC_429007.WRML
21
PC9110U_0603_6.3V6M
12
PR252.2M_0402_5%
12
PR122200_0603_5%
1 2
PC
70
.1U
_0
60
3_
25
V7
K
12
PU10BLM393DG_SO8
+5
-6
O7
P8
G4
PR
21
10
K_
08
05
_5
%
12
PR2010K_0402_5%
12
PR13484.5K_0402_1%
12
PR124560_0603_5%
1 2
PC160.1U_0603_25V7K
12
JRTC
MAXEL_ML1220T10@
12
PD8
RB751V-40_SOD323-2
1 2
PR311K_1206_5%
1 2
PR
23
20
5K
_0
40
2_
1%
12
PC901U_0805_25V6K
12
PR14068_1206_5%
12
PR125560_0603_5%
1 2
PC
91
00
0P
_0
40
2_
50
V7
K
12
PR1622K_0402_1%
1 2
PR381K_1206_5%
1 2
PR
13
81
00
K_
04
02
_1
%
12
PR15100K_0402_1%
12
PL2SMB3025500YA_2P
1 2
PC
40
.22
U_
06
03
_2
5V
7K
12
PR
14
31
00
K_
04
02
_1
%
12
PR
24
49
9K
_0
40
2_
1%
12
PC
99
0.0
1U
_0
40
2_
25
V7
K
12
PR
13
52
0K
_0
40
2_
1%
12
PC
10
10
0P
_0
40
2_
50
V8
J
12
PR
13
71
00
K_
04
02
_1
%
12
PU10ALM393DG_SO8
+3
-2
O1
P8
G4
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
TM-3TM-1
TM_REF1
TM-2
EC_SMDAEC_SMCA
MAINPW ON <40,43>
BATT_TEMP <34>
EC_SMB_DA1 <34>
EC_SMB_CK1 <34>
BATT+
VMB
VL
VL
VL
+3VALW
VMB2VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
BATTERY CONN / OTP
41 51Thursday, October 29, 2009
Compal Electronics, Inc.2010/01/062009/01/06
Recovery at 56 degree C
CPU thermal protection at 92 degree C
PH1 under CPU botten side :
A/D
PR8713.7K_0402_1%
1 2
PR8347K_0402_1%
1 2
PU4ALM393DG_SO8
+3
-2
O1
P8
G4
G
D
S
PQ20SSM3K7002FU_SC70-3
2
13
PR86100K_0402_1%
12
PL3SMB3025500YA_2P
1 2
PC
62
0.0
1U
_0
40
2_
25
V7
K
12
PR
31
00
_0
40
2_
1%
12
PC
63
0.2
2U
_0
60
3_
25
V7
K
12
PH1100K_0402_1%_TSM0B104F4251RZ
12
PC1101000P_0402_50V7K
12
JBATT
TYCO_1775789-1
@
11
33
44
55
66
GND8
GND9
22
77
PR
88
15
.4K
_0
40
2_
1%
12
PR85100K_0402_1%
12
PC1090.01U_0402_25V7K
12
PR510K_0402_5%
1 2
PU4BLM393DG_SO8
+5
-6
O7
P8
G4
PR
41
00
_0
40
2_
1%
12
PF212A_65V_451012MRL
21
PR66.49K_0402_1%
1 2
PR8447K_0402_1%
12
PC
64
10
00
P_
04
02
_5
0V
7K
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
C HGC HG
ACOFF
6251_EN CSON
ACOFF
6251_VDD
6251_VDD
6251_VREF
CSOP
6251_VREF
6251_DCIN
PACIN
BST_CHG
PACIN
CSIP
DL_CHG
CS IN
LX_CHG
6251_VDDP
BST_CHGA
CELLS
SUSP#
FSTCHG
DH_CHG
6251_DCIN
CELLS
IREF<34>
FSTCHG<34>
ADP_I<34>
PACIN<40>
ACOFF<34,40>
BATT_OVP<34>
SUSP# <16,28,34,39,44,46>
FSTCHG <34>
ACON<40>
CHGVADJ<34>
BATT_SEL_EC<34>
VIN
P2P3
VS
VIN
BATT+
B+
CHG_B+
VIN
VMB2
VS
P3
6251_VDD 6251_VDD
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
42 51Thursday, October 29, 2009
Compal Electronics, Inc.2008/6/222007/6/22
CHARGER
LI-3S :13.5V----BATT-OVP=1.5012V
BATT-OVP=0.1112*VMB
Per cell=3.5V
Connect to EC A/D Pin.Vcell
CHGVADJ=(Vcell-4)/0.10627
4V
4.2V
CHGVADJ
4.35V
0V
1.882V
3.2935V
CC=0.25A~3A
IREF=0.254V~3.048V
IREF=1.016*Icharge
VCHLIM need over 95mV
DIS CP mode
Vaclim=2.39*(31.6K//514K)/((31.6K//514K)+(21K//514K))=1.425V
Iinput=(1/0.02)((0.05*Vaclim)/2.39+0.05)
where Vaclim=1.425V, Iinput=4A
UMA CP mode
Vaclim=2.39*(2.26K//514K)/((2.26K//514K)+(21K//514K))=0.239V
Iinput=(1/0.02)((0.05*Vaclim)/2.39+0.05)
where Vaclim=0.239V, Iinput=2.75A
PC1224.7U_0805_6.3V6K
12
PC
11
44
.7U
_1
20
6_
25
V6
K
12
PQ
29
SIS
41
2D
N-T
1-G
E3
_P
AK
12
12
-8
35
2
4
1
PR168100K_0402_1%@
12
PR
29
15
0K
_0
40
2_
1%
12
PR173154K_0402_1%
12
PR
13
10
0K
_0
40
2_
1%
12
PC
10
61
0U
_1
20
6_
25
V6
M
12
PD14RB751V-40TE17_SOD323-2
12
PR17221K_0402_1%
1 2
PC10.1U_0402_16V7K
1 2
PC1230.1U_0402_16V7K1
2
PC
20
.01
U_
04
02
_2
5V
7K
12
PC131 6800P_0402_25V7K
1 2
PR16120_0402_5%
1 2
PR178100K_0402_1%@
12
PC
15
47
0P
_0
60
3_
50
V8
J
12
PR710K_0402_1%
12
PR1760_0402_5%
12
PC130100P_0402_50V8J@
1 2
PQ38DTC115EUA_SC70-3
2
13
PR
30
20
0K
_0
40
2_
1%
12
PR1582.2_0402_5%
1 2
PD15RB751V-40TE17_SOD323-2
1 2
PC
10
10
.01
U_
04
02
_2
5V
7K
@
12
PD1RB715F_SOT323-3
2
31
G
D
S
PQ82N7002KW_SOT323-3
2
13
PR1634.7_0402_5%
1 2
PR13910K_0402_1%@
1 2
PQ1A2N7002KDW -2N_SOT363-6@
61
2
PQ28
DTC115EUA_SC70-3
2
13
PC
11
12
20
0P
_0
40
2_
50
V7
K
12
PC1250.1U_0603_25V7K
12
PR17115.4K_0402_1%
1 2
PQ32DTC115EUA_SC70-3 2
13
PJ11
JUMP_43X118@
11
22
PL510U_LF919AS-100M-P3_4.5A_20%
1 2
PR9340K_0402_1%@
12
PR373K_0402_1%
1 2
PQ1B2N7002KDW -2N_SOT363-6@
34
5
PR174100_0402_1%
1 2
PC1320.1U_0402_16V7K
1 2
PR1572.2_0402_5%
1 2
PR175 6.81K_0402_1%
1 2
PR15510K_0402_1%
12
PR
14
54
7K
_0
40
2_
5%
12
PR1410_0603_5%
1 2
PU1BLM358DT_SO8@
+5
-6
07
P8
G4
PC
12
10
.1U
_0
60
3_
25
V7
K
12
PC
10
31
0U
_1
20
6_
25
V6
M
12
PC
10
70
.1U
_0
60
3_
25
V7
K
12
PC1240.047U_0402_16V7K
12
G
D
SPQ5
2N7002KW_SOT323-3
2
13
PR12
100K_0402_1%
12
PR167100K_0402_1%
12
PC
11
24
.7U
_1
20
6_
25
V6
K
12
PQ27
FDS6675BZ_SO8
365
78
2
4
1
PR231.6K_0402_1%
12
PR10499K_0402_1%@
12
PC
10
00
.01
U_
04
02
_2
5V
7K
@
12
PR2847K_0402_1%
1 2
PR1770_0402_5%@
12
PC
11
34
.7U
_1
20
6_
25
V6
K
12
PQ10DTC115EUA_SC70-3
2
13
PC
12
82
.2U
_0
60
3_
6.3
V6
K
12
PQ2 TP0610K-T1-E3_SOT23-3
2
13
PR16020_0402_5%
1 2
PR1510.02_1206_1%
1
3
4
2
PQ
31
SI7
71
6A
DN
-T1
-GE
3 _
PA
K1
21
2-8
35
2
4
1
PQ34
FDS6675BZ_SO8
3 65
78
2
4
1
PR11105K_0402_1%@
12
PR
15
44
.7_
12
06
_5
%
12
PQ7
DTA144EUA_SC70-3
21
3
PC1200.1U_0603_25V7K
12
PC3
0.01U_0402_25V7K
1 2
PR15920_0402_5%
12
G
D
S
PQ92N7002KW_SOT323-3
2
13
PD3RB715F_SOT323-3
2
31
PU11
ISL6251AHAZ-T_QSOP24
EN3
CELLS4
VDD1
ACSET2
ICOMP5
VCOMP6
CHLIM9
ACPRN23
CSIP19
UGATE17
PHASE18
BOOT16
PGND13
GND12
ICM7
VREF8
VADJ11
DCIN24
CSIN20
ACLIM10
LGATE14
VDDP15
CSOP21
CSON22
PR162200K_0402_1%
1 2
PU1ALM358DT_SO8@
+3
-2
01
P8
G4
PR1520.02_1206_1%
1
3
4
2
PC
10
51
0U
_1
20
6_
25
V6
M
12
PR
8
10
0K
_0
40
2_
1%
12
PC
11
86
80
P_
06
03
_5
0V
7K
12
PR131.6K_0402_1%
12
PQ6
FDS6675BZ_SO8
3 65
78
2
4
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
2V
RE
F_
ISL
62
37
HG5
ILIM2
BST3A
UG3
EN_LDO
BST5A
SW5
LG5
BST5A-1
SW3
FB5
3/5
V_
VIN
ILM1
FB3
3/5
V_
VC
C
3/5V_EN2
BST3A-1
3/5V_EN1
2V
RE
F_
ISL
62
37
LG3
5V_SKIP
3/5
V_
TO
N
EN_LDO-1
3/5
V_
NC
3V
_S
NB
5V
_S
NB
2VREF_ISL6237
MAINPW ON <40,41>
VL
VL
ISL6237_B+
VS
+3VALWP
+5VALWP
B+
VL
2VREF_ISL6237
ISL6237_B+
VL
+3VALWP +3VALW
+5VALWP +5VALW
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1Custom
43 51Thursday, October 29, 2009
2009/01/06 2010/01/06Compal Electronics, Inc.
3VALW/5VALW
PR430_0402_5%
12
PR32
0_0402_5%
12
PR1500_0402_5%@
12
PQ33SI7716ADN-T1-GE3_PAK1212-8
35
2
4
1
PJ4JUMP_43X118@
11
22
PR3347K_0402_1%@
1 2
PC420.22U_0603_25V7K
12
PC
25
10
U_
12
06
_2
5V
6M
12
PR
36
61
.9K
_0
40
2_
1%
@
12
PC119680P_0402_50V7K
12
PR
14
6
80
6K
_0
60
3_
1%
12
PR1534.7_1206_5%
12
PC401U_0603_10V6K
1 2
PR147301K_0402_1%
12
PJ12
JUMP_43X118@
11
22
PL64.7UH_PCMC063T-4R7MN_5.5A_20%
12
PC
10
40
.04
7U
_0
40
2_
16
V7
K
12
PR1490_0402_5%
1 2
+ PC117150U_B2_6.3VM_R45M
1
2
PR510_0402_5%@
12
PC220.1U_0603_25V7K
12
PQ13SIS412DN-T1-GE3_PAK1212-83
52
4
1
PD4
RB751V-40_SOD323-2
1 2
PQ30SI7716ADN-T1-GE3_PAK1212-8
35
2
4
1
PC1020.22U_0603_25V7K
1 2
PQ14SIS412DN-T1-GE3_PAK1212-8
35
2
4
1
PR422.2_0603_5%
12
PU2ISL6237IRZ-T_QFN32_5X5
UGATE226
BOOT224
PHASE225
LGATE223
OUT230
REFIN232
TO
N2
LDOREFIN8
NC20
EN_LDO4
EN227
EN114
POK113
POK228
PVCC19
VC
C3
SKIP29
LD
O7
ILIM231
BYP9
OUT110
GN
D21
PGND22
LGATE118
PHASE116
BOOT117
UGATE115
VIN
6N
C5
REF1
FB111
ILIM112
TP33
PR
14
42
00
K_
04
02
_1
%
1
2
PC
36
22
00
P_
04
02
_5
0V
7K
12
PC
38
0.1
U_
04
02
_2
5V
6
12
PC430.1U_0603_25V7K1
2
PJ10
JUMP_43X118@
11
22
PR500_0402_5%1
2
PR34301K_0402_1%
12
PC
23
4.7
U_
08
05
_6
.3V
6K
12
PR
14
81
0K
_0
40
2_
1%
@
12
PR410_0402_5%
1 2
+PC116150U_B2_6.3VM_R45M
1
2
PC
37
0.1
U_
04
02
_2
5V
6
12
PC270.1U_0603_25V7K
12
PC
41
1U
_0
60
3_
10
V6
K
12
PR1564.7_1206_5%
12
PC115680P_0402_50V7K
12
PR44100K_0402_1%
1 2
PL44.7UH_PCMC063T-4R7MN_5.5A_20%
1 2
PD11
RB751V-40_SOD323-2
1 2
PC
39
22
00
P_
04
02
_5
0V
7K
12
PR
52
0_
04
02
_5
%
12
PC
10
80
.04
7U
_0
40
2_
16
V7
K
@
12
PC
21
33
0P
_0
40
2_
50
V7
K
12
LLZ5V1B_LL34-2
PD5
21
PR
35
0_
04
02
_5
%
12
PC
28
1U
_0
60
3_
10
V6
K
12
PC
26
10
U_
12
06
_2
5V
6M
12
PR402.2_0603_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
0.75V_IN
0.75V_REF
0.75V_EN
BST_1.5V BST_1.5V-1
LG_1.5V
1.5V_FB
1.5V_TON
1.5V_TRIP
1.5V_V5FILT
UG_1.5V
1.5V_EN
SW _1.5V
1.5
V_
SN
B
BST_VCCP BST_VCCP-1
LG_VCCP
VCCP_FB
VCCP_TON
SW _VCCP
VCCP_V5FILT
UG_VCCP
VCCP_EN
VCCP_TRIP VC
CP
_S
NB
VCCP_IN
1.5V_IN
SYSON<28,34,39>
SUSP#<16,28,34,39,42,46>
1.5V_PGOOD
SUSP<8,39,45>
1.05V_PGOOD <46>
S3_0.75V_EN<5>
+1.5V
+3VALW
+0.75VSP
+0.75VS+0.75VSP
+1.5VP +1.5V
+1.05VSP +1.05VS
+5VALW
+1.5VP
B+
+5VALW
+5VALW
+1.05VSP
B+
+5VALW
+3VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
1.5V/VCCP/0.75V
44 51Thursday, October 29, 2009
Compal Electronics, Inc.2010/01/062009/01/06
PR1900_0402_5%
1 2G
D
S PQ46SSM3K7002FU_SC70-3
2
13
PC1511U_0402_6.3V6K
12
PC
14
12
20
0P
_0
40
2_
50
V7
K
@
12
PC1834.7U_0805_6.3V6K
12
PC18147P_0402_50V8J@
1 2
PU9TPS51117RGYR_QFN14_3.5x3.5
@
VOUT3
V5FILT4
EN
_P
SV
1
TON2
VFB5
PGOOD6
DRVL9
DRVH13
LL12
GN
D7
PG
ND
8
TRIP11
V5DRV10
VB
ST
14
TP
15
PR2414.7_1206_5%
12
PU13
G2992F1U_SO8
VOUT4
NC5
GND2
VREF3
VIN1
VCNTL6
NC7
NC8
TP9
PC1784.7U_0603_6.3V6K
12
PC9447P_0402_50V8J@
1 2
PC1760.1U_0402_16V7K
12
PR1814.7_1206_5%
@
12
PR133240K_0402_1%@
1 2
PQ40SI7716ADN-T1-GE3_PAK1212-8
@
35
2
4
1
PR127100_0603_1%
@1 2+
PC
13
62
20
U_
B2
_2
.5V
M_
R1
5M
@
1
2
PC135680P_0402_50V7K
@
12
PR126100K_0402_1%
@
12
PC
13
71
0U
_0
60
3_
6.3
V6
M
@
12
PR12913.7K_0402_1%
@1 2
PL92.2UH_PCMC063T-2R2MN_8A_20%
@
1 2
PC1470.1U_0402_16V7K@
12
PC960.22U_0402_6.3V6K
@
12
PC1464.7U_0805_6.3V6K
12
PC
17
51
0U
_1
20
6_
25
V6
M
12
PR2457.15K_0402_1%
1 2
PR242100_0603_1%
1 2
PC1790.1U_0402_16V7K@
12
PR2391K_0402_1%
12
PC
17
30
.1U
_0
40
2_
25
V6
12
PC1820.1U_0603_25V7K
1 2
PJ21
JUMP_43X118@
11
22
PC
14
01
0U
_1
20
6_
25
V6
M
@
12
PJ20
JUMP_43X79@
11
22
PJ14
JUMP_43X118@
11
22
PR1312.2_0603_5%
@
1 2
PC180680P_0402_50V7K
12
PC95
0.1U_0603_25V7K
@
1 2
PC1840.1U_0402_16V7K@
12
PL131UH_PCMB103E-1R0MS_20A_20%
1 2
PR132100K_0402_1%
@
1 2
PQ41SIS412DN-T1-GE3_PAK1212-8
@
35
2
4
1PR240
1K_0402_1%
12
PR13031.6K_0402_1%
@
12
PR247240K_0402_1%
1 2
PQ48SI4686DY-T1-E3_SO8
365 7 8
2
4
1
PC924.7U_0805_6.3V6K
@
12
PU14TPS51117RGYR_QFN14_3.5x3.5
VOUT3
V5FILT4
EN
_P
SV
1
TON2
VFB5
PGOOD6
DRVL9
DRVH13
LL12
GN
D7
PG
ND
8
TRIP11
V5DRV10
VB
ST
14
TP
15
PR2480_0402_5%
1 2
PC
16
91
0U
_1
20
6_
25
V6
M
12
PR2492.2_0603_5%
1 2
PR2500_0402_5%
@
1 2
PJ16
JUMP_43X79@
11
22
PC934.7U_0603_6.3V6K
@
12
PC
17
42
20
0P
_0
40
2_
50
V7
K
12
PQ
49
TP
CA
80
28
-H_
SO
P-A
DV
AN
CE
8-5
4
1235
PJ19
JUMP_43X79@
11
22
PC14910U_0603_6.3V6M
12
PC
13
80
.1U
_0
40
2_
25
V6
@
12
PJ17JUMP_43X79@
11
22
PR24431.6K_0402_1%
1 2
PC
17
71
0U
_0
60
3_
6.3
V6
M
12
PR24630.1K_0402_1%
1
2
PR243100K_0402_1%@
1 2
PR12823.7K_0402_1%
@1 2
+
PC
17
22
20
U_
B2
_2
.5V
M_
R1
5M
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LDO_1.8V_IN
LDO_1.8V_REF
LDO_1.8V_EN
FS
ET
_V
GA
VGA_EN_2 ISEN_VGA
BST_VGA-1
VGA_IN
SW_VGA
VG
A_
CO
MP
-1
VGA_VCC
+VGA_PVCC
VG
A_
FB
VGA_COMP
UG_VGA
BST_VGA
LG_VGA
GVID1-1
GVID1-2
GVID0-1
VGA_VCC
VGA_FB-1
VG
A_
SN
B
SUSP<8,39,44>
VGA_EN<16>
GPU_VID0<19>
GPU_VID1<19>
+VGASENSE <21>
+1.8VSP
+3VS
+5VS
+3VS
+VGA_COREP
B+
+VGA_COREP +VGA_CORE
+5VALW
+1.8VS+1.8VSP
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
VGA_CORE/1.8VS/1.1VS
45 51Thursday, October 29, 2009
Compal Electronics, Inc.2010/01/062009/01/06
VFB=0.6V
Rds=4.0mΩ
GPIO6GPIO5
N11M-GE1/LP1 PR620=22.6k0
GPU_VID1GPU_VID0 VGA_CORE
0.85V
0
1
0
1
0.9V1
0.8VN11M-GE1/LP1
PC
55
0.0
1U
_0
40
2_
25
V7
K
@
12
PR
69
42
.2K
_0
40
2_
1%
12
PC511U_0402_6.3V6K
12
PR676.04K_0402_1%
12
PR490_0603_5%
12
PC
54
68
00
P_
04
02
_2
5V
7K
12
PR170
10K_0402_1%
12
PR1805.36K_0402_1%
12
PU3ISL6268CAZ-T_SSOP16
EN5
BO
OT
15
PVCC14
VIN3
VCC4
PG
OO
D2
PH
AS
E1
UG
16
LG13
PGND12
VO
10
CO
MP
6
FB
7
FS
ET
9
ISEN11
GN
D8
PC
24
10
U_
12
06
_2
5V
6M
12
PQ
39
SI4
63
4D
Y-T
1-E
3_
SO
8
4
7 865
123
PL70.88UH_PCMB103E-R88MS_20A_20%
1 2
PC502.2U_0603_6.3V6K
12
PR103100K_0402_1%
1 2
PC1270.01UF_0402_25V7K
12
G
D
SPQ22SSM3K7002FU_SC70-3
2
13
PC
35
10
U_
12
06
_2
5V
6M
12
PR633.6K_0402_1%
1 2
PC
19
10
U_
06
03
_6
.3V
6M
12
PC791U_0402_6.3V6K
12
PC
18
10
U_
06
03
_6
.3V
6M
12
PQ
36
SI4
63
4D
Y-T
1-E
3_
SO
8
4
7 865
123
PC770.1U_0402_16V7K
12
PR
16
44
.7_
12
06
_5
%
12
PR464.7_0603_5%
1 2
PR16610K_0402_1%
12
PR1791.82K_0402_1%
12
PC
12
66
80
P_
04
02
_5
0V
7K1
2 PR
70
10
0_
04
02
_5
%
12
PQ37B2N7002KDW -2N_SOT363-6
34
5
PJ2
JUMP_43X118@
11
22
PJ3
JUMP_43X79@
11
22
PR710_0402_5%
1 2
PR1051.24K_0402_1%
12
PR
47
10
K_
04
02
_5
%@
12
PR1041K_0402_1%
12
PC
20
10
U_
06
03
_6
.3V
6M
12
PC760.1U_0402_16V7K
12
PR7210K_0402_5%
12
PC522.2U_0603_6.3V6K
1 2
PQ37A2N7002KDW -2N_SOT363-6
61
2
PJ606
JUMP_43X39@
11
22
PQ35
TPCA8030-H_SOP-ADV8-5
4
5
123
PC754.7U_0805_6.3V6K
12
PR622.2K_0402_5%
1 2+
PC
13
33
30
U_
D2
_2
.5V
Y_
R9
M1
2
PR16922.6K_0402_1%
1 2
PC490.1U_0603_25V7K
1 2
PC
18
60
.1U
_0
40
2_
25
V6
12
PJ13
JUMP_43X118@
11
22
PJ8JUMP_43X39@
11
22
PC
13
4
22
P_
04
02
_5
0V
8J
12
PC7810U_0603_6.3V6M
12
PU6
G2992F1U_SO8
VOUT4
NC5
GND2
VREF3
VIN1
VCNTL6
NC7
NC8
TP9
PR
68
22
.1K
_0
40
2_
1%
12
PC
18
52
20
0P
_0
40
2_
50
V7
K
12
PR482.2_0603_5%
1 2
+
PC
17
33
0U
_D
2_
2.5
VY
_R
9M1
2
PR16510K_0402_5%
12
PC1290.01UF_0402_25V7K
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VTT_COMP
UG_VTT
VTT_BOOT
VTT_EN-1
VTT_VCC
LG_VTT
VTT_ISENVTT_SNB
VTT_BOOT-1
VTT_B+
VT
T_
FS
ET
VT
T_
CO
MP
-1
SW_VTT
VTT_VCC
VTT_PVCC
VT
T_
FB
1.1
VS
_P
GO
OD
VTT_FB-1
1.05V_PGOOD<44>
VTT_SENSE <8>
VCCP_POK<5>
SUSP#<16,28,34,39,42,44>
VTT_SELECT<8>
B+
+1.1V_VCCPP
+5VALW
+1.1V_VCCPP +VCCP
+5VS
+1.1V_VCCPP +1.05VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
+1.1VS_VTT
Custom
46 51Thursday, October 29, 2009
2009/01/06 2010/01/06
Compal Electronics, Inc.
Rds=4.0mΩ
VFB=0.6V
H_VTTVID1= Low, 1.1VH_VTTVID1= High, 1.05V
PQ
21
TP
CA
80
28
-H_
SO
P-A
DV
AN
CE
8-5
4
1235
PQ
23
TP
CA
80
28
-H_
SO
P-A
DV
AN
CE
8-5
4
1235
PR1084.7_0603_5%
1 2
PC820.01U_0402_25V7K
@
12
PU7ISL6268CAZ-T_SSOP16
EN5
BO
OT
15
PVCC14
VIN3
VCC4
PG
OO
D2
PH
AS
E1
UG
16
LG13
PGND12
VO
10
CO
MP
6
FB
7
FS
ET
9
ISEN11
GN
D8
PR1060_0603_5%
12
PC870.1U_0402_16V7K@
12
PJ1
JUMP_43X118@
11
22
PC812.2U_0603_6.3V6K
1 2
PR1074.7_1206_5%
12
PR
11
82
2.1
K_
04
02
_1
%
12
PR1170_0402_5%@
1 2
PR1160_0402_5%
1 2
PC
18
80
.1U
_0
40
2_
25
V6
12
PR1201.58K_0402_1%
1 2
PR
11
34
2.2
K_
04
02
_1
%
12
PJ7
JUMP_43X118@
11
22
PQ24
TPCA8030-H_SOP-ADV8-5
4
5
123
PC
18
72
20
0P
_0
40
2_
50
V7
K
12
PJ9
JUMP_43X118@
11
22
PR1110_0402_5%
12
PR1140_0402_5%
1 2
PC862.2U_0603_6.3V6K
12
PR12135.7K_0402_1%
1 2
PR1093K_0402_1%
1 2P
C8
96
80
0P
_0
40
2_
25
V7
K
12
PC
85
10
U_
12
06
_2
5V
6M
12
PC840.1U_0603_25V7K
1 2
PL80.56UH_MMD-10CZ-R56M-M1_19A_20%
1 2
PJ15
JUMP_43X118@
11
22
PC801000P_0603_50V7K
12
PR1191.96K_0402_1%
12
+
PC
74
33
0U
_D
2E
_2
.5V
M
@
1
2
+
PC
13
93
30
U_
D2
E_
2.5
VM1
2
PR1122.2_0603_5%
1 2
PR
11
51
K_
04
02
_5
%
12
PC
83
10
U_
12
06
_2
5V
6M
12
PR110
10_0402_5%
12
PC
88
22
P_
04
02
_5
0V
8J
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ISUM-2
ISUM-
GFX_FB-1GFX_SN
GFX_FB-2
ISUM+
ISUM+
LG_GFX
LX_GFX
62
88
1_
VID
0
62
88
1_
VR
_O
N
62
88
1_
DP
RS
LP
VR
BST_GFX BST_GFX1
ISUM-3
62
88
1_
VID
1ISUM-
62
88
1_
VID
2
62
88
1_
VID
3
62
88
1_
VIN
62881_VW
62
88
1_
VID
4
62881_RBIAS
62
88
1_
VID
5
62
88
1_
VID
6
ISU
M-4
ISU
M-1
62881_COMP
62881_VDD
62881_FB
UG_GFX
62881_VCCP
GFX_B+
GFXVR_VID_0 <8>GFXVR_VID_1 <8>GFXVR_VID_2 <8>GFXVR_VID_3 <8>GFXVR_VID_4 <8>GFXVR_VID_5 <8>GFXVR_VID_6 <8>GFXVR_EN <8>
GFXVR_DPRSLPVR <8>
GFXVR_IMON <8>
VSS_AXG_SENSE <8>
VCC_AXG_SENSE<8>
VSS_AXG_SENSE<8>
GFXVR_PWRGD
GFXVR_CLKEN#
B+
+GFX_COREP
+5VALW
+5VALW
+GFX_COREP
+GFX_COREP
+GFX_COREP +GFX_CORE
Title
Size Document Number R e v
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0 .1
GFX_CORE
47 51Thursday, October 29, 2009
2009/01/06 2010/01/06Compal Electronics, Inc.
(15A,600mils ,Via NO.= 30)
PR23047K_0402_1%
@
12
PR2272.61K_0402_1%
@
1 2
PC
16
40
.22
U_
06
03
_2
5V
7K
@
12
PR96
1_0603_5%
@
12
P C60680P_0402_50V7K
@
12
P R9011K_0402_1%
@
1 2
PC
16
30
.22
U_
04
02
_6
.3V
6K
@
12
PQ47
SI4686DY-T1-E3_SO8@
365 7 8
2
4
1
PC
16
02
20
0P
_0
40
2_
50
V7
K
@
12
PC1711000P_0402_50V7K
@
12
PQ
19
TP
CA
80
28
_P
SO
8
@
35
2
4
1
PR225
0_0603_5%
@
1 2
PR2320_0402_5%
@
12
P R89
100_0402_1%@
12
PR9482.5_0402_1%
@
1 2
PR10017.8K_0402_1%
@
12
P R93
3.01K_0402_1%
@
12
PR
91
22
.6K
_0
40
2_
1%
@
12
PJ18
JUMP_43X118@
11
22
P C650.1U_0402_16V7K
@
1 2
PC
61
10
U_
12
06
_2
5V
6M
@
12
PL120.56UH_MMD-10CZ-R56M-M1_19A_20%
@
1 2
PR10210_0402_5%
@
1 2
PR2350_0402_5%
@
12
PC
16
10
.1U
_0
40
2_
25
V6
@
12
PC1651U_0603_10V6K
@
12
PC700.068U_0402_10V6K
@
1 2
P R950_0603_5%
@
12
PR2360_0402_5%
@
12
PJ5
JUMP_43X118@
11
22
+
PC158
33
0U
_D
2_
2.5
VY
_R
9M
@
1
2
PC73150P_0402_50V8J
@
12
PR2370_0402_5%
@
12
P C71100P_0402_50V8J
@
1 2
PR2340_0402_5%
@
12
P R81
0_0402_5%
@
12
P R99825K_0402_1%
@
1 2
+
P C67
33
0U
_D
2_
2.5
VY
_R
9M
@
1
2
P R988.06K_0402_1%
@
12
PR2290_0402_5%
@
12
P R802.2_1206_5%
@
12
PR10110_0402_5%
@
1 2
PR2240_0402_5%@
1 2
PC17022P_0402_50V8J
@
1 2
PH410KB_0603_5%_ERTJ1VR103J
@
1 2
PC167330P_0402_50V7K
@
1 2P
C5
91
0U
_1
20
6_
25
V6
M
@
12
PR
23
81
0K
_0
40
2_
1%
@
12
P C69
180P_0402_50V8J@12
PR
97
1.9
1K
_0
40
2_
1%
@
12
PC1620.22U_0603_16V7K
@
1 2
PC72330P_0402_50V7K
@
12
PR2330_0402_5%
@
12
P C680.01U_0402_25V7K
@
1 2
P C662.2U_0603_6.3V6K
@
12
PR22610K_0402_1%
@ 12
P J6
JUMP_43X118@
11
22
PR823.65K_0402_1%
@
12
PC1661000P_0402_50V7K
@
1 2
PR2310_0402_5%
@
12
P U5ISL62881HRZ-T_QFN28_4X4
@
FB6
CLK_EN#1
PGOOD2
ISU
M+
10
ISU
M9
VID
525
VID121
LGATE18
VSSP17
VID
222
UGATE15
RT
N8
RBIAS3
VW4
COMP5
VID020
VCCP19
VID
323
VID
424
VID
626
VR
_O
N27
DP
RS
LP
VR
28
VSEN7
VD
D11
VIN
12
IMO
N13
BO
OT
14
PHASE16
AG
ND
29
P R922.2_0603_5%
@
1 2
PR2280_0402_5%
@
12
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
H H
G G
F F
E E
D D
C C
B B
A A
CP
U_
SN
B1
H_
VID
0
H_
VID
2
H_
VID
3
H_
VID
4
H_
VID
5
H_
VID
6
H_
VID
1
VID
0
VID
1
VID
2
VID
3
VID
4
VID
5
VID
6
BOOT_CPU2 BOOT_CPU2-1
CP
U_
SN
B2
BOOT_CPU1 BOOT_CPU1-1
PHASE_CPU2
LGATE_CPU2
UGATE_CPU2
UGATE_CPU2
PHASE_CPU1
LGATE_CPU1
UGATE_CPU1
UGATE_CPU1
CPU_SN-1
CP
U_
CS
N1
CP
U_
CS
P1
CPU_CSP1-1
CPU_SN-2
CP
U_
CS
N2
CP
U_
CS
P2
CPU_CSP2-1
CP
U_
OS
RS
EL
CP
U_
PG
OO
D
CP
U_
VR
_O
N
CP
U_
TO
NS
EL
CP
U_
VR
EF
CP
U_
VR
EF
CP
U_
DR
OO
P
CP
U_
CL
K_
EN
#
CP
U_
ISL
EW
CPU_MODE
PS
I#C
PU
_P
SI#
CP
U_
DP
RS
LP
VR
PR
OC
_D
PR
SL
PV
R
CP
U_
IMO
N
CP
U_
VR
_T
T#
CPU_THERM
C PU_CSP1
CP U_CSN1
CP U_CSN2
C PU_CSP2
CPU_CSP1-2
CPU_CSN1-1
CPU_CSN2-1
CPU_CSP2-2
C PU_VSNS
CPU _GNDSNS
H _VID0
H _VID1
H _VID2
H _VID6
H _VID3
H _VID0
H _VID1
H _VID2
H _VID6
H _VID3
P ROC_DPRSLPVR
H _VID4
P ROC_DPRSLPVR
H _VID5
H _VID4
H _VID5
CP
U_
TR
IPS
EL
VR _ON<34>V
CC
SE
NS
E
<8>
VS
SS
EN
SE
<8>
IMV
P_
IMO
N
<8>
H_
VID
0
<8>
H_
VID
1
<8>
H_
VID
2
<8>
H_
VID
3
<8>
H_
VID
4
<8>
H_
VID
5
<8>
H_
VID
6
<8>
VGATE<15>
CLK_EN#<12>
PS
I#
<8>
PR
OC
_D
PR
SL
PV
R
<8>
H_
PR
OC
HO
T#
<5
,34
>
VS
SS
EN
SE
<8>
CPU_B+
+5VS
+5VS
B+
CPU_B+
+5VS
+ CPU_CORE
+5VS
+3VS
+5
VS
+V
CC
P
+ VCCP
+3
VS
Title
Size Document Number R e v
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0 .1
CPU_CORE
48 51Thursday, October 29, 2009
2009/01/06 2010/01/06Compal Electronics, Inc.
Clarkfield:VID(0-5):001101
Auburndale:VID(0-5):001110
P R58 1K_0402_5%12
PR
21
50
_0
40
2_
5%
12
+
PC
16
81
00
U_
25
V_
M
1
2
PC156100P_0402_50V8J
12
PR
21
85
.11
K_
04
02
_1
%
12
P C53 10U_0603_6.3V6M1 2
PR
21
20
_0
40
2_
5%
@
12 P
R4
51
2.4
K_
04
02
_1
%
12
PR751K_0402_5%@
1 2
PL110.36UH_PCMC104T-R36MN1R17_30A_20%
1
3
4
2
PC
29
10
U_
12
06
_2
5V
6M
12
PR
79
0_
04
02
_5
%
12
PR18328.7K_0402_1%
1 2
PC1590.033U_0402_16V7K
1 2
PR192 1K_0402_5%12P R60 1K_0402_5%@12
PC153100P_0402_50V8J
12
PR
21
40
_0
40
2_
5%
12
PC
58
68
P_
04
02
_5
0V
8J
12
PR
19
60
_0
40
2_
5%
12
PR
66
0_
04
02
_5
%
12
PC152 33P_0402_50V8J1 2
PL100.36UH_PCMC104T-R36MN1R17_30A_20%
1
3
4
2
+
PC
14
81
00
U_
25
V_
M
1
2
PQ18
TPCA8030-H_SOP-ADV8-5
@
4
5
123
PR
21
00
_0
40
2_
5%
12
PR
18
61
7.8
K_
04
02
_1
%
12
PR
19
80
_0
40
2_
5%
12
PQ15
TPCA8030-H_SOP-ADV8-5
4
5
123
PC1450.22U_0603_10V7K
1 2
P R61 1K_0402_5%@12 PR191 1K_0402_5%12
PC
30
10
U_
12
06
_2
5V
6M
12
PR
21
66
8_
04
02
_5
%1
2
P R56 1K_0402_5%@12
P C570.22U_0603_10V7K
1 2
PC
45
22
00
P_
04
02
_5
0V
7K
12
PR204 1K_0402_5%12
PC
47
22
00
P_
04
02
_5
0V
7K
12
PR
20
50
_0
40
2_
5%
12
PC
44
0.2
2U
_0
40
2_
6.3
V6
K
12
P R55 1K_0402_5%@12
PC
34
10
U_
12
06
_2
5V
6M
12
PR
20
70
_0
40
2_
5%
12
PR201 1K_0402_5%@12
PC155 33P_0402_50V8J1 2
PR
19
70
_0
40
2_
5%
@
12
PR211 1K_0402_5%@12
PR187 2.2_0603_5%12
PC
31
10
U_
12
06
_2
5V
6M
12
P R771.91K_0402_1%
12
PR202 1K_0402_5%@12
PR203 1K_0402_5%12
P R57 1K_0402_5%12
PR
53
20
K_
04
02
_1
%1
2
PC1440.22U_0603_10V7K
1 2
PC154 33P_0402_50V8J1 2
PC142680P_0402_50V7K
12
PR
20
80
_0
40
2_
5%
12
PQ17
TPCA8030-H_SOP-ADV8-5
4
5
123
PH3100K_0402_1%_TSM0B104F4251RZ
1 2
PC157 33P_0402_50V8J1 2
PC143680P_0402_50V7K
12
PR22269.8K_0402_1%
1 2
PR
21
30
_0
40
2_
5%
12
PR220 470_0402_1%12
PR18828.7K_0402_1%
1 2
PR
19
40
_0
40
2_
5%
12
PH2100K_0402_1%_TSM0B104F4251RZ
1 2
PQ42
TPCA8028-H_SOP-ADVANCE8-5
@
4
1235
PR
78
0_
04
02
_5
%@
12
PR189 2.2_0603_5%1 2
PQ44
TPCA8028-H_SOP-ADVANCE8-5
4
1235
PR221 470_0402_1%12
PR223 470_0402_1%12
PR1844.7_1206_5%
12
P R54 10K_0402_5%12
PR
19
50
_0
40
2_
5%
12
P R6469.8K_0402_1%
1 2
P R59 1K_0402_5%12
PC
48
0.1
U_
04
02
_2
5V
6
12
PR
21
70
_0
40
2_
5%
12
PR
18
21
7.8
K_
04
02
_1
%
12
PR761K_0402_5%
12
PQ43
TPCA8028-H_SOP-ADVANCE8-5
4
1235
PR199 0_0402_5%1 2
P C560.033U_0402_16V7K
1 2
PR
65
0_
04
02
_5
%
12
PR193 1K_0402_5%@12
PC
46
0.1
U_
04
02
_2
5V
6
12
PQ16
TPCA8030-H_SOP-ADV8-5
@
4
5
123
P D61SS355_SOD323-2
1 2
PD7
1SS355_SOD323-2
12
PR200 0_0402_5%1 2
PC
33
10
U_
12
06
_2
5V
6M
12
PC1502.2U_0603_6.3V6K
1 2
PR
20
60
_0
40
2_
5%
12
PR219 470_0402_1%12
PR209 0_0402_5%1 2
PR
74
24
9K
_0
40
2_
1%
12
PC
32
10
U_
12
06
_2
5V
6M
12
TPS51621RHAR_QFN40_6X6P U12
MODE1
GND2
CSP23
CSN24
CSN15
CSP16
GNDSNS7
VSNS8
THERM9
VR_TT#10
IMO
N11
DP
RS
LP
VR
12
PS
I#13
VID
614
VID
515
VID
416
VID
317
VID
218
VID
119
VID
020
DRVH121
VBST122
LL123
DRVL124
PGND25
V5IN26
DRVL227
LL228
VBST229
DRVH230T
RIP
SE
L31
OS
RS
EL
32
PG
OO
D33
CLK
_E
N#
34
VR
_O
N35
TO
NS
EL
36
ISLE
W37
V5F
ILT
38
DR
OO
P39
VR
EF
40
GN
D41
P R73 0_0402_5%1 2
PL1HCB4532KF-800T90_1812
1 2
PQ45
TPCA8028-H_SOP-ADVANCE8-5
@
4
1235
PR1854.7_1206_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
<Doc> 0.1
PIR (PWR)
Custom
49 51Thursday, October 29, 2009
2009/01/06 2009/01/06
Compal Electronics, Inc.
Version change list (P.I.R. List) Page 1 of 2 for PWR
Reason for change PG# Modify List Date PhaseItem
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17 20081022
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o f
LA-5752P 0.3
HW PIRB
50 51Thursday, October 29, 2009
NO DATE PAGE MODIFICATION LIST PURPOSE-------------------------------------------------------------------------------------------------------------
Compal Electronics, Inc.
EVT TO DVT
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o f
LA-5751 0.3
HW PIRB
51 51Thursday, October 29, 2009
Compal Electronics, Inc.