Primitive Converters Interconnection of Switches & Energy...

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Interconnectionof

Switches & Energy Storage Elements

Switched Mode Power ConversionPrimitive Converters

Interconnectionof

Switches & Energy Storage Elements

Interconnectionof

Switches & Energy Storage Elementsto

Source and Load

VG IG R

Interconnection Rules

Sources may not be OverloadedVoltage Sources are not to be ShortedCurrent Sources are not to be Opened

Conservation of EnergyInductor Currents are not to be Interrupted

Capacitor Voltages are not to be Shorted

Voltage sources may not be connectedacross PT1 or PT2

No Short Circuit of Voltage SourcesCapacitors may not be connected across

PT1 or PT2No Disruption of Energy on the Capacitor

Current sources may not be connectedin series with T1 or T2

No Open Circuit of Current SourcesInductor may not be connected

in series with T1 or T2No Disruption of Energy on the Inductor

Acceptable Switch-Storage Cells

Two possible switch+storage cellsThese are dual of each other

Primitive Voltage to Current Converter

LoadIO

IG PT1

Input average quanities: VG and IGOutput average quantities: IO and VO

Strategy of Operation & Control

LoadIO

IG PT1

Constant Switching PeriodT1P ON Time TON ; T2P OFF Time TOFF

TON + TOFF = TS

Primitive Current to Voltage Converter

Input average quanities: IG and VGOutput average quantities: VO and IO

LoadIO

IG PT1

Ideal Performance Measures

LoadIO

IG PT1

First Performance MeasureForward Voltage Conversion Ratio

LoadIO

IG PT1

Performance MeasuresForward Voltage Conversion RatioReverse Current Conversion Ratio

Forward Voltage Conversion Ratio

0 TSTON

Average voltage across inductor in one cycle is zero

Forward Voltage Conversion Ratio

0 TON TS

( ) ( )G O ON O S ONV V T V T T 0− − − =

V T DV T

Reverse Current Transfer Ratio

Reverse Current Conversion Ratio

iG(t) IO

0 TSTON

O ON G SI T I T 0− =

I T DI T= =

Efficiency of Ideal Converter is Unity

LoadIO

IG PT1

O G ON

V I T DV I T

Non-Ideality in the Converter Current IO

LoadIO

IG PT1

Ripple Current in the Inductor

0 TSTON

( ) ( )O OO S ON S

V VI T T 1 D TL L

Δ = − = −

Normalised Ripple Curent

( ) ( )( )

1 D TI V 1 D TI I L L / R

−Δ= − =

0 TSTON

Condition for Ripple Curent to be Low

( )( )

1 D TI 1I L / R

−Δ=

Switching Period << Circuit Time Constant

Non-Ideality in the Switches – Conduction Drop

LoadIO

IG PT1

Switches are Realised by Real Devices

T1P Drop is VT; T2P Drop is VD

-VDTSTON

VPVG-VT

Inductor ON State Voltage is VG-VT-VOInductor OFF State Voltage is -VD-VO

Volt-Sec Balance on the Inductor

( ) ( )( )G T O ON D O S ONV V V T V V T T 0− − − + − =

-VDTSTON

VPVG-VT

Forward Voltage Transfer Ratio

( )G T ON D OFF O SV V T V T V T− − =

O GG G

V (1 D)VV DV 1V DV

⎛ ⎞−= − −⎜ ⎟

⎝ ⎠

iG(t) IO

0 TSTON

I T DI T= =

Switch Non-ideality is Series Non-ideality

iG(t) IO

0 TSTON

I T DI T= =

Switch Non-idealities have no Effecton Current Ratio

Efficiency

iG(t)G ON

I T DI T= =

IOO T D

V V (1 D)VD 1V V DV

⎛ ⎞−= − −⎜ ⎟

⎝ ⎠

O O T D

G G G G

V I V (1 D)V1V I V DV

⎛ ⎞−η = = − −⎜ ⎟

⎝ ⎠

Non-Ideality in the Source & Inductor

LoadIO

IG PT1

Source & Inductor Have Internal Resistances

Source Resistance is RSInductor Resistance is Rl

Volt-Sec Balance on the Inductor

-IORlTSTON

VG-IO(RS+Rl)

( )( ) ( )( )G O S l O ON O l O S ONV I R R V T I R V T T 0− + − − + − =

Forward Voltage Transfer Ratio

( )( ) ( )( )G O S l O ON O l O S ONV I R R V T I R V T T 0− + − − + − =

V RDV R DR R

⎛ ⎞= ⎜ ⎟+ +⎝ ⎠

V 1D DR RV 1R R

⎛ ⎞⎜ ⎟

= ⎜ ⎟⎜ ⎟+ +⎝ ⎠

iG(t) IO

0 TSTON

I T DI T= =

iG(t) PT1

Efficiency

iG(t)G ON

I T DI T= =

S lG G

V I 1DR RV I 1

⎛ ⎞⎜ ⎟

η = = ⎜ ⎟⎜ ⎟+ +⎝ ⎠

V RDV R DR R

⎛ ⎞= ⎜ ⎟+ +⎝ ⎠

Efficiency with Switch/Source/Inductor Drops

O O G G

S lG G

V (1 D)V1V I V DV

DR RV I 1R R

−⎛ ⎞− −⎜ ⎟η = = ⎜ ⎟

⎜ ⎟+ +⎜ ⎟⎝ ⎠

Guidelines for Good Efficiency

O O G G

S lG G

V (1 D)V1V I V DV

DR RV I 1R R

−⎛ ⎞− −⎜ ⎟η = = ⎜ ⎟

⎜ ⎟+ +⎜ ⎟⎝ ⎠

T G D O

V V ; V V

R R ; R R

Non-ideality Related to Output Voltage

Output Voltage Ripple is a Function of the Load

LoadIO

Evaluation of the Output Voltage Ripple

Capacitor Supported Load is Common

VG VOIO

Inductor Current & Output Voltage Ripple

Output Voltage Ripple is ΔVO

VG VOIO+ΔIO

O OV V+ Δ

0 TSTON

Charge causing voltage ripple

( )OO S

VI 1 D TL

Δ = −

0 TSTON

Charge causing voltage ripple

( )OO S

VI 1 D TL

Δ = −

I T1 1V2 2 2 CΔ

( )OO S

VI 1 D TL

Δ = −

2O S S O S

OV (1 D)T T V (1 D)T1 1V

2L 2 2 C 8LC− −

Δ = =

V (1 D)TV 8LCΔ −

Guidelines for Low Output Ripple

V (1 D)TV 8LCΔ −

Switching Period << Natural Frequency

Summary of Steady State Performance

Voltage Gain VO/VG

Current Gain IO/IG

Current Ripple ΔIO/IO

Voltage Ripple ΔVO/VO

Switch Non-idealitySource Non-idealityStorage Non-ideality

Efficiency

Summary of Steady State Performance

Inductor Volt-sec Balance: VO/VG

Current Averaging: IO/IG

Inductor Volt-sec in Sub-period: ΔIO/IO

Capacitor Charge in Sub-period: ΔVO/VO

Inductor Volt-sec Balance with Non-ideality: η

Switched Mode Power ConversionTransistor Amplifiers

Transistor Amplifier Variants

CIB βIB

Buck, Boost & Buck-Boost Variants

Primitive Converters Interconnection of Switches & Energy...

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