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Programmable State-Variable Filter Design For a
Feedback Systems Web-Based Laboratory
byRayal Johnson
February 17, 2004
Advanced Undergraduate Project
Massachusetts Institute of Technology
Department of Electrical Engineering and Computer Science
Supervisor: Dr. Kent Lundberg
Abstract
This document discusses the first installation of a weblab for a feedback systems class. A pro-grammable state-variable filter accessible through the web is designed and analyzed. The filtersparameters such as the natural frequency and damping ratio are controlled through a web client
and the effect of each parameter is analyzed and documented.
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Contents
1 Introduction 3
2 State Variable Filter: Theory 5
2.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52.2 Integrator Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52.3 Low-Pass Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82.4 Band-Pass Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92.5 High-Pass Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3 State Variable Filter: Implementation 11
3.1 Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113.1.1 Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113.1.2 DAC-Filter Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143.1.3 Computer-DAC Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.2 Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153.2.1 Microcontroller Interface: PIC Program . . . . . . . . . . . . . . . . . . . . . 153.2.2 PHP Web Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4 Measurements 18
5 Future Work 20
6 Conclusion 21
A PIC16F628 Assembly Code 22
B PHP Code 25
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1 Introduction
The programmable state-variable filter is the first part of a internet laboratory, also known as aweblab, for 6.302 (Feedback Systems). The weblab allows students access to real systems throughthe web much like the one used for 6.012 (Microelectronic Devices). The weblab allows students toperform experiments from their computer and eliminates the need to go to lab.
The types of experiments that are performed are frequency responses. To fully understandthe filter responses, these measurements must be made while changing filter characteristics suchas natural frequencies and damping ratio/quality factor. The natural frequencies determine the
bandwith of the filter and the damping ratio/quality factor determine how much peaking occursat the corner frequency. In order to change these filter characteristics from a remote terminal, thecircuit representation of the filter needs to be adjusted by the server to which it is connected.
In order for the remote terminal to interface with the server, it must communicate with the serverthrough a scripting language. The server chosen for this project is the Apache Webserver, which isa free open source server that is easily configurable and extendable. The scripting language usedis the PHP scripting language, another open-source product. It is used because Apache supports
it and it has a powerful set a functions to create almost any type of application. One of thoseapplications is the full control of the servers RS232 serial port which will be used in this projectto both send data to the circuit and to receive data from the circuit.
The overall weblab system consists of the PC/Server controlled by the remote client through thePHP scripting language, a level shifter, a microcontroller to interpret the server signals and setfilter characteristics, and the filter itself. A system level block diagram of the weblab system isshown in Figure 1. The DACs are latch free, so as long as the DAC select bits are set at the same
time as the data bits, they will work correctly. This is great for testing the DACs since there areno timing issues associated with writing to the DACs.
The level shifter changes RS232 logic (+12 and 12 volts) from the server to TTL logic (+5 and0 volts) which can be interpreted by the PIC microcontroller. The microcontroller uses the signalsfrom the server to determine the values to be sent to each digital to analog converter (DAC) over 8bits of data. The PIC processor has two input/output ports known as PORTA and PORTB, both8 bits wide. PORTA is used to DAC selection and PORTB is used to transfer the data.
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VoltageControlFilter
8-bit busPICLevelShifter
PC/ServerDAC
DAC
DAC
VinDAC
Select
n1
n2
4
(Volp, Vobp, Vohp)
Figure 1: System Level Block Diagram of the Programmable State-Variable Filter
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+
VoVid
Ib
GM
+
+5V
RL
RB
+5V
Figure 4: Voltage Controlled Amplifier
The transconductance amplifier is slower than the operational amplifier, therefore contributingnon-negligible phase shifts correctable through compensation. 1
Transconductance vs Bias Current for Natural Frequency
0
0.002
0.004
0.006
0.008
TransconductanceG
m(
Mhos)
0 0.0001 0.0002 0.0003 0.0004 0.0005
Bias Current Ib (Amps)
Figure 5: Results ofn bias currents. kn = 15.029
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Transconductance vs Bias Current for Damping Ratio
0
5e06
1e05
1.5e05
2e05
2.5e05
3e05
TransconductanceGm(
Mhos)
0 5e07 1e06 1.5e06 2e06 2.5e06
Bias Current Ib (Amps)
Figure 6: Results ofbias currents. k= 12.928
2.3 Low-Pass Function
The state-variable low-pass filter has the system function Hlp(s).
Hlp(s) = 2n
s2 + 2ns+2n(9)
The low-pass filter contains two poles, and therefore it has a roll-off of 40dB/decade. Depending onthe relative locations of the two poles, peaking can occur. If the gain is high enough or in this case,if the natural frequencies are high enough, complex poles result and peaking occurs. A bode plot
of the filters frequency response with changing damping ratio/quality factor is shown in Figure 7.
100
80
60
40
20
0
20
Magnitude(dB)
90
45
0
Phase
(deg)
Increasingzeta
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The low-pass filter does just that, it lets low frequencies pass and attenuates frequencies higherthan its corner frequency. The corner frequency (n), where n = n1 = n2 in this bode plot is
10 radians per second (krad/s), therefore, frequencies higher than 10 rad/s are attenuated.
2.4 Band-Pass Function
The state-variable band-pass filter has the system function Hbp(s).
Hbp(s) = ns
s2 + 2ns+2n(10)
The band-pass filter exhibits the peaking seen in the frequency response of the low-pass filter. Thischaracteristic comes from the fact that the filters have the same closed loop poles.
The band-pass filters frequency response explains what it does. The band-pass filter lets a bandof frequencies around its natural frequency, n = n1 = n2 is 10 rad/s in this case to pass,and attenuates frequencies much higher or much lower than the pass band. The band-pass filtersfrequency response is shown in Figure 8.
60
50
40
30
20
10
0
10
Magnitude(dB)
101
100
101
102
103
90
45
0
45
90
Phase
(deg)
Increasingzeta
Figure 8: Bode Plot ofHbp(s) =
ns
s2
+2ns+2n with varying
2.5 High-Pass Function
The state-variable high-pass filter has the system function Hhp(s).
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120
100
80
60
40
20
0
20
Magnitude(dB
)
101
100
101
102
103
0
45
90
135
180
Phase
(deg)
Increasing
zeta
Figure 9: Bode Plot ofHhp(s) = s2
s2+2ns+2nwith varying
natural frequency, n = n1 = n2 in this case, also 10 rad/s to pass and attenuates all otherfrequencies.
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3 State Variable Filter: Implementation
3.1 Hardware3.1.1 Filter
Moving from the state-variable filter theory, the circuit implementation of the filter can besynthesized using common analog building blocks such as: integrators, gain blocks, adders andsubtractors. The circuit implementation is appended as Figure 26.
From some hand analysis, a block diagram can be developed showing exactly how the circuit
implementation is related to the block diagram shown in Figure 2. Kirchoffs current rule at theinverting input of U12 of Figure 26 gives:
ViR5
+VohpR8
+VolpR17
+VobpGMU23 = 0 (12)
AssumingR5=R17 =R8 and multiplying both sides of the equation by R8, and solving for Vohp,we get:
Vohp= (Volp+Vi+VobpGMU23R8) (13)
which represents the first adders in Figure 2. Continuing along the signal path fromVohp to Vobp,we get the equation:
Vobp= VohpGMU14C7s
(14)
which is the first integrator of the block diagram 2. Immediately apparent from this block is thevalue ofn1, which is:
n1=GMU14
C7
. (15)
The next block that is easily recognized is the feedback block from Vobp to the adder, which repre-sents the value of 2. From this circuit, we see that this value translates into:
2=GMU23R8. (16)
Continuing in the signal path from Vobp to Volp we encounter another integrator of the form:
Volp= Vobp
GMU6
C1s (17)
which gives the value ofn2, which is:
n2=GMU6C1
. (18)
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s s
Vi + GMU14 GMU6C7 C1
GMU23 R8
Vohp Vobp Volp
Figure 10: State-Variable Filter Implementation Block Diagram
The fact that the integrators have an noninverting topology is important to get negative feedbackas in the block diagram of Figure 2. The inversion of signals Volp, and Vobp of Equation 13 is whatgives the negative feedback, but since Vi is also inverted there is a phase shift of
2 from the input
to the outputs. The resulting block diagram from this analysis is shown in Figure 10.
Now that it is confirmed that this circuit matches the block diagram of Figure 2, the parametersthat determine system dynamics can be analyzed. The systems dynamics is adjustable through
the transconductance amplifiers, and the specific relationships ofn1, n2 and 2to their controlvoltages are shown below:
n1=kn(Vdd Vref1)
R6C7(19)
n2=kn(Vdd Vref2)
R7C1(20)
2=k(Vdd Vref3)R8
R18
(21)
The the last 3 equations were used to determine values for resistors and capacitors based on desiredranges ofn1, n2, and . The desired range of bothn1 and n2 is 0 to 62.832 krad/s whichcorresponds to 10kHz. The desired range for is from 0 to 2. Using the standard capacitor valueof 68nF, Vrefmax of 5 volts, and VBEof 0.6 volts, the desired value for R6 and R7 is 15 k, andthe desired value for R18 is 3.2 M.
To understand where these equations originate, it is important to take a look at the circuit in
Figure 11. This circuit is used to set the bias current for each transconductance amplifier pertainingto each system variable, i.e. n1, n2 and . To see how the output bias currentIo is related tothe reference voltage Vref, a feedback block diagram of this circuit is analyzed. The block diagramis shown in Figure 12.
The circuit in Figure 11 works through the use of two feedback loops to create a bias current
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+
Vdd
Vref
Ve
Vb
Io
Re
Figure 11: Circuit for Setting Bias Currents
major loop is provided by the operational amplifier. Using Blacks formula, the reference voltageVrefis related to the output bias current Io by Equation 22.
IoVref =
A(s)gm1+gmRe
1 + A(s)gmRe1+gmRe(22)
A(s) gm
Re
Re
__
++Vref Io
Ve Ve
Vb
Figure 12: Block Diagram for Bias Current Setting Circuit
The variablesA(s), andgmrepresent the frequency-dependent gain of the operational amplifier,and the transconductance of the bipolar junction transistor respectively. Assuming Vrefis changingslowly, the gain of the operational amplifier is at DC is 105 according to the TL082 datasheet andit is assumed that:
A( ) R 1 + R (23)
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and therefore:
Io VrefRe
(25)
One minor detail omitted when creating the block diagram of Figure 12 is that Vdd has an effecton the bias current. Vddis assumed to be a small signal ground, and therefore omitted in the blockdiagram but the large signal bias current is dependent on this value and therefore the equationthat relates Vref and Io is more correctly:
Io=Vdd Vref
Re(26)
3.1.2 DAC-Filter Interface
The bias currents that set the dynamics of the filter are set through the use of digital-to-analogconverters. Each DAC receives eight bits of data pertaining to the value of the filters characteristics,which are set by the user. The implementation of the DAC-Filter interface is shown in Figure 25.The data that is received by the DACs determines the reference voltages Vref13 derived fromEquations 19-21 which are reinterpreted here as:
Vref1= Vdd n1R6C7kn(27)
Vref2= Vdd n1R7C1kn
(28)
Vref3=Vdd 2R18kR8
(29)
Future improvements on the programmable filter should use these equations in software to convertthe users inputs to eight bit values to set the reference voltages.
3.1.3 Computer-DAC Interface
In order to use the signals from the RS232 interface, they need to be converted from RS232 logicto TTL logic. This means that the voltages need to be changed from +12 and 12 volts to 0 and+5 volts. This can done with the use of the Maxim 233 level shifter chip. The Maxim 232 takes
RS232 logic and converts it to TTL for transmitting and vice versa for receiving. The only pinsneeded in this project are the transmitted data, received data and ground. With these threepins, a serial interface between the server and the PIC microcontoller is possible. The PIC has anonboard USART, with a receive and a transmit pin, therefore, the only configuration needed canbe done in software.
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12345
6789
Rx
Tx
5
4
MAX233
+5V
6 9
PIC16F628
3
2
7
8Data
SerialPort
Figure 13: Computer-PIC Interface
values are received. The expected order is n1, n2, then . When the data is confirmed anddetermined, it is sent to its respective digital to analog converter through PORTB. A simulationof a conversation between the PIC and the server is shown in words in Table 2. This simulatedconversation shows the same process as the flowchart in Figure 14 in pseudo code. Processes donein the background implies that the PIC does not tell the server that it is sending the variable to its
corresponding DAC, the server however knows because the PIC asks for the next variable inthe set of variables. The conversation also shows what happens if an error was to occur and howit would be handled.
3.2 Software
The filters software comes in two interdependent parts. The first part is the PIC microcontrollersprogram which creates an interface between the signals coming from the server and the state-variablefilter itself. The second part is the PHP program which creates an interface between the remote
user and the Apache web server. The values operated on by the two parts of the software areinterdependent and therefore a handshaking mechanism is used. The mechanism is also usefulfor error checking, making sure that values received by the PIC are values sent by the server. Acomplete flow chart of the handshaking mechanism is shown in Figure 14.
3.2.1 Microcontroller Interface: PIC Program
In order to interpret the signals sent through the serial port by the server, a microcontroller
is used. The Microchip PIC16F628 microcontroller was used here because it is cheap, requiresfew external components, has a Reduced Instruction Set (RISC) processor and has an onboardUniversal Synchronous/Asynchronous Receiver/Transmitter module (USART) for serial interfaces.
The only external components required for immediate programming of the PIC microcontrollerare: two capacitors and a crystal oscillator These three components generate the processors clock
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Table 2: Simulated PIC-Server Conversation
Server: Here isn1PIC: Here is the n1 you sent,
Does it match?Server: Yes
PIC: Ready forn2 now (sent n1 ton1s DAC in background)Server: Here isn2
PIC: Here is the n2 you sent,Does it match?
Server: YesPIC: Ready fornow (sent n2 ton2s DAC in background)
Server: Here isPIC: Here is the you sent,
Does it match?Server: No (Assuming some error occurred)
ResynchronizingPIC: Waiting for
Server: Here isPIC: Here is the you sent,
Does it match?Server: Yes
PIC: Waiting for next 3 variables (sent tos DAC in background)
The USART allows the processor to communicate to any other device serially. This module wasthe most important part of this project because it provided a way for the system under test toreceive the instructions presented by the webserver.
The flow chart of the server/system interface is presented in Figure 14, along with the actualimplementation.
3.2.2 PHP Web Interface
As stated before, in order to set the variables for the filter, control of the servers serial port isrequired. The PHP scripting language has such capabilities. PHP along with its COM functionsallows the control the servers serial port running Windows. COM is a technology which allows thereuse of code written in any language (by any language) using a standard calling convention andhiding behind APIs the implementation details such as what machine the Component is stored on
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port, or write a Dynamic Linked-Library (.dll) file so that a windows based server can control theserial port. The PHP code that makes use of this module is shown in Appendix B. The code takes
the user values entered in a form and prepares them for transmission to the webserver and to itsserial port, which is later on interpreted by the PIC processor for setting filter values. There isa hand-shaking mechanism implemented such that PHP and the microcontroller have the samevalues presented by the user.
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From the measurements table, it is clear that the two required trends are present, but asidefrom that, the measurements seem to contain a large amount of error within the center values of.
Reasons for this could be a nonlinear GMof the transconductance amplifiers when they are usedin the overall filter, measurement errors, calibration techniques, i.e. rounding the final value to besent to the DAC to rid the data of leading decimals. This rounding function under PHP will roundboth 4.5 and 4.99 up to 5. Another problem discovered by the author was the value ofkn andk. The values determined from the test circuit and the values observed in the circuit were notconsistent. The values were adjusted on the server side until an expected response was observed,but then, this was not the case at all points of measurement as apparent from the low error inboth variables at = 0.2. There were no other problems other than calibration errors, because the
signals overall appeared to match the step reponses in Figures 15-17Some of the step response signals for each output are shown in Figures 18-23. These Figureswere taken at a time when was calibrated well by n was not.
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5 Future Work
Future work to be completed for the weblab project includes the construction of more sys-tems/filters and the implementation of a graphical user interface (GUI) to control the experimentsand to gather data from those experiments. More robust calibration techiques need also to beimplemented for this specific filter, most likely could be done in the software on the server side.
Other work includes the construction of more filters/systems for experimentation. Althougha state-variable filter is a great example of a low-pass, band-pass and high-pass filter, a moreextensive set of filters are required for feedback systems. Filters that are more specific to 6.302 are
the lag, lead, and the dominant pole compensators/filters. These filters demonstrate the benefits offeedback to achieve more desirable system dynamics than those of the open-loop or uncompensatedsystem.
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6 Conclusion
The programmable state-variable filter is a good start to the installation of a feedback systemsweblab, but the first version is not perfect and can be improved upon. For a version 2, a PIC withthe USART on a separate port from the data port should be chosen. The PIC16F628 was chosenbecause it had 2 byte sized ports, an onboard USART, and is inexpensive. The replacement shouldhave an onboard USART separate from the data ports, in addition to the requirements above.
The shared port of the PIC16F628 causes a 2-bit error because the receive pin is not available tosend data to the DACs since it is configured as an input for the USART. The receive pin therefore
either sits at either 5 volts or ground depending on the output from the level shifter, and cannotbe connected to any other potential. A diagram of the connections between the PIC and the levelshifter is shown in Figure 25. Since the receive pin cannot be used as an output, data bit DB1 isconnected to 5 volts in this case.
The 2 bit error might be acceptable for a first version of the filter but future filters/systems mayrequire higher precision for acceptable use. In its present state, the DAC is referenced to 5 voltstherefore a 2 bit error represents an error in voltage of just:
Verror = 2
2565 = 0.039mV (32)
which represents an error of 981 rad/s in n and 0.03 in .
Although the two bits of error is important, this was not the greatest of problems. The greatestproblem is the calibration of the filter which was discussed before. For although the two bit errorcaused a maximum of 5.7% error, it does not explain the large 20 to 48% errors observed in the
measurements.
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A PIC16F628 Assembly Code
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Author: Rayal Johnson ;
; Title: PIC16F628 Programmable State-Variable Filter ;
; ;
; Description: Programmable state-variable filter that ;
; interacts with a PHP web interface to receive, check ;
; and set values for the filters natural frequencies ;
; and the damping ratio/Quality factor. ;; ;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
list p=16f628,f=inhx32
#include ;Available at microchip.com
__config 0x3FE1
PC equ 0x02
CNT equ 0x20TEMP equ 0x21
org 0x0000
;Initialize porta and portb
start movlw 0x00
bcf STATUS,RP0 ;change to
bcf STATUS,RP1 ;bank 0
movwf PORTA ;clear PORTA
movlw 0x07 ;turn off comparators and
movwf CMCON ;enable pins for I/O
bsf STATUS,RP0 ;bank 1
movlw 0x20
movwf TRISA ;set RA as outputs
;TRISA always 1
;Ports are now initialized
;Set up USART
movlw b00000010 ;set Receive pin as input
f TRISB ll t t t RX i
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;bit 4 clear - asynchronous mode
;bit 2 set - high speed
;bits 7,3,1,0 - dont care
movwf TXSTA ;(address 98h)
bcf STATUS,RP0 ;bank 0
movlw b10010000 ;bit 7 set - enable serial port
;bit 6 clear - 8-bit reception
;bit 4 set - enables continuous mode
;bits 5, 3:0 - dont care
movwf RCSTA ;(address 18h)
;USART is now set up
;Programmable Filter
getvars
movlw 0x00 ;set up counter
movwf CNT ;for variables
rcvgo btfss PIR1,RCIF ;check receive data
goto rcvgo ;
movf RCREG,W ;move data temporarily
movwf TEMP ;to TEMP, to check with
movwf TXREG ;server, if data matches
check
btfss PIR1,RCIF ;check server for confirmation
goto checkbcf STATUS,Z ;
movlw 0x01 ;check data
andwf RCREG ;for 1 -> for Yes ->data matches
btfsc STATUS,Z ;
goto rcvgo ;data doesnt match, get rid of it
movf CNT,W ;if data matches,
;send to correct DAC
addwf PCgoto sndDAC1 ;match frequency and damping
goto sndDAC2 ;with the correct
goto sndDAC3 ;DAC
sndDAC1
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movwf CNT ;the next variable
goto rcvgo
sndDAC2
movlw b00000110 ;select DAC2 with PORTA
movwf PORTA ;DAC2 (omega2) selected
movf TEMP,W ;send omega2 to
movwf PORTB ;omega2-DAC
movlw 0x02 ;set up CNT for
movwf CNT ;the next variable
goto rcvgo
sndDAC3
movlw b00001000 ;select DAC3 with PORTA
movwf PORTA ;DAC3 (damping) selected
movf TEMP,W ;send damp to
movwf PORTB ;damp-DAC
movlw b00001010 ;hold values in DACs by
movwf PORTA ;setting write pins highgoto getvars ;get ready for next user
end
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B PHP Code
Serial Interface Test
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//send info, then close port
// Object Oriented Version
if (isset($svf_submit) && $svf_action == submitted){
com_set($obj, PortID, 1); //set port to COM1
com_set($obj, BaudRate, 9600); //set baud rate to 9600kbps
com_set($obj, DataBits, 8); //set data bits to 8 bits
com_set($obj, Stopbits, 1); //set stopbits to 1
$obj->Open(); //open serial port
for ($i = 0; $i WriteByte($svfvals[$i]); //Write data to serial port
if ($obj->ReadByte() == $svfvals[$i]) { //Check if PIC has same value
$obj->WriteByte($true); //if so, tell it true
array_push($svfret, $svfvals[$i]); //store correct value
} else { $obj->WriteByte($false); //if not right, tell it false$i=$i-1; } //and resynchronize
}
$obj->Close(); //close serial port
if (($svfret[0] == $svfvals[0]) && //check values to tell user
($svfret[1] == $svfvals[1]) &&
($svfret[2] == $svfvals[2])) {
$errors = No errors
;} else { $errors = There is an error
; }
echo $errors;
echo The inputs to the filter are
_1 = $svf_omega1
V(_1) = $v1
_2 = $svf_omega2
V(_2) = $v2
= $svf_damping
V() = $v3
;
echo Back;
} else { //show form
?>
6.302 Web-Based Lab v1.0 Demo
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omega2 (_2):
damping ():
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Start
Start PIC
No
1
2
3
No
No
No
No
Yes
Yes
Yes
Yes
Yes
Close Serial Port
Wait
Wait
Wait
RXREGfull?
RXREGfull?
TEMP=ithValue ?
Write ith datato serial port
Comment
$i = 0
$i = 0 -> Omega 1$i = 1 -> Omega 2$i = 2 -> Damping
$i = 2 ?
Input TEMPfrom serialport
Store RXREG inTEMPSend TEMP toserial port
RXREG
Serial PortInput to
CNT = 0
Set up Ports
Set up USART
RXREG
Serial PortInput to
Data = 1?
CNT Value
Send to Send to Send to
Omega 1 DAC Omega 2 DAC Damping DAC
to Serial Port to Serial Port
Write "1"Write "0"
$i = $i + 1
$i = $i - 1
Get Data from
HTML formConvert usersto DAC values
Open Serial Port
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0 1 2 3 4 5 6 7 8
x 10
4
0
0.5
1
1.5
LowPassn= 31416 vs.
= 0.25
= 0.5
= 0.75
= 1
= 1.25
Step Response
Time (sec)
Amp
litude
Increasing
Figure 15: Low-Pass Step Response vs.
0.2
0
0.2
0.4
0.6
0.8
1
BandPass n= 31416 vs.
= 0.25
= 0.5
= 0.75
= 1.0
=1 25
Step Response
Amplitude
Increasing
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0 1 2 3 4 5 6 7 8
x 104
0.6
0.4
0.2
0
0.2
0.4
0.6
0.8
1
HighPass n= 31416 vs.
= 0.25
=0.5
= 0.75
= 1.0
= 1.25
Step Response
Time (sec)
Amplitu
de
Increasing
Figure 17: High-Pass Step Response vs.
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Figure 19: Band-Pass Step Response (= 0.2, n= 12566 rad/s
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Figure 21: Low-Pass Step Response (= 1.0, n= 12566 rad/s
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Figure 23: High-Pass Step Response = 1.0, n= 12566 rad/s
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5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
1
2
3
4
5
6
7
8
9
J1
DB9F
1 1
Programmable State Variable Filter
A
1 1Sunday, February 08, 2004
Title
Size Document Number Rev
Date: Sheet of
5V
5V
5V
5V
-15Vdc -5V15Vdc
C5.1u
C6100u
XTAL
U42
L7905
3
1
2VIN
GNDVOUT
C2
15p
C4
15p
U41
PIC16F6285
14
15
4
16
1718
123
678910111213
Vss
VDD
OSC2/CLKOUT
MCLR
OSC1/CLKIN
RA0RA1RA2RA3RA4/TOCKI
RB0/INTRB1/RXRB2/TX
RB3RB4RB5RB6RB7
U37
MAX233
141217
518
419
8131115
16
21
320
10
V+V-V-
T1OUTT2OUT
R1INR2IN
C1+C1-C2+C2+
C2-
T1INT2IN
R1OUTR2OUT
C2-
C10
1u
U39
L7805
1
3
2VIN
GNDVOUT
C933u
CS2
CS1
DB0DB1DB2DB3DB4DB5DB6DB7
DAC A/DAC B 1WR1
DAC A/DAC B 2WR2
Figure24:SerialPort/PICinterface
34
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5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
output bits(RA)(wr2 d2 wr1 d1)
omega1 (Vref1) 1001
omega2 (Vref2) 0110
damping (Vref3) 1000
Vfreq 0100 -> For future use
1 1
Programmable State Variable Filter
A
1 1Tuesday, February 17, 2004
Title
Size Document Number Rev
Date: Sheet of
5Vdc
5Vdc
-5Vdc
-5Vdc
-5Vdc
-5Vdc
-
+
U33AAD644
3
21
-
+
U34AAD644
3
21
-
+
U35AAD644
3
21
U32
AD7528
4
16156
2
20
1413121110987
19
3
18
17
5
1
VINA
WRCSDAC A/DAC B
OUTA
OUTB
DB0DB1DB2DB3DB4DB5DB6DB7
RFB B
RFB A
VINB
VDD
DGND
AGND
U32
AD7528
4
16156
2
20
1413121110987
19
3
18
17
5
1
VINA
WRCSDAC A/DAC B
OUTA
OUTB
DB0DB1DB2DB3DB4DB5DB6DB7
RFB B
RFB A
VINB
VDD
DGND
AGND
-
+
U34AAD644
3
21
Vref3
Vref1
vfreq (for future project)
Vref2
DB0DB1DB2DB3
DB4DB5DB6DB7
DAC A/DAC B 1
CS 1
WR 1DAC A/DAC B 2
CS 2
WR2
Fig
ure25:DACswithDa
taandWriteLines
35
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5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCC
Vi
Vobp
Vohp
Volp
1 1
Programmable State Variable Filter
A
1 1
Title
Size Document Number Rev
Date: Sheet of
5Vdc
5Vdc
5Vdc
-
+
U16ATL082
3
21
-
+
U23CA3080
3
26
5
-
+
U20ATL082
3
21
R5
200k
Q2
Q2N3906
-
+
U6CA3080
3
26
5
-
+
U7LF411
3
26
C1
68n
-
+
U8LF411
3
26
-
+
U9ATL082
3
21
R8
200k
-
+
U19ATL082
3
21
Q4
Q2N3906
R18
2.0M
-
+
U24ATL082
3
21
R715k
Q1
Q2N3906
-
+
U14CA3080
3
26
5
R615k
-
+
U12LF411
3
26
C7
68n
R17
200k
-
+
U15ATL082
3
21
Vref3
Vref1 Vref2
Figure26:Filter
36