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Arsitektur KomputerPertemuan – 15

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Next Generation Network

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Multiple Processor Organization1. Single instruction, single data stream - SISD2. Single instruction, multiple data stream - SIMD3. Multiple instruction, single data stream - MISD4. Multiple instruction, multiple data stream- MIMD

SISD1. Single processor2. Single instruction stream3. Data stored in single memory4. Uni-processor

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SIMD1. Single machine instruction 2. Controls simultaneous execution3. Number of processing elements4. Lockstep basis5. Each processing element has associated data memory6. Each instruction executed on different set of data by different processors7. Vector and array processors

MISD1. Sequence of data2. Transmitted to set of processors3. Each processor executes different instruction sequence4. Never been implemented

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MIMD1. Set of processors2. Simultaneously execute different instruction sequences3. Different sets of data4. SMPs, clusters and NUMA systems

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Taxonomy of Parallel Processor Architectures

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MIMD - OverviewGeneral purpose processorsEach can process all instructions necessaryFurther classified by method of processor communication

Tightly Coupled - SMPProcessors share memoryCommunicate via that shared memorySymmetric Multiprocessor (SMP)

Share single memory or poolShared bus to access memoryMemory access time to given area of memory is approximately the same for each processor

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Tightly Coupled - NUMANonuniform memory accessAccess times to different regions of memroy may differ

Loosely Coupled - ClustersCollection of independent uniprocessors or SMPsInterconnected to form a clusterCommunication via fixed path or network connections

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Parallel Organizations - SISD

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Parallel Organizations - SIMD

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Parallel Organizations - MIMD Shared Memory

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Parallel Organizations - MIMDDistributed Memory

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Symmetric Multiprocessors A stand alone computer with the following characteristics

Two or more similar processors of comparable capacityProcessors share same memory and I/OProcessors are connected by a bus or other internal connectionMemory access time is approximately the same for each processorAll processors share access to I/O

Either through same channels or different channels giving paths to same devices

All processors can perform the same functions (hence symmetric)System controlled by integrated operating system

providing interaction between processors Interaction at job, task, file and data element levels

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Multiprogramming and Multiprocessing

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SMP Advantages1. Performance: If some work can be done in parallel 2. Availability: Since all processors can perform the same functions,

failure of a single processor does not halt the system3. Incremental growth

User can enhance performance by adding additional processors

4. Scaling5. Vendors can offer range of products based on number of

processors

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Block Diagram of Tightly Coupled Multiprocessor

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Organization ClassificationTime shared or common busMultiport memoryCentral control unit

Time Shared BusSimplest formStructure and interface similar to single processor systemFollowing features provided

Addressing - distinguish modules on bus Arbitration - any module can be temporary masterTime sharing - if one module has the bus, others must wait and may have to suspend

Now have multiple processors as well as multiple I/O modules

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Symmetric Multiprocessor Organization

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Time Share Bus - AdvantagesSimplicityFlexibilityReliability

Time Share Bus - DisadvantagePerformance limited by bus cycle timeEach processor should have local cache

Reduce number of bus accessesLeads to problems with cache coherence

Solved in hardware - see later