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® www.xilinx.com Introducing the Xilinx Spartan Series High Performance, Low Cost FPGAs with on-chip SelectRAM Memory
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®
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Introducing the Xilinx Spartan Series
High Performance, Low Cost FPGAs with on-chip SelectRAM Memory
®
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Xilinx Spartan Series FPGAsXilinx 4000
Heritage
Total Cost Management
Advanced ProcessTechnology
>80 MHz PerformanceOn-chip SelectRAMSoftware and cores
Smallest die size
Low packaging costLow test cost
®
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Xilinx Spartan Families
Complete High Volume FPGA Solution— Spartan: 5 Volt with up to 40K System Gates— Spartan-XL: 3.3 Volt with up to 40K System Gates— Xilinx Alliance and Foundation Software
Process technology leap
XC4000 heritage— Most successful FPGA architecture
No compromises— Performance, RAM, Cores & Low Price
®
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Advanced Process
Core
core-limited
I/O pads Gate count determines
die size
Spartan Die Size for High I/O packageNearly Equivalent to Gate Arrays
pad-limited
Core
I/O padsI/O count
determinesdie size
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Chip
Combines 3.3 V operation with 0.25 benefits
Spartan-XL Family Advanced 0.35m Process
Transistor gates 0.35
Allows 3.3 V supply
All other features 0.25— Small size— Low capacitance— Performance— Low power
®
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The industry’s BEST high volume FPGA solution!!
Xilinx Spartan Series Benefits
Xilinx has changed the rules!— No more compromises— Gates-only solutions are no longer required
Spartan Series delivers key ASIC requirements with all the FPGA advantages— Performance— On-chip SelectRAM Memory— Cores— Low price
®
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5 Volt -> XCS05 XCS10 XCS20 XCS30 XCS40
3.3 Volt -> XCS05XL XCS10XL XCS20XL XCS30XL XCS40XL
System Gates 2K-5K 3K-10K 7K-20K 10K-30K 13K-40K
Logic Cells 238 466 950 1368 1862
Max Logic Gates 3,000 5,000 10,000 13,000 20,000
Flip-Flops 360 616 1120 1536 2016
Max RAM bits 3,200 6,272 12,800 18,432 25,088
Max Avail. I/O 77 112 160 192 224
Performance 80MHz 80MHz 80MHz 80MHz 80MHz
Xilinx Spartan Series Devices
No Compromises: Performance, RAM, Cores, and Low Price
®
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XCS##XL-3PC84C
XCS = Spartan XL = 3.3 Voltno XL = 5 Volt
## = System Gates
Spartan Naming
Spartan part name uses “System Gates”— Includes both RAM and Logic
– High end of current published gate range— Matches ASIC industry terminology — Consistent with future FPGA families
®
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5 Volt XCS05 XCS10 XCS20 XCS30 XCS40
3.3 Volt XCS05XL XCS10XL XCS20XL XCS30XL XCS40XL
PC84 PC84
VQ100 VQ100 VQ100 VQ100
TQ144 TQ144 TQ144
CS144 (XL) CS144 (XL)
PQ208 PQ208 PQ208
PQ240 PQ240
BG256 BG256
CS280 (XL) CS280 (XL)
Spartan Series Footprint Compatibility
Highest volume ASIC plastic packages Footprint compatible in common packages
®
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Pinout Compatibility
Complete pinout compatibility within Spartan Series
Not directly pinout-compatible with XC4000/XC5200— Differences in Mode pins
Spartan PQ208 pinouts optimized to add additional I/O
®
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Perfo
rman
ce
5200 4000E Spartan Spartan-XL
E-1
E-2
-4
-3
-4
-3
XL-5
XL-4
Spartan Speed Grades
Higher speed grade = higher performance
®
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Speed, IP/Core Support
Pric
e
FPGAs without RAM
FPGAs with RAM
ASIC
Spartan Series Fills the FPGA
Price-Performance and RAM “Gap”
Spartan Series Meets ASIC Requirements:
Price and Performance
®
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0% 25% 50% 75% 100%
On-Chip Memory
Scan Test
Micro- controller
Peripherals
Analog
Many CORES require RAM (PCI, DSP, USB, etc.)
ASIC IP/CORE Usage
Source: Dataquest
Spartan Series Meets ASIC Requirements: Cores/IP & RAM
Use of Memory in ASICs grew from 65% in 1995 to 78% in 1997
®
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Unit Cost
Development Cost
Unit Cost
Development Cost
NRE
LostOpportunity
Cost of OwnershipPer Unit ($)
FPGAASIC
FPGA Cost of Ownership AdvantageNo test vectors requiredLimited or no simulationAutomatic Place and RouteRe-spins in hours not monthsFaster Time-to-MarketNo NRE
1x
2x
10x
Spartan Series Meets ASIC Requirements: Low Price
®
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Total Cost Management
Leading edge process technology— Smallest die size of any FPGA with on-chip RAM
Focused package offering— Low-power architecture allows use of highest volume
plastic packages
Streamlined test flow— Lower cost test hardware— Built-in self test features and shorter test times
Optimized manufacturing flows
®
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0
1
2
3
4
0.6 FPGA2LM
0.6 FPGA3LM
0.5 FPGA3LM
Advanced0.5 FPGA
AssemblyTestSilicon
Relative Cost
1993
1995
1996
Spartan Series addresses all aspects of cost
1997
Majority of cost is back end (assembly, test, overhead)
Spartan Series die are pad limited
Total Cost Management
®
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20K
40K
200K
100K
10K Gates Per Dollar in 1999!10K Gates Per Dollar in 1999!
$10$10$5$5
Spartan-XL
Spartan-II
Syst
em G
ates
1997 1998 1999 2000 2001 2002 2003 2004
Spartan-III
30K
10K
30K
100K
Spartan-III500K
40K
Price projections are for 250Ku, least-expensive package, slowest speed grade
Priced for High-Volume Leadership
®
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System Logic Volume Pkg Gates Cells Price*
XCS05XL PC84 5,000 238 $2.49
XCS10XL PC84 10,000 466 $3.50
XCS20XL VQ100 20,000 950 $4.25
XCS30XL VQ100 30,000 1368 $5.50
XCS40XL PQ208 40,000 1836 $7.40
Under $3 for 5,000 Gates!!*100Ku minimum volume, slowest speed grade
Spartan-XL Family Pricing
®
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Any 5 V
device
Spartan-XL FPGAAdvanced 0.35
3.3V Core3.3V I/O
5V3.3V
5V
3.3VMeets TTL
Levels
Spartan-XL Family Voltage Compatibility
Spartan-XL inputs accept 5V signals
Spartan-XL outputs drive standard TTL
100% compatible in 5 volt environment
®
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1998 1999 2000
Spartan
$395
per 5K gates
Spartan
$395
per 5K gates
Pric
e
Spartan-XL
$249
per 5K gates
Spartan-XL
$249
per 5K gates
0.35 5LM SpartanII
up to100K gates
SpartanII
up to100K gates
0.5 3LM
2.5 Volt
Higher Density + More Features
Without CompromisesPricing competitive with ASICs
High Performance
On-chip SelectRAMTM
PCI LogiCORE + AllianceCORE
3.3 Volt
5 Volt
*Prices are for 100K units, slowest speed, lowest cost package
0.25 5LM
SpartanNext Generation
up to200K gates
SpartanNext Generation
up to200K gates
1.8 Volt
0.18
Higher SpeedLower Power
Power Down Mode
FPGA Price Leadership
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Spartan CLB
Two 4-input LUTs and one 3-input LUT
Two edge-triggered FFs
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Spartan IOB
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Single-Port RAM
Synchronous write, asynchronous read
16 x 2 or 32 x 1 max per CLB
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Dual-Port RAM
One common synchronous write port
Two asynchronous read ports
16 x 1 max per CLB
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16x1
16x2
32x1
Edge-Triggered
Timing
Single-Port
Dual-Port
X X X X
X X
Supported RAM Modes
Per CLB:
®
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32 bits
A0A1A2A3A4
O12 bits
D Q
D Q
Q1
Q2
CLB CLB
D1
D2
WE CLK
D1
RAM Provides 16X the Storage of Flip-Flops
32 bits Vs. 2 bits of storage
32 x 8 shift register with RAM = 11 CLBs— Using flip-flops, takes 128 CLBs for data alone
®
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Rev.
Software Capability 2.1i
Spartan Libraries X
Spartan-XL Libraries X
Spartan Implementation X
Spartan Speed File X
Spartan-XL Implementation X
Spartan-XL Speed File Service Pack
Software Support for Spartan
®
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XC4000E Library Components Not Allowed in Spartan Designs
No Asynchronous RAM— No RAM16X1, RAM32X1
– Only RAM16(32)X1S, RAM16X1D, ROM16X1
No Edge Decoders— No DECODEx
No Wired-AND— No WANDx or WOR2AND
Mode Pins Not Usable as I/O— No MD0, MD1, MD2
®
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New Features in Spartan-XL Family
Higher speed (-4/-5) 8 flexible global low-skew buffers (BUFGLS) CLB latches Input Fast Capture Latch Output multiplexer or lookup table 3.3V supply for low power with 5V tolerance
— Programmable 3V input clamp for 3V PCI— Programmable 24 mA output drive for 5V PCI
Power-down pin Improved boundary scan Express parallel configuration mode
®
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Standard Chip
External PLD7K Gates
7K Gates Logic
Com
pone
nt c
ost 1
00K
uni
ts
Standard ChipPCI Master I/F
XCS20XL-4 TQ144*
Solution <$7Solution <$7
PCI Master I/F
*Supported devices: XCS20XL XCS30XL XCS40XL
Power by$5
$20
$10
$15
Costs Less Than Standard ICs
®
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*Prices are for 100K units, plastic package
XCS30XL Percentage of EffectiveCore Function Price Device Used Function Cost
UART $6.95 17% $1.30
16-bit RISC Processor $6.95 36% $2.60
16-bit, 16-tap $6.95 27% $2.00Symmetrical FIR Filter
Reed-Solomon Encoder $6.95 6% $0.50
LogiCORE PCI32 Spartan $8.25 45% $3.80(in PQ208)
CORE Solutions
®
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Spartan Advantages Over Altera Flex 6K/10K
SelectRAM
Cores— PCI and DSP LogiCORE— AllianceCORE
Density— Five devices at both 3.3V and 5V
Performance— 12% faster
®
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Altera Flex 6000
Flex 6000 = Lower Price Replacement for 8K— Based upon 1994 XC5200 technology— Positioned as “first” Gate Array replacement FPGA
6000 AdvantagesImproved Flex 8K routingLess expensive than 10KEquivalent performance to 8KFaster than XC5200
6000 DisadvantagesLimited devices available todayNo RAM, no I/O Flip-FlopsLimited footprint compatibilitySlower than Spartan/XC4000Non-Segmented InterconnectLimited software support
®
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System Features ComparisonFeature Spartan-XL FLEX6000A
SelectRAM Yes No
Global Clocks 8 4
Clock Enable Yes No
Ind. LUT Inputs Yes No
I/O Registers FF/LD No
Internal 3-state Yes Emulated
I/O Pullup/down Yes No
Low Power/PWRDWN Yes No
®
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* A logic cell is a 4 input Look up table and a Flip-Flop** XL and A represent 3.3V devices for Xilinx and Altera respectively
Only 1 device for 5V, 3 devices for 3.3V
5 devices for 5V and 5 devices for 3.3V
Max Xilinx Logic Altera MaxI/O Device Cells Device I/O77 XCS05/XL 238
112 XCS10/XL 466880 EPF6010A 117
160 XCS20/XL 9501320 EPF6016/A 204/171
192 XCS30/XL 1368205 XCS40/XL 1862
1960 EPF6024A 218
Spartan Series vs. Altera 6000/A
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Spartan Series vs. Altera 10KMax Xilinx Logic Altera MaxI/O Device Cells Device I/O77 XCS05/XL 238
112 XCS10/XL 466576 EPF10K10/A 134
160 XCS20/XL 9501152 EPF10K20 189
192 XCS30/XL 13681728 EPF10K30/A/E 246/220
205 XCS40/XL 1862
* A logic cell is a 4 input Look up table and a Flip-Flop** XL and A represent 3.3V devices for Xilinx and Altera respectively
Only 2 low density 3.3V devices
5 devices for 5V and 5 devices for 3.3V
®
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Xilinx Footprint Compatibility Leadership vs. FLEX 6K/A
Spartan Altera 6K Spartan-XL Altera 6KA
5 Volt 3.3 VoltBG256
PQ240
PQ208
TQ144
VQ100
PC84
XCS0
5
XCS1
0
XCS2
0
XCS3
0
XCS4
0
6016
6010
A
6016
A
6024
A
XCS0
5XL
XCS1
0XL
XCS2
0XL
XCS3
0XL
XCS4
0XL
®
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Xilinx Footprint Compatibility Leadership vs. FLEX 10K/A
Spartan Altera 10K Spartan-XL Altera 10KA
5 Volt 3.3 VoltBG356
BG256
PQ240
PQ208
TQ144
VQ100
PC84
XCS0
5
XCS1
0
XCS2
0
XCS3
0
XCS4
0
10K
10
10K
20
10K
30
XCS0
5XL
XCS1
0XL
XCS2
0XL
XCS3
0XL
XCS4
0XL
10K
10A
10K
30A
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Spartan-XL Provides Lowest Power K Factor
0
10
20
30
40
50
60
10KE
XCS30XL6KA
10KA
Spartan 6K
10K
2.5V 3.3V
5.0VSpartanXL K Factor = 11
®
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Addresses the key needs of high-volume logic users
No Compromises
High Performance
On-Chip SelectRAMTM
Wide range of IP and CORE solutions— PCI LogiCORE + AllianceCORE
Fully integrated software support
Volume Pricing competitive with ASICs
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