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Block Diagram of a Primary Multiplexer Siemens TT2550EU01AL_01 1 Contents 1 Transmit Side 3 2 Receive Side 7 3 Exercise 11 Block Diagram of a Primary Multiplexer
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Page 1: 01 Block Diagram

Block Diagram of a Primary Multiplexer Siemens

TT2550EU01AL_011

Contents

1 Transmit Side 3

2 Receive Side 7

3 Exercise 11

Block Diagram of a Primary Multiplexer

Page 2: 01 Block Diagram

Siemens Block Diagram of a Primary Multiplexer

TT2550EU01AL_012

Page 3: 01 Block Diagram

Block Diagram of a Primary Multiplexer Siemens

TT2550EU01AL_013

1 Transmit Side

Page 4: 01 Block Diagram

Siemens Block Diagram of a Primary Multiplexer

TT2550EU01AL_014

The required functional entities of the DSMX 64 K/2F are accordingly subdivided intoa transmit section and a receive section. The transmit section incorporates thetransmit unit and transmit-side speech circuits in the telephone channel units or thetransmit-side circuits of the data channel units; the receive section comprises thereceive unit and the receive-side speech circuits in the telephone channel units or thereceive-side circuits of the data channel units.

Page 5: 01 Block Diagram

Block Diagram of a Primary Multiplexer Siemens

TT2550EU01AL_015

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VF

A

D

VFA

D

~~~

~~~

A/D = Analog-Digital converter

Dec = Decoder

SMX = Signaling multiplexer

PCM

Combining

2 Mbit/s

signal

Supervision

Gen. of frame

alignment

signalbits

D, N,

Y

Clock

generation

Alarm

output

DS30

Dec

SMX

F1 out.

.

.

Fig. 1 Block diagram of transmit side, showing functional blocks

Page 6: 01 Block Diagram

Siemens Block Diagram of a Primary Multiplexer

TT2550EU01AL_016

Telephone Channel Unit

The transmit-side speech circuit takes over the telephone signals present on theassociated telephone lines (VF signals). The signals are band-limited from 300 Hz to3400 Hz.

Depending on the required relative level setting, the signal is amplified or attenuatedbefore the A/D conversion. The relative level in transmit direction is referred to theinput of the A/D converter. Thus a relative level setting of -14 dBr means that thelevel before the amplifier is 14 dB less than at the input of the A/D converter. Withother terms the signal is amplified by 14 dB.

The resulting PAM values (pulse amplitude modulation) are converted into 8-bit codewords by the encoder. This non-linear quantizing is amplitude-dependent. Theencoding characteristic (A-law), which is symmetrical with respect to the zero line,consists of 13 linear segments, giving an approximately logarithmic response.

Page 7: 01 Block Diagram

Block Diagram of a Primary Multiplexer Siemens

TT2550EU01AL_017

2 Receive Side

Page 8: 01 Block Diagram

Siemens Block Diagram of a Primary Multiplexer

TT2550EU01AL_018

The 2 Mbit/s PCM-E signal is fed to all the channels and the signaling multiplexer.The addressing, which is derived from the clock generator, ensures that the individual8-bit words are read into the associated channel units or the signaling multiplexerwith the correct timing.

The functional blocks synchronization and sections of the clock generator anddistributor are concentrated in a highly integrated I2L device mounted in the transmitunit (PCM receive device).

Page 9: 01 Block Diagram

Block Diagram of a Primary Multiplexer Siemens

TT2550EU01AL_019

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VF

A

D

VFA

D

~~

~~

A/D = Analog-Digital converter

Dec = Decoder

SMX = Signaling multiplexer

PCM-E

Distribution and evaluation

2 Mbit/s

signal

Supervision

Det. of frame align. sig. andeval. of parity

bitbits

D, N,

Y

Clock

generation

Alarm

output

DS30

Cod

SMX

F1 in.

.

.

Fig. 2 Block diagram of the receive side

Page 10: 01 Block Diagram

Siemens Block Diagram of a Primary Multiplexer

TT2550EU01AL_0110

Telephone Channel Unit

The PAM signal is generated from the 8-bit words in the decoder. A low-pass filterwith (sin x) / x equalization reconverts the sample-and-hold signal formed from thesequence of PAM values to the VF signal.

Depending on the required relative level setting the signal is amplified or attenuatedafter the D/A converter. The relative level in receive direction is referred to the outputof the D/A converter. Thus a relative level of 4 dBr means that the level after theamplifier is 4 dB higher than at the output of the D/A converter. With other terms thesignal is amplified by 4 dB.

Data Channel Unit

The 8-bit words are read into a memory with the 2-MHz receive clock, undergo serial-parallel conversion and are then read out again at 64 kHz. The 64 kbit/s signal is thenencoded and fed out from D2out at 256 kbaud.

Page 11: 01 Block Diagram

Block Diagram of a Primary Multiplexer Siemens

TT2550EU01AL_0111

3 Exercise

Page 12: 01 Block Diagram

Siemens Block Diagram of a Primary Multiplexer

TT2550EU01AL_0112

Page 13: 01 Block Diagram

Block Diagram of a Primary Multiplexer Siemens

TT2550EU01AL_0113

Exercise

Which blocks of the primary multiplexer may be distinguished for the application ofvoice channel transmission and data channel transmission?

Page 14: 01 Block Diagram

Siemens Block Diagram of a Primary Multiplexer

TT2550EU01AL_0114


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