1 2011 VLSI Symposium Kyoto, Japan

2011 Symposium on VLSI CircuitsKyoto, Japan June 14-17, 2011

2011 Symposium on VLSI CircuitsKyoto, Japan June 14-17, 2011

SSCS Meetings Committee

Aug 15, 2011– Boston, MA

2

Symposium on VLSI Circuits 2011 Symposium hosted by JSAP

Extremely strong commitment by JFE committee/leadership with help from NAE and SSCS to overcome the adversity of the March tsunami with a very successful (high quality papers & attendance) symposium

Continued with two days of overlap. Royal Rhiga– Kyoto - June 14-17, 2011 2011/2012 NAE General Chair – Ajith Amerasekera 2011/2012 NAE TPC Chair – Vivek De The paper submission date was moved to Jan. 24 to give authors more

time after the New Year. 2011: paper selection was decoupled from ISSCC and joint with

Technology Program Committee

2012 Symposium to be hosted by IEEE Hilton Hawaiian Village – Honolulu – June 12-15, 2012 Leverage Technology/Circuit topics with 2-day overlap

2011 VLSI Symposium Kyoto, Japan

Circuits Submission & Acceptance

0

50

100

150

200

250

’04 ’05

329

259

'01 ’02

153

224

’03

50%

Accept

38%

206

300

38% 33%

1088476 77

350

400412

34%

92

’06 ’07

343

410

30%

103

’08

113

27% 20%

84

Submission

313

’09

110

35% 22%

92

409

’10

409

’11

115

28%

+31%

+32%

+26%

+35%

2011 VLSI Symposium Kyoto, Japan

Attendees, Program/Short Course

2011 VLSI Symposium Kyoto, Japan

# of papers submitted from academia

# of papers submitted from industry

# of

sub

mitt

ed p

aper

sCkts. Submission: Industry/Academia

2011 VLSI Symposium Kyoto, Japan

Ratio

of i

ndus

try to

tota

l (%

)

2000

2001

2006

2007

2007

2008

2009

2002

2003

2004

2011

2010

Ckts. Accepted: Industry/AcademiaCkts. Accepted: Industry/Academia

Industry accepted papers: 49 (42.6%) including co-authored by industry with academia 8 (7%)Academia accepted papers: 66 (57.4%) including co-authored by academia with industry 15 (13%)

2011 VLSI Symposium Kyoto, Japan

Issues for Discussion

Initiatives to increase attendance New Joint Committee: Technology/Circuits to

solicit papers for planned joint sessions and rump sessions. (e.g. Design Enablement)

New Short Course Committee: Tech/Circ. General Chairs, SC Chairs, and Treasurer – to ensure increased attendance and quality

Marketing: Engaged BtB (IEDM Publicity)

7 2011 VLSI Symposium – Kyoto, Japan

8

2011 VLSI Circuit Symposium Financials

2011 Symposia hosted in Kyoto – Rhiga Royal Hotel Registration Fee (IEEE) - JPY60K(Finances on odd years sponsored by Japan Society of Applied Physics)

2009 & 2011 Honolulu$11K surplus for Circuits Symposia in 2010 vs. $9.6K in ’08

Requesting 40K in each of 2011 and 2012 for advance.

Current Budgeting for 2012: Registration 277 vs. 277 (2010) Short Course 85 vs. 85 (2010)Registration Fee $575 vs. $550 (2010)

2011 VLSI Symposium Kyoto, Japan

9

Summary

Location Hawaii Kyoto

Dates of Conference June 15-18, 2010 June 14-17, 2011

Attendance Symp./SC 276/85 424/151

Papers: Submitted/Accepted 409/92 409/115

Budget $275K JSAP

Surplus $11K JSAP

Industry/Academic Papers 122/287 144/265

Posters None None

IEEE Registration Fee $550 JPY65K (~$800)

2011 VLSI Symposium Kyoto, Japan

10 2010 VLSI Symposium – Honolulu, HI

EXTRA SLIDES

11 2010 VLSI Symposium – Honolulu, HI

Summary

Attendance ~276(313)/85(130); target 300/90; overlap with DAC could have affected attendance by ~10%.

Moved out final paper submission by 2 weeks and reduced 4 weeks between paper selection and conference.

No change in # of submitted papers or quality of papers – trends matched for Hawaii; shorter time is good, tight for deliverables

Seeing more joint University/Industry papers; may need to classify level of industry contribution.

Good increase in digital papers. Higher attendance at digital. Could do more to leverage Technology/Circuits overlap. Mixed

sessions? Need to address more complex SoC, and application technology;

e.g. power delivery and management, sensor interfaces, display circuits, control circuits, embedded processing. Should we consider a circuits applications category and solicit?

12 2010 VLSI Symposium – Honolulu, HI

Peer Review Process

409 papers submitted this year. All papers sent to all committee members. Papers are divided into 11 categories. Each committee member are responsible for

5 categories. Each paper has 10 reviews. Each committee member reviews 200

papers.