Date post: | 22-Dec-2015 |
Category: |
Documents |
View: | 216 times |
Download: | 0 times |
1
COMP541COMP541
Sequencing and Control -- Sequencing and Control -- IIII
Montek SinghMontek Singh
April 5, 2007April 5, 2007
2
TopicsTopics Still on Chapter 8Still on Chapter 8 Last classLast class
Hardwired controlHardwired control
NowNow Microprogrammed control of multiplierMicroprogrammed control of multiplier
3
Microprogrammed ApproachMicroprogrammed Approach Control values stored in a memoryControl values stored in a memory
Job of instructions is to generate control Job of instructions is to generate control signals to datapath and outputsignals to datapath and output
4
Nomenclature and CharacteristicsNomenclature and Characteristics Word of memory called Word of memory called microinstructionmicroinstruction The set of instructions called The set of instructions called microprogrammicroprogram Sometimes in ROM, sometimes loadableSometimes in ROM, sometimes loadable Often wide wordOften wide word
6
Microprogrammed Control UnitMicroprogrammed Control Unit Control Address Control Address
Register (CAR) Register (CAR) equivalent to PCequivalent to PC
SequencerSequencer Part of instruction sent Part of instruction sent
to next-address to next-address generator to determine generator to determine next instruction addrnext instruction addr
7
Control Data RegisterControl Data Register Pipelining approach to Pipelining approach to
break up the delay in break up the delay in the addr gen and ROMthe addr gen and ROM
Not used in exampleNot used in example
8
Status BitsStatus Bits Notice that they go only to Notice that they go only to
sequencersequencer Can only affect next control Can only affect next control
wordword So, conditional output boxes So, conditional output boxes
not allowed in this not allowed in this architecture architecture
10
MicroinstructionMicroinstruction Word formatWord format
Addresses of potential next instructionsAddresses of potential next instructions Fields for next instruction selectionFields for next instruction selection Fields for datapath controlFields for datapath control
11
Datapath Control SignalsDatapath Control Signals Doesn’t include load reg inst.Doesn’t include load reg inst. Look at ASM to see where they are assertedLook at ASM to see where they are asserted
12
Mapping to MicroinstructionMapping to Microinstruction Have only 4 signalsHave only 4 signals Could encode (2 bits?)Could encode (2 bits?) Would cost a decoderWould cost a decoder
Just a design tradeoffJust a design tradeoff This design has tiny ROM anywayThis design has tiny ROM anyway
13
Sequencer DesignSequencer Design Probably most important part of this processProbably most important part of this process
This design provides 2 addrsThis design provides 2 addrs SEL field and control logic choose oneSEL field and control logic choose one
Other possibility is one addr fieldOther possibility is one addr field Choice is to go to next sequential addr (like PC), orChoice is to go to next sequential addr (like PC), or Using control signals go to addr specifiedUsing control signals go to addr specified
15
ResultResult 5 words in ROM5 words in ROM ROM is 12 bits wideROM is 12 bits wide Design nextDesign next
16
Microprog Design for MultMicroprog Design for Mult
Mux chooses addr1 or addr2
Mux control from datapath status and external signals.
Next slide
19
Is it necessary?Is it necessary? Microprogramming less useful now that HLLs Microprogramming less useful now that HLLs
used for designused for design Can use Verilog to generate very complex Can use Verilog to generate very complex
state machinestate machine
20
TodayToday Looked at ways to implement Looked at ways to implement
microprogrammed control for the multipliermicroprogrammed control for the multiplier