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1 Introduction to ARM A15 Linux DSP Platform Software Apps Team 04/19/2013 1TI Confidential - NDA...

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1 Introduction to ARM A15 Linux DSP Platform Software Apps Team 04/19/2013 1 TI Confidential - NDA Restrictions
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Page 1: 1 Introduction to ARM A15 Linux DSP Platform Software Apps Team 04/19/2013 1TI Confidential - NDA Restrictions.

1

Introduction to ARM A15 Linux

DSP Platform Software Apps Team04/19/2013

1TI Confidential - NDA Restrictions

Page 2: 1 Introduction to ARM A15 Linux DSP Platform Software Apps Team 04/19/2013 1TI Confidential - NDA Restrictions.

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Outline

1. ARM Cortex-A15 Overview

2. ARM A15 Linux Overview U-boot Two Stage Bootloading Boot Monitor SMP Boot Sequence LPAE Linux Drivers

2

TI Confidential - NDA Restrictions

Page 3: 1 Introduction to ARM A15 Linux DSP Platform Software Apps Team 04/19/2013 1TI Confidential - NDA Restrictions.

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ARM A15 Overview

ARMv7-A Cortex - the latest member of the Cortex-A series of processors

1-4x SMP within a single processor cluster and low power consumption

Thumb-2 Technology TrustZone Security Floating Point NEON Hardware Virtualization Large Physical Address Extension (LPAE)

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TI Confidential - NDA Restrictions

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Thumb-2 Technology

Thumb Mode

16-bit Thumb instructions vs 32-bit ARM instructions Thumb-2 extends with additional 32-bit instructions

Code density similar to Thumb

up to a 30% reduction in memory to store instructions

Performance similar to the ARM instruction set on 32-bit memory

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TrustZone Security2 virtual processors backed by hardware based

access controlEnable application core to switch between 2

states (worlds)Each world can operate independently while using

the same core. Memory and peripherals are made aware of the

operating world and provide access controlSecure Monitor is code that runs in secure

Monitor mode and processes switches to and from the secure world

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Floating Point

Vector Floating Point (VFP) is an FPU coprocessor extension to the ARM architecture

Hardware support for FP operations in half-, single- and double-precision floating point arithmetic.

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NEON

Linux version: 3.6.0, GCC version: Linaro 4.6.3

Advanced SIMD extension, or Media Processing Engine (MPE)

A combined 64- and 128-bit SIMD instruction setProvides acceleration for media and signal

applicationNEON hardware shares the same floating-point

registers as used in VFP.

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Hardware Virtualization

Hardware support for multiple software environments available on the same physical processorSoftware applications can access the system capabilities simultaneouslyVirtual envrionments are isolated from each other

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LPAE

64-bit “long-descriptor” format for page tables

Supports 40-bit physical address – up to 1TB of memory

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ARM A15 Linux Overview

U-boot Two Stage Bootloading Boot Monitor SMP Boot Sequence LPAE Linux Drivers

Page 11: 1 Introduction to ARM A15 Linux DSP Platform Software Apps Team 04/19/2013 1TI Confidential - NDA Restrictions.

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U-BootBased on the Universal Boot Loader public projectProgram that moves executable from non-volatile

memory to memory and then transfers CPU control to the newly “loaded” executable

Minimal drivers SPI I2C UART NAND ETH USB

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Two Stage Bootloading

ROM Boot Loader(RBL) loads Secondary Program Loader (SPL) from SPI NOR flash

SPL loads and run the second stage boot loader, a full version of U-Boot) from NOR or NAND

Keystone II – SPI boot mode The first 64K of the SPI NOR flash is flashed with SPL Followed by U-Boot image

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Boot Monitor

ARM Cortex A15 requires certain functions to be executed in the PL1 privilege level

Provides secure privilege level execution service for Linux Kernel code through SMC calls

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Boot Monitor – High level architecture

Page 15: 1 Introduction to ARM A15 Linux DSP Platform Software Apps Team 04/19/2013 1TI Confidential - NDA Restrictions.

Boot Sequence – Primary Core

TI Confidential - NDA Restrictions

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RBL is run on Power On reset After completion, load and run u-boot in non-secure mode Boot Monitor gets installed

As part of non-secure entry, boot monitor calls the RBL API through SMC call (SMC #0) passing _init() entry point address.

RBL enters monitor mode, _init() inits the monitor vector and calls init() to init Core/CPU specific inits, set the primary/secondary flag, the Set the secondary core non-secure entry point address

Back to non-secure mode and booting of linux kernel At linux start up, primary core make SMC call to power on each of

the secondary cores Primary core waits for secondary cores to boot up and then

proceeds to rest of booting sequence

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Boot Sequence – Secondary Core

On Power On reset, RBL initializes and enters the secondary entry point address of the Boot Monitor core through SMC call (SMC #0)

RBL enters monitor mode, _init() inits the monitor vector and calls init() to init Core/CPU specific inits.

On return from _init(), it jumps to secondary kernel entry point address and start booting 2nd instance of Linux kernel

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LPAE DDR3A memory address space 0x08 0000 0000 – 0x09 FFFF FFFF Cortex-A15 LPAE with 40-bit address bus may access if MMU is on ARM has only 32-bit effective address bus if MMU is off To access DDR3A when MMU is off

MSMC maps first 2GB to 0x00 8000 0000 – 0x00 FFFF FFFF The aliased address space can be used when MMU is on or off Keystone II does not support cache coherency for the aliased address space

Default memory property of TCI6638 is 0x8000 0000 size 0x2000 0000

When U-boot boots the kernel, it can modify the default start address. If mem_lpae=0, U-boot does not modify If mem_lpae=1, U-boot sets the start address to 0x08 0000 0000

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Linux Drivers GIC IRQ chip driver Keystone IPC IRQ chip driver SMP AEMIF driver NAND driver SPI and SPI NOR flash drivers I2C and EEPROM drivers Keystone GPIO driver Keystone IPC GPIO driver Network driver (NetCP), PktDMA, Packet Accelerator SGMII driver QoS driver USB driver 10Gig Ethernet driver (not validated due to test hardware) PCIe driver

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Getting Started with MCSDK

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Prerequisite

K2EVM-HK (Follow Hardware setup guide to make sure you have the latest BMC updates)

http://processors.wiki.ti.com/index.php/EVMK2H_Hardware_Setup

User guide: (getting started guide & exploring as well)

http://processors.wiki.ti.com/index.php/MCSDK_User_Guide_for_KeyStone_II

Download MCSDK:

http://software-dl.ti.com/sdoemb/sdoemb_public_sw/mcsdk/latest/index_FDS.html

Ubuntu Linux 12.04 LTS machine, set up Proxy (consult IT)

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Install CCS & MCSDK

1. Install CCSv5.3.0 at <CCS default Installed Directory>.

For processor architecture, make sure "C6x DSP + ARM processors" is selected.

2. Install TI KeyStone2 Emupack,

ti_emupack_keystone2_setup_1.0.0.2

If installed on Linux, replace \ with / in this file /opt/ti/ccsv5/ccs_base/common/targetdb/devices/TCI6638.xml

3. Install MCSDK 3.00.00.09, same directory as CCS, e.g.: /opt/ti

4. copy the file tci6638-evm.ccxml from

mcsdk_linux_3_00_00_09/host-tools/loadlin folder

to ~/<user>/ti/CCSTargetConfiguration folder where the CCS saves the user specific configuration file.

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Build Prerequisite

Toolchain installation:

Download the gcc-linaro-arm-linux-gnueabi-2012.03-20120326_linux.tar.bz2 from https://launchpad.net/linaro-toolchain-binaries/trunk/2012.03

cd ~/

tar xjf gcc-linaro-arm-linux-gnueabi-2012.03-20120326_linux.tar.bz2

export CROSS_COMPILE=arm-linux-gnueabi-

export ARCH=arm

PATH=$HOME/gcc-linaro-arm-linux-gnueabi-2012.03-20120326_linux/bin:$PATH

Configure git and install packages needed at build time:

sudo apt-get install git-core

sudo apt-get install build-essential subversion ccache sed wget cvs coreutils unzip texinfo docbook-utils gawk help2man diffstat file g++ texi2html bison flex htmldoc chrpath libxext-dev xserver-xorg-dev doxygen bitbake uboot-mkimage libncurses5-dev

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Getting started with MCSDK

Either use prebuilt images or build Uboot, boot monitor, kernel & file system on your own.

File systems supported: ramfs, Net mounted file system, UBIFS. Configure environment variable as per user’s guide.

Getting Kernel & file system to boot

Run applications


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