1-V DTMOS-Based Class-AB Operational Amplifier

2440 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO. 11, NOVEMBER 2006

1-V DTMOS-Based Class-AB Operational Amplifier:Implementation and Experimental Results

Hervé Facpong Achigui, Student Member, IEEE, Christian Jésus B. Fayomi, Member, IEEE, andMohamad Sawan, Fellow, IEEE

Abstract—In this paper, we describe a novel low-voltageclass-AB operational amplifier (opamp) based on dynamicthreshold voltage MOS transistors (DTMOS). A DTMOS tran-sistor is a device whose gate is tied to its bulk. DTMOS tran-sistor pseudo-pMOS differential input pairs are used for inputcommon-mode range enhancement, followed by a single endedclass-AB output. Two versions of the proposed opamp (opamp-Aand opamp-B) were fabricated in a standard 0.18- m CMOSprocess technology. Measurements under 5 pF and 10 k loadconditions gave, for opamp-A, a DC open-loop gain of 50.1 dB, anda unity gain bandwidth (GBW) of 26.2 MHz. A common-moderejection ratio (CMRR) of 78 dB, and input and output swings of0.7 V and 0.9 V, respectively, were achieved. Opamp-B has beenoptimized for biomedical applications, and is implemented to buildthe analog front-end part of a near-infrared spectroreflectometry(NIRS) receiver of a multi-wavelength wireless brain oxymeterapparatus. A DC open-loop gain of 53 dB, a GBW of 1.3 MHz,and input and output swings of 0.6 V and 0.8 V, respectively, weremeasured. Opamp-A consumes 550 W with an input referrednoise of 160 nV Hz at 1 kHz. Opamp-B consumes only 40 Wand exhibits a lower input referred noise of 107 nV Hz at 1 kHz.

Index Terms—CMOS analog integrated circuit, differential am-plifier, DTMOS, low-voltage operational amplifier.

I. INTRODUCTION

DESIGN of high-performance analog IC circuits operatingat low supply voltages has been gaining increasing im-

portance in the last decade, especially for applications suchas medical electronic implantable devices, as well as hand-held and battery-powered electronic devices. Furthermore,the increasing use of mobile electronic products has directedthe industry towards reducing dissipated power, especially foranalog and mixed signal circuits. In addition, large-scale inte-grations are predicted to target 1-V operation, and even less [1].However, the trend towards lowering the power supply voltageof circuitries in mixed-signal (digital/analog) environmentsoften sacrifices the speed, noise requirements, dynamic range,

Manuscript received October 13, 2005; revised June 8, 2006. This workwas supported by the Natural Sciences and Engineering Research Council ofCanada (NSERC), the Microsystems Research Alliance of Quebec (ReSMiQ),and CMC Microsystems.

H. F. Achigui was with the Polystim Neurotechnologies Laboratory, Elec-trical Engineering Department, Ecole Polytechnique de Montreal, Montreal,QC H3C 3A7 Canada. He is now with PMC-Sierra, Mont-Royal, QC H3R 3L5Canada (e-mail: [email protected]).

M. Sawan is with the Polystim Neurotechnologies Laboratory, ElectricalEngineering Department, Ecole Polytechnique de Montreal, Montreal, QCH3C 3A7 Canada (e-mail: [email protected]).

C. J. B. Fayomi is with the Microelectronics Laboratory, Computer ScienceDepartment, Université du Québec à Montréal, Montreal, QC H2X 3Y7 Canada(e-mail: [email protected]).

Digital Object Identifier 10.1109/JSSC.2006.883341

gain, bandwidth, and linearity of their analog counterparts. Thisposes a great challenge to circuit design.

The reduction of threshold voltage is necessary forlow-voltage operation; on the other hand, the threshold voltagedoes not scale down with the supply voltage of future standardCMOS technologies [2]. An obvious solution could be theuse of multi-process threshold technology, but unfortunately,this kind of technology is more expensive and frequently noteasy to reproduce. Some additional design advantages, suchas low-noise structures, could be obtained by using BiCMOStechnology, but at a higher cost. Several design techniqueshave been proposed for the implementation of 1-V operationalamplifiers (opamps); in fact, some authors reported circuittechniques for facilitating 1-V operation based on bulk-drivingarchitectures [3]–[5]. However, substantially small inputtransconductance is obtained when compared to a con-ventional gate-driven MOS transistor, and furthermore, theequivalent input referred noise is larger. Other circuit topolo-gies using a standard CMOS technology process were reported,[6]–[13]. The major drawback of the architectures based on N-Pcomplementary rail-to-rail input stage [7], [8], is the increasein the total harmonic distortion (THD) related to the use of N-Pcomplementary transistors, which produces an offset voltage onthe common-mode input voltage swing. Since the introductionof dynamic threshold voltage MOSFET (DTMOS) in 1994[14], several low-supply voltage circuits have been proposed,but most of them achieved low threshold voltage by modifyingthe fabrication process, using the SOI technology [15], or byusing multiple-input floating-gate transistors [16]. In singlewell process technology, a DTMOS transistor is made of onlya pMOS transistor by connecting its gate to the bulk, no furthermanufacturing process or step is required, and the device canbe used in any standard CMOS process. This would result in apartial forward bias of the source-to-bulk PN junction leadingto a reduced threshold voltage as the gate input voltage changeswith little drawback effects as the forward bias voltage is keptbelow 0.7 V for modern submicron technology [17].

In this paper, novel class-AB opamps for low-voltage, as wellas low-power and low-noise applications have been fabricatedand tested. The circuits make use of the DTMOS folded cas-code differential input pairs to increase the input common-moderange (ICMR). Standard Miller compensation is used for band-width enhancement. Section II describes the opamp architec-ture, with a focus on the DTMOS transistor operation and mea-surements. Experimental results are reported in Section III alongwith the effectiveness of the proposed solution for the design oflow-voltage low-power analog circuits.

0018-9200/$20.00 © 2006 IEEE

ACHIGUI et al.: 1-V DTMOS-BASED CLASS-AB OPERATIONAL AMPLIFIER: IMPLEMENTATION AND EXPERIMENTAL RESULTS 2441

TABLE ITRENDS IN LOW-VOLTAGE CMOS OPAMP

II. LOW-VOLTAGE DTMOS-BASED OPAMP

Various methods have been used to design opamps underlow-voltage operation. Table I gives a simplified overview ofthe methods used to overcome the main limitations when im-plementing 1-V opamp designs, along with their related perfor-mances. The proposed implementation makes use of DTMOStransistors. We have achieved an average threshold voltage of

0.35 V for pMOS-based DTMOS transistors, compared to0.55 V for regular pMOS devices. Such threshold voltage

shift is similar to value obtained when using forward-biasedsource-bulk junction design technique [18].

The opamp consists of a differential input stage and aclass-AB output stage capable of driving off chip resistive loadas described in the block diagram of Fig. 1(a). The biasingcircuit consists of a standard current source using a resistor andan nMOS transistor. A wide-swing current mirror with highoutput impedance is used to produce bias voltages and

as shown in Fig. 1(b), (c), and (d).

A. DTMOS Transistor

A DTMOS transistor is a device whose gate is tied to itssubstrate. Therefore, the device can be seen either as a lat-eral bipolar p-n-p, or as pMOS with a dynamically regulatedthreshold. Consequently, the substrate voltage in DTMOSchanges with the gate input voltage, and causes to changeaccordingly, as demonstrated in (1):

(1)

where is the zero bias threshold voltage, the bulkeffect factor, and the Fermi potential. With the use ofstandard digital technology, we can only implement p-typeDTMOS, as their n-well can be controlled. When the inputvoltage at the gate of a pseudo-pMOS-based DTMOS transistoris high, the transistor turns to the off-state, and presents thesame , off-current , and subthreshold slope as a regularpMOS. When the input voltage decreases, the transistor is inits on-state, and the bulk-to-source junction voltage isforward biased and thus reduces of the DTMOS transistorthanks to the body effect, resulting in a higher source-to-draincurrent than that of regular pMOS. This phenomenonenables us to take advantage of the maximum input range,and makes the DTMOS transistor the choice for subthresholdoperation logic, without the need for any extra area [19], [20].In addition, due to its gate-to-body tied structure, DTMOSoperating in the subthreshold region exhibit similar character-istics to a lateral bipolar p-n-p transistor, without requiring itsrelatively large base current to operate, and having lower flickernoise than regular MOS [20].

B. Input Stage Design

We recently proposed two folded cascode class-AB opamparchitectures [19], [20] which are illustrated in Fig. 1(b) and (c).Typically, pMOS threshold voltage is much larger than that ofnMOS; consequently, to achieve 1-V operation or less, we usedpMOS-based DTMOS transistor pairs in the differ-ential input. In both proposed designs, the input stage uses a


Fig. 1. Schematic of the DTMOS-based opamp. (a) Block scheme. (b) Differential input stage for opamp-A. (c) Differential input stage for opamp-B. (d) Class-ABoutput stage.

folded cascode wide-swing current mirror – . In addi-tion, transistors and have been added to enhancethe slew-rate limitation of the folded cascode configuration.When the opamp is slew-rate limited, these transistors preventthe drain of and from having large transients whichchange their small-signal voltages to levels close to the positivepower-supply voltage. DTMOS transistors – providethe required bias current for the differential input transistors,and for the cascode current mirror. For the opamp-A, whichis illustrated in Fig. 1(b), the use of DTMOS differential pairsenables us to take advantage of the maximum input range, whilehaving all transistors operating in the strong inversion region.Also, transistors and ( and ) are designedto provide adequate bias voltage to , respectively.These transistors implement the gain boosting technique forhigh DC gain enhancement [21].

The opamp-B circuit depicted in Fig. 1(c) has been optimizedfor biomedical applications and is implemented to build theanalog front-end part of a near-infrared spectroreflectometry(NIRS) receiver of a multi-wavelength wireless brain oxymeterapparatus.Such device would provide a portable, noninvasive

means of monitoring and imaging brain function and biologicaltissues, because of the relatively low absorption of water andhigh absorption of oxyhemoglobin and deoxyhemoglobin in theNIR region of 600–900 nm. The NIRS device is composed oftwo parts: the emitter and the receivers. The emitter consists ofthree NIR laser diodes emitting light at discrete wavelengths of735 nm, 840 nm, and 940 nm. The receivers are a set of six sep-arate identical sensors, optically and electrically isolated fromeach other. Each sensor consists of a CMOS photodiode with abuilt-in current-to-voltage converter, voltage opamp, filter, andmixer. The CMOS photodiode transforms the reflected lightinto current. A transimpedance amplifier is used to transformthe currents extracted from the photodiodes into voltages, andthe low-noise, low-power, DTMOS-based class-AB opamp-B isused to selectively amplify the low-amplitude signal before it isfiltered and then demodulated.

The pMOS-based DTMOS and devices of the inputstage of opamp-B are operated between weak and moderate in-version regions. Such operation ensures transconductance effi-ciency for the lowest amount of input referred gatenoise voltage at the minimum possible bias current. However,


TABLE IIDEVICE SIZES OF DIFFERENTIAL INPUT STAGE FOR OPAMP-A AND OPAMP-B

Fig. 2. DTMOS transistor. (a) Micrograph of the device. (b) Test bench used.(c) Measured total source current against source-gate voltage for various source-drain voltage.

all other transistors are biased in the strong inversion region.Typically, CMOS transistors operating in subthreshold are bi-ased at very small drain currents in the order of a few nanoam-peres, but provide a limited gain–bandwidth product (GBW).However, for CMOS transistors designed with large width-to-length ( ) ratios, subthreshold operation is possible at mod-erately large currents, resulting in a lower input noise voltageand higher GBW product. The input devices and have

Fig. 3. Microphotograph of the DTMOS-based opamp-A.

Fig. 4. Microphotograph of the DTMOS-based opamp-B.

a ratio of 2733, to ensure subthreshold voltage operationunder a bias current of 3.88 A per device. Furthermore, oper-ational transconductance amplifiers (OTAs) have been used toprovide adequate bias voltages to and , and to en-hance small-signal operation stability. Since the negative feed-back needed to stabilize the active cascode devicesin opamp-A is provided by transistors used in acommon-source configuration, for to operate intheir linear region, the minimum voltage at their gate shouldbe higher than one threshold voltage; thus, for very low levelsignal amplitude, the feedback loop through be-comes unstable. With the use of OTA in the feedback loop of ac-tive cascode devices in the opamp-B as depicted inFig. 1(c), this requirement is no longer necessary. Consequently,opamp-B exhibits enhanced stability while processing signalswith small amplitude. Table II gives the device parameters ofthe differential input stage for both opamp-A and opamp-B.


Fig. 5. Measured transient results. (a) Step input response. (b) Sine response with an input signal amplitude of 0.7 V for opamp-A. (c) Step input response.(d) Sine response with an input signal amplitude of 0.6 V for opamp-B.

C. Class-AB Output Stage

The output stage is a key point in the design of low-voltageamplifiers since it greatly affects the final features of the ampli-fier itself. The low-voltage class-AB output stage that we used isshown in Fig. 1(d) [22]. This architecture namely current sub-tracting class-AB has been originally based on a bipolar low-voltage translinear loop that is used to perform the quiescentcurrent control [23], [24]. The signal is split to the output by theoutput transistors , and current mirrors –and – , which provide a low impedance signal pathto the output. Quiescent current control is based on the currentcomparison performed at the drain of transistor .

III. EXPERIMENTAL RESULTS

The proposed opamps were fabricated in a standard 0.18- msingle-poly six-metal salicide CMOS process technology with

metal-to-metal (MiM) capacitors. Nominal values for thethreshold voltages are approximately 0.47 V and 0.55 V fornMOS and pMOS transistors, respectively.

A. DTMOS Measurements

A DTMOS device m m was fabricatedand tested; its die micrograph is shown in Fig. 2(a). We used theKeithley 236 Source-Measure Unit (SMU) with the test setup asillustrated in Fig. 2(b) to measure the source current againstsource-gate voltage for different values of the source-drainvoltage of the DTMOS transistor [Fig. 2(c)]. It is importantto note that large leakage current is generated for largerthan 0.7 V, as the source-to-bulk p-n junction diode becomesforward biased.


Fig. 6. Measured step response for input signal with low amplitude (0.1 V ).(a) Opamp-A. (b) Opamp-B.

B. Opamps Measurements

The die micrographs of opamp-A and opamp-B, using theinput stage of the circuit presented in Fig. 1(b) and (c), arepresented in Fig. 3 and Fig. 4, respectively. Measurements weretaken using the Agilent 33250A function waveform generatorand the Tektronix TDS7154 oscilloscope, with a 5-pF capac-itive load in parallel with a 10-k load. The measured inputand output common-mode range voltages are 0.7 V and 0.9 Vfor opamp-A, and 0.6 V and 0.8 V for opamp-B, respectively.The measured transient results for a step input signal areshown in Fig. 5(a) for opamp-A and in Fig. 5(c) for opamp-B.Fig. 5(b) and (d) depict the response to a 0.7 and 0.6sinusoid input signal for the proposed opamp-A and opamp-B,respectively.

For opamp-A, the measured DC open-loop gain is 50.1 dBwith a GBW of 26.2 MHz and a common-mode rejection ratio(CMRR) of 78 dB. It consumes 550 W of power, and has aninput referred noise of 160 nV Hz at 1 kHz. Also, for the

Fig. 7. Measured DC transfers characteristics of the input common-moderange. (a) Opamp-A. (b) Opamp-B.

opamp-B, which has been optimized for biomedical applica-tions, we measured a DC open-loop gain of 53 dB, and a unityfrequency of 1.3 MHz. The latter has a lower input referred noiseof 107 nV Hz at 1 kHz, with a power consumption of only40 W.

The measured transient responses for a low amplitude stepinput signal of 0.1 are shown in Fig. 6(a) for opamp-A,where the use of gain boosted transistors – introducedsmall oscillations, due to instability in the feedback loop throughactive cascode devices and as depicted in the graphof Fig. 6(a). The OTA used in the folded cascode at the inputstage of opamp-B has enabled us to achieve higher stabilitywhen the inputs are processing a signal with small amplitude,as illustrated in Fig. 6(b). This ability for an opamp to linearlyprocess small levels of input signal is a key requirement for theamplifier for modules of the analog front-end receiver [20].

The DC transfers characteristic of opamp-A and opamp-B aredepicted in Fig. 7(a) and (b), respectively. Moreover, Fig. 8(a)


Fig. 8. Measured common-mode input range. (a) Opamp-A. (b) Opamp-B.

and (b) illustrate the input common-mode range of opamp-Aand opamp-B, respectively.

In addition, the step input response measurements ofopamp-A when it is used in a noninverting configuration with again of two is illustrated in Fig. 9(a), and the step input responsewhen it is used in the inverting configuration is illustrated inFig. 9(b). Similar results should be obtainable for the opamp-B.The minimum experimental supply voltage is 0.8 V. In fact,Fig. 10 depicts the ability of opamp-A to process the stepinput signal of an amplitude as high as 0.57 when thesupply voltage is as low as 0.8 V. Table III summarizes theperformances of both opamp-A and opamp-B.

C. Harmonic Distortion Analysis

With the use of a class-AB output stage, it is important tooutline how far the proposed opamps can dependably reproducethe signal applied at its input. Evaluation of the misshapen re-sponses between the fundamental frequency at the input and atthe output is done by calculating the harmonic and inter-modu-lation distortion levels between the sample data. A fast Fouriertransform (FFT) analysis was performed, and the power spec-tral density of opamp-A’s output signals are shown in Fig. 11(a),

Fig. 9. Measured transient results for opamp-A. (a) Noninverting configurationwith a gain of 2; upper: input signal with amplitude of 0.299 V ; lower: outputsignal. (b) Inverting configuration with a gain of 1; upper: input signal with anamplitude of 0.3 V ; lower: output signal.

Fig. 10. Measured transient results for opamp-A under a supply voltage of0.8 V with a step input signal of amplitude of 0.57 V .

with an input sinusoidal signal frequency of 4.0 kHz, and an am-plitude of 0.7 . Fig. 11(b) depicts the measured output signal


TABLE IIIPERFORMANCE SUMMARY OF THE MEASURED RESULTS

Fig. 11. Measured output spectrum. (a) Opamp-A with a sine input signal am-plitude of 0.7 V . (b) opamp-B with a sine input signal amplitude of 0.6 V .

Fig. 12. Measured total harmonic distortion. (a) Opamp-A. (b) Opamp-B.

spectrum of opamp-B, with an input sinusoidal signal frequencyof 10 kHz and an amplitude of 0.6 . Fig. 12(a) and (b) showthe measured THD of the eighth first harmonics for opamp-Aand opamp-B, respectively, in unity-gain configuration for dif-ferent peak-to-peak amplitude level of a 4-kHz input sinusoidalsignal.

IV. CONCLUSION

A novel opamp architecture was reported along with its exper-imental measurements. Two versions of this opamp were fabri-cated for 1-V applications using DTMOS transistors under stan-dard 0.18- m CMOS process technology. Measurements showthat the use of dynamic threshold pMOS transistors permits im-plementation of analog circuits at low supply voltage. For thefirst design, opamp-A, the circuit operates with a power supplyas low as 1-V, while providing a DC open-loop gain of 50.1 dBand a GBW of 26.2 MHz, under a load condition of 5 pF and10 k . This opamp consumes 550 W of power. Applicationsof this circuit could include switched-capacitor filters, data con-verters or any sampled-data systems. However, the second de-sign (opamp-B) exhibits a low power consumption of 40 W,while presenting a DC open-loop gain of 53 dB, a GBW of1.3 MHz, and an input referred noise of 107 nV Hz at 1 kHz.These features were measured under the same load conditionsas opamp-A. Opamp-B is intended to build the analog front-endpart of a NIRS receiver of a multi-wavelength wireless brainoxymeter apparatus. The minimum experimental supply voltageis 0.8 V for the proposed circuits.

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Hervé Facpong Achigui (S’01) received the B.Eng.and M.Sc.A. degrees, both in electrical engineering,from École Polytechnique de Montréal, Canada, in2002 and 2006, respectively.

He worked at Motorola in 2001 during his studiesand joined Polystim Neurotechnologies Laboratoryat Ecole Polytechnique de Montréal in 2002. He wasa research and teaching assistant at both PolystimNeurotechnologies and Université du Québec àMontréal (UQÀM) in the Computer Science De-partment from 2004 to 2006. He is currently with

PMC-Sierra, Montreal, working on low-voltage CMOS mixed-signal integratedcircuits and systems.

Christian Jésus B. Fayomi (M’97) received theB.Eng. degree (with first in one’s year honors) inelectromechanical engineering from École Polytech-nique de Thiès, Sénégal, in 1993 and the M.A.Sc.(with first class honors) and Ph.D. degrees fromÉcole Polytechnique de Montréal, Canada, in 1995and 2003, respectively, all in electrical engineering.

From 1996 to 2001, he was with the mixed-signaldesign group of Goal Semiconductors Inc. Montréal,working on readout electronic circuits for bolome-ters, phototransistors, microprocessor supervisory

circuits, and data converters. From 1998 to 1999, he was also a TeachingAssistant at the Microelectronics and Computer Laboratory (MACS-Lab),Electrical Engineering Department, McGill University, Montréal. From 2001 to2002, he was with the Microelectronics Division of IBM, Essex Junction, VT,as an Advisory Engineer, designing data converters for video applications. Heis currently Assistant Professor at Université du Québec à Montréal (UQÀM)in the Computer Science Department and is leading the Wireless Smart DevicesLaboratory. Since June 2006, he has held the Adjunct Professor position inthe Electrical and Computer Engineering Department at the Université duQuébec à Trois-Rivières (UQTR). His funded research area is the design ofreliable low-voltage deep-submicron CMOS mixed-signal integrated circuitsand systems.

Mohamad Sawan (F’04) received the B.Sc. degreein electrical engineering from Université Laval,Quebec, Canada, in 1984, and the M.Sc. and Ph.D.degrees in electrical engineering from Universitéde Sherbrooke, Quebec, Canada, in 1986 and 1990,respectively.

He then completed postdoctoral training atMcGill University, Montréal, Canada, in 1991,and in that same year, joined École Polytechniquede Montréal, where he is currently a Professor ofMicroelectronics. He has published more than 350

papers in peer-reviewed journals and conference proceedings, and has beenawarded seven patents. His scientific interests focus on the design and testingof mixed-signal (analog, digital, and RF) circuits and systems, digital andanalog signal processing, and the modelling, design, integration, assembly,and validation of advanced wirelessly powered and controlled monitoringand measurement techniques. These topics are oriented toward biomedicalimplantable devices and telecommunications applications.

Dr. Sawan holds the Canada Research Chair in Smart Medical Devices. Heheads the Regroupement stratégique en microsystèmes du Québec (Microsys-tems Strategic Alliance of Québec-ReSMiQ) and is the founder of the EasternCanada Chapter of the IEEE Solid-State Circuits Society. He also founded theInternational IEEE NEWCAS conference, co-founded the International Func-tional Electrical Stimulation Society, and founded the Polystim Neurotechnolo-gies Laboratory at Ecole Polytechnique de Montréal. He is the editor of SpringerMixed-Signal Letters, Distinguished Lecturer for the IEEE Circuits and Sys-tems (CAS) Society, Chair of the IEEE Biomedical CAS (BioCAS) TechnicalCommittee, and member of the Biotechnology Council representing the IEEECAS Society. He received the Barbara Turnbull Award for spinal cord research(2003), the Medal of Merit from the Lebanese President (2005), the J. ArmandBombardier Award from the Association Francophone pour le savoir (ACFAS),and the American University of Science and Technology Achievement Award.Dr. Sawan is a Fellow of the Canadian Academy of Engineering and the IEEE.

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1-V DTMOS-Based Class-AB Operational Amplifier

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