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8/9/2019 4th Lecture Computer Architecture
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Todays Agenda Well consider techniques to increase instruction level
parallelismo What limits ILP; how much we can expect to extracto How to best exploit the available ILP
Two main techniqueso Hardwareo Software
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Pipeline Review Pipeline CPI = Ideal pipeline CPI + Structural stalls + Data hazard stalls + Control stalls Ideal pipeline CPI
o Maximum performance of the implementation
Structural Hazardso H/w cannot support this combination of instructions
Data Hazardso Instruction consumes a result not yet produced
Control Hazardso Caused by time required for branch and jump resolution
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ILP Example
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Caravanning on a trip,must stay in order toprevent losing anyone
At toll, everyone get in the same lane to stay in order This works..but its slow. Everyone has to wait for D to
get through the toll booth
Get two at a time (in
parallel)
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ILP Basic Concept Basic Idea: overlap the execution of unrelated instructions to
improve performance is known as instruction-level parallelism
Simple ILP recipeo If instructions are independent, do them at the same timeo If not, do them one at a time
Two main techniques1. Rely on hardware to help discover and exploit the parallelism
dynamically (market winner: Intel Pentium series)2. Rely on software technology to find parallelism, statically at compile-
time ( special niche markets: Intel Itanium)
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Basic Instruction Block
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Basic instruction block is a straight-line code sequence withno branches in, except at the entry point , and no branch outexcept at the exit point of the sequence
o Example: Body of a loop
In typical integer code, dynamic branch frequency is 15%(resulting avg. basic block size of about 7 instructions)
To obtain substantial performance enhancements, we mustexploit ILP across multiple BB
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Major ILP Techniques
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Loop-Level Parallelism Exploit parallelism among iterations of a loop
Vector execution is one wayo Graphics, DPS, media appso Execute the same instructions on multiple data simultaneously
If not vector, then eithero Dynamic exploitation via branch predictiono Static exploitation via loop unrolling
Turn LLP into ILP
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Parallel & Dependent Instructions Instructions are parallel if they can execute
simultaneously, regardless of pipeline depth
Dependent instructionso Are not parallelo Must be executed in parallelo But may still be partially overlapped
Three types of dependenceo Data dependency (true data dependence)o Name dependenceo Control dependence
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Dependence & Hazards
Hazards: Conflicts that arises in an instruction stream line
Dependencies are a property of programo Dependency => potential for hazard
Three types of dependenceo Data dependency (true data dependence)o Name dependenceo Control dependence
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Data Dependence
Inst J is data dependent on Inst I if o If J tries to read an operand before I writes it, or
o J is data dependent on inst K which is dependent on I
True Dependence (compiler term)o Can cause Read After Write (RAW) hazard
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Name Dependence: Anti-dependence
Name dependenceo Two instructions use same register or memory location (name)o No actual flow of data between the instructions
Anti-dependenceo J writes an operand before I reads it
Can cause Write After Read hazard
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Name Dependence: Output dependence
J writes an operand before I writes it
Can cause Write After Write hazard
In case of name dependence: change the name, remove thedependence!
o Register renaming for register naming dependence
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Control Dependence
Every instruction (except in the very first basic block) is controldependent on same set branches
In general, these control dependencies must be preserved topreserve program order
o S1 is control dependent on p1o S2 is control dependent on p2 but not on p1
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THEEND
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