IEEE TRANSACTIONS ON EDUCATION, VOL. E-28, NO. 2, MAY 1985
A 16-Bit Microcomputer for Audio BandwidthDigital Filtering
J. W. STEADMAN, R. G. JACQUOT, AND K. A. REED
Abstract-Small microcomputers using 8-bit machines have been usedin teaching digital filtering and discrete-time control. These systemshave two major limitations: 1) bandwidth limited to approximately 125Hz for fourth-order algorithms, and 2) limited precision for represent-ing the coefficients in the algorithm. This paper describes the develop-ment and application of a high-speed 16-bit machine which largelyovercomes the limitations of previous systems.A special-purpose digital filtering and control computer was built
using the MC68000 microprocessor operating at 12.5 MHz. This ma-
chine uses 16-bit data transfers to memory and 32-bit arithmetic. The
multiply and divide instructions are microcoded in the instruction set,and therefore execute much faster than subroutines used in 8-bit ma-
chines. The system has a general-purpose monitor routine and a digitalfiltering algorithm in firmware, user RAM, two channels of A/D, two
channels of D/A, a programmable timer, and an RS232 interface for a
CRT.The firmware implements any filtering or compensation algorithm
through eighth order in the form of a linear difference equation. The
greater precision of the 16-bit machine allows the coefficients in the
difference equation to be represented accurately without extensive ra-
tionalization procedures.The firmware is written for student use in digital filtering and con-
trol laboratories. The computer prompts the user for coefficients and
the sampling interval, informing him of any input errors. It then con-
tinuously runs the selected algorithm until interrupted.This system has been found to be of much wider bandwidth than
previous machines. Signals of 4.0 kHz bandwidth can be filtered withthe general-purpose routines, and the bandwidth can be extended to7.5 kHz with more specialized routines.
INTRODUCTION
Several authors have described low-cost microcomputer systemsfor laboratory work in digital filtering and control [1]-[5]. These8-bit machines have contributed significantly to student under-standing of the basic principles of discrete-time systems, but havetwo major limitations: speed and precision. The limited speed ofthe 8-bit machines makes it impossible to achieve sampling rateshigher than about 250 samples/s for fourth- or higher order algo-rithms. The speed limitation is actually related to the precisionlimitation as well. To achieve even the 250 Hz sampling rates men-
tioned above, coefficient precision must be limited to 8 bits, withintermediate results limited to 16 bits.
In the educational setting, these limitations present both oppor-tunities and problems. The authors find the 8-bit machines to bevery valuable in graphically illustrating to students the effect of pre-cision on control system stability and digital filter performance.Similarly, the very limited response speed of digital control systemsas compared to typical analog systems are clearly evident with thesemachines. On the other hand, to give the student an appreciationfor how well a digital filter or controller can perform, a system isneeded with much better precision and speed. After available hard-ware was examined, it became evident that a system built aroundone of the 16-bit microprocessors could provide at least ten timesas much speed and 100 times as much precision. As with previous
Manuscript received July 30, 1984.J. W. Steadman and R. G. Jacquot are with the Department of Electrical
Engineering, University of Wyoming, Laramie, WY 82071.K. A. Reed was with the Department of Electrical Engineering, Univer-
sity of Wyoming, Laramie, WY 82071. He is now with Hewlett-Packard
Corporation, Palo Alto, CA 94303.
systems, the software objective was to make the system easy to use
in the undergraduate controls laboratory. No programming skills(especially in assembly language) were to be necessary for the user.
After study of many 16-bit central processors, typical closed-loop control algorithms were written for several of the better de-vices. These programs were evaluated for speed of execution insimulated hardware tests. This process led to a decision to buildthe laboratory system using the Motorola MC68000 CPU. The ar-
chitecture of the MC68000 permits very efficient digital filteringwhen careful use is made of its large array of internal data regis-ters. Also, the 32-bit internal ALU and data path permits keeping"double precision" intermediate results without loss of speed.
Since most digital control and digital filtering algorithms can beeasily expressed in the form of a linear constant-coefficient differ-ence equation, it was decided to program an eighth-order differenceequation which is of sufficiently high order to implement realisticdigital filters and compensators which might be encountered in theacademic laboratory situation. The sampling interval was imple-mented by a hardware timer to obtain easily programmable accuratesampling intervals.
is to be implemented either as a real-time digital filter or a digitalclosed-loop compensator, it can be represented in the direct formas a linear, constant-coefficient difference equation
where y (k) is the input sequence and u (k) is the output sequence.This form of the algorithm permits the use of integer arithmetic
in the firmware and requires only the restrictions that neither c0nor ao may be zero. Any of the other coefficients may be zero, andthe firmware is designed to omit those multiplications involvingzero coefficients. The coefficients are limited to integers between-32 000 and + 32 000, except c0 which must be in the range0 to +32 000.
The sampling interval is programmable in microseconds, withhardware exceptions being raised if a new sample is requested be-fore completion of processing of the previous sample. Sample in-tervals may range from 125 ,us to about 2.5 s employing the firm-ware developed.
HARDWARE DESCRIPTION
Digital filtering and control algorithms require a system whichcan, in real time, sample the analog input, operate mathematicallyon the present and past samples, and provide a new analog output.Thus, the three functional hardware elements of the system are: 1)an analog-to-digital (A/D) converter with a timer to control thesample intervals, 2) a central processor with memory which can
store samples from the A/D and operate on them according to a
control or filtering algorithm, and 3) a digital-to-analog (D/A) con-
verter to provide the analog output. The system is shown in blockdiagram form in Fig. 1. The key element of this system is the spe-cial-purpose microcomputer consisting of a Motorola MC68000microprocessor, 4096 words of 16-bit read-only memory (ROM) fortemporary data storage, and input/output (I/O) ports connecting itto the A/D, D/A, timer, and a terminal (CRT) for user entry of thecoefficients, sample interval, etc. Since this part of the system isthe central controlling element, it is described first with the A/D,D/A, and timer detailed in following sections. Each description isnecessarily brief. Interested readers may contact the authors forcomplete details.
IEEE TRANSACTIONS ON EDUCATION, VOL. E-28, NO. 2, MAY 1985
)log
O01FFF b002000
OOFFFF010000
010FFFE011000
0lFFFFb020000
03FFFF.040000-
8k ROM
Expansion ROM
4k RAM
Expansion RAM
128k 6800Peripherals
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-DTACK Stretchedto 450ns
Fig. 2. System memory map.
Fig. 1. Block diagram of system hardware.
The Central Processing Unit (CPU)The primary goal in the design of this system was to provide
students with an opportunity to use a state-of-the-art microproces-sor in digital filtering and control applications. With this in mind,the 16-bit Motorola MC68000 processor operating at 12.5 MHz was
chosen for the CPU. The microprocessor, system clock, buffering,and asynchronous memory bus management circuitry are includedon the CPU board [6]. The buffering is provided so that the systemmay be expanded to include additional memory and several chan-nels of A/D and D/A.A second design goal was to make the system flexible and easy
to use. This is provided by using a standard RS-232 interface to a
CRT and careful construction of the system firmware with the user
in mind.
The memory bus interface must differentiate between ROMmemory cycles and RAM memory cycles and stretch the memory
cycle time of the CPU during ROM fetches. This must be donebecause the EPROM memory devices used are not fast enough tokeep up with the MC68000 operating at 12.5 MHz with no waitstates. The RAM devices, however, are fast enough so no wait statesare used when the memory cycle refers to a RAM address.
The system uses memory-mapped I/O. The memory map shownin Fig. 2 shows the locations of ROM, RAM, and all I/O devices.
Memory DesignOne circuit board contains all the normal system ROM. It uses
2716 erasable programmable read-only memory (EPROM) inte-grated circuits. The board can accept up to 24K bytes of EPROM,although only 8K bytes are actually used for all system firmware,including a general-purpose monitor, the control algorithms, andall calibration routines.A separate circuit board accepts 12K bytes of RAM. The RAM
is implemented using MOSTEK 8114 static RAM devices organizedas 1K x 8-bit memory. Address decoding and buffering are pro-vided on the board so that memory can be expanded beyond 12Kbytes simply by providing more memory boards. Only 2K bytes areused for all applications encountered in classroom and laboratoryuse of the system.
The Interval TimerA programmable interval timer is provided to precisely deter-
mine the points in time when the A/D will sample the input data.The interval timer is constructed using the M6840 LSI timer [7].This provides three independent 16-bit programmable counters.They are driven by a clock circuit that is crystal controlled to pro-vide a stable frequency source. The counter drives the sample-and-hold circuit in the A/D converter directly so no interval uncertaintyis introduced by CPU timing or software. The counter actually dec-rements every 4 As, so the interval must always be a multiple of 4
,us. For simplicity of use, the firmware is written to prompt the userfor an interval specified in microseconds. The timer simply trun-cates to the next shorter interval that is a mutliple of 4 its if nec-essary.
The timer may be initialized to intervals of 4 ,us to more than2.5 s. At the end of the set interval, the timer produces a positivepulse to start the A/D and restarts itself to time another interval.Thus, the timer is initialized once by the CPU and then the sam-pling interval remains constant without further intervention fromthe CPU.
The Analog Interface BoardA single printed circuit board provides two channels of analog
input and output. The address decoding provided on the boardmakes it possible to add additional channels of A/D and D/A bysimply adding more boards. All necessary scaling is provided sothat the analog range is + 10 V and the CPU operates with an 8-bit 2's complement representation of the corresponding analogvoltage. This provides a resolution of 78.125 mV, which is adequatefor laboratory applications as long as most of the available range ofthe converter is used.
The analog I/O board uses the Analog Devices AD7574 [8] forthe A/D converter. The scaling and zero offset functions are accom-plished using operational amplifiers. The sample-and-hold circuitin front of the A/D converter uses an insulated gate FET drivenfrom the BUSY signal of the AD7574. Details of this circuit are shownin Fig. 3. The D/A converter section uses the Analog DevicesAD558 8-bit voltage output D/A [8]. The output is voltage scaledand offset using an operational amplifier. The zero-order hold cir-cuit is followed by a low-pass filter to smooth output. Circuit detailsare shown in Fig. 4.
FIRMWARE DESCRIPTION
There are two major parts of the firmware for this system whichare ROM resident. One is a general-purpose monitor and softwaredebugging utility program, and the second is the digital filteringand control program that can be used without any knowledge ofassemby language programming which implements the differenceequation described in the Introduction. Both routines are writtenin 68000 assembly language using the Motorola crossmacro-
assembler.
Monitor and Debug UtilityThe monitor can be used by an experienced operator to imple-
ment special programs or to test special hardware connected to themicroprocessor system. This is a flexible and useful program thatprovides for interrupts, user traps, and easy program traces. It isinvaluable for the experienced programmer implementing specialroutines, but is not ordinarily used at all in the educational labo-ratory setting and is not described further here.
77
IEEE TRANSACTIONS ON EDUCATION, VOL. E-28, NO. 2, MAY 1985
-15v
20*
Fig. 3. Input, sample-and-hold, and A/D circuitry.
Fig. 4. D/A conversion and output level circuitry.
CalibrationFirmware is provided to guide the user through calibration for
each analog I/O channel. The only instrument required is a volt-meter.
Calibration of an input or output channel may be specified by theuser in response to a system prompt. The user is then instructed toconnect the D/A output to the A/D input. A sequence of steps guidesthe user through complete calibration of both the D/A and the A/Dwith explicit instructions on what potentiometer to change if ad-justment should be necessary.
Control and FilteringCareful programming minimizes the computation time in the re-
cursive filtering loop. All multiply and divide operations retain fullprecision, with the final result rounded to 8-bit precision just beforeoutput to the D/A converter. The only unusual aspect of the filteringloop is that all mathematics and data manipulation that can be donewithout current sample information are done prior to waiting forthe current sample. This produces a minimum delay following thecurrent sample before the corresponding output is generated. Theoverall delay from start of conversion to next output is about 90 ,us,with 40 ys of this time required for the A/D conversion and onlyabout 50 ,ts required for calculation, scaling, error checking, andoutput from the microprocessor to the D/A.
Although there are some good arguments for requiring studentsto program control and filtering algorithms in assembly language,this does not leave nearly so much time for students to explorealgorithm performance. The emphasis in the courses where thisdevice is employed is in filter performance and digital control sys-
tem response. The filter order, coefficients, and sampling intervalare all entered in response to prompts from the computer. Anyattempt to enter values that would be out of range are rejected withan error message and the prompt is repeated. All values are en-
tered as simple signed decimal integer numbers. Once all valueshave been entered, the user simply types "RUN" to start the exe-
cution of the algorithm. The execution then continues until inter-
u. 150
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00E 00
0
5eneral PurposeFler
Maximum SpeedFilter
2 4 6 8Filter Order n
Fig. 5. Variation in filter speed with filter order.
rupted by depression of any key on the terminal keyboard or oc-currence of an error such as an out-of-range analog signal.
Examples of how this kind of digital filtering and control systemcan be used in laboratory exercises may be found in the literature[4], [9]. While the experiments described are really designed forslower and less precise computers, one of the values of using thissystem is to illustrate the superior precision and speed possiblewith this 68000-based system.
RESULTS AND CONCLUSIONSThe primary reason for developing this higher performance sys-
tem was to obtain faster sampling rates than were possible with theearlier 8-bit systems. The sampling rates realized for various filterorders are illustrated in Fig. 5. The upper curve is obtained usingthe firmware described here with no modifications. The lower curveillustrates additional improvements possible by writing special as-sembly language routines that make maximum use of the MC68000registers and execute entirely from RAM which has a shorter ac-cess time than the ROM. These sampling rates are 100 times fasterthan the corresponding rates for 8-bit M6800-based systems. Anadditional benefit is the easier algorithm programming provided asa result of the much larger allowable range of values for the coef-ficients.
Students and faculty have been enthusiastic in their response tothis system. It is easy to use and has adequate speed for a widerange of applications. The system has now become a tool for routineuse in laboratory assignments and demonstrations in the digital fil-tering and discrete-time control courses.
REFERENCES
11] G. C. Brockus, "A course in microcomputers for control applica-tions," IEEE Trans. Educ., vol. E-24, pp. 186-187, May 1981.
[2] R. M. De Santis, R. Hurteau, and G. Authie, "A real-time controldemonstrator for use in a university control laboratory," IEEE Trans.Educ., vol. E-25, pp. 18-28, Feb. 1982.
[3] D. P. Petersen, "An undergraduate laboratory for digital control andsignal processing," IEEE Trans. Educ., vol. E-24, pp. 168-173, May1981.
14] J. W. Steadman, R. G. Jacquot, and M. N. Hepworth, "A program-mable, educational, microprocessor based digital filter/compensator,"CoEd J., vol. 1, pp. 3-8, Jan./Feb. 1981.
[5] E. Luque, I. Serra, and L. Moreno, "A microprocessor-based digitalcontrol course,' IEEE Trans. Educ., vol. E-26, pp. 107-111, Aug. 1983.
