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International Journal of Mechanical Engineering and Technology (IJMET)
Volume 8, Issue 12, December 2017, pp. 781–792, Article ID: IJMET_08_12_085
Available online at http://www.iaeme.com/IJMET/issues.asp?JType=IJMET&VType=8&IType=12
ISSN Print: 0976-6340 and ISSN Online: 0976-6359
© IAEME Publication Scopus Indexed
A CASE STUDY: ANALYSIS OF SINGLE PHASE
AND HYBRID CASCADE MULTILEVEL
INVERTER WITH PWM AND LEVEL
INVERTERS
Raju J, Thamilmaran A
Department of Energy and Power Electronics,
School of Electrical Engineering, VIT University, Vellore, India
Priya M
Department of Digital Communications,
School of Information Technology & Engineering, VIT University, Vellore, India
ABSTRACT
The multilevel inverter utilization has been increased since the last decade. These
new type of inverters are suitable in various high voltage and high power applications
due to their ability to synthesize waveforms with better harmonic spectrum and faithful
output. This type of multilevel inverters synthesizes a medium voltage output based on
a series connection converter cells which use standard low-voltage component
configuration. This characteristic allows one to achieve high-quality output voltage
and current waveform however when the number of levels increased switching
component and count of dc sources for H-bridge inverter is also increased This issue
became the key motivation for the present paper. This paper develops the new cascade
multilevel inverters which use less number of switching components and dc sources. In
this paper a 11 level voltage with 3 cascade H-bridge inverter is developed.
Key words: Cascade multilevel inverter; High quality output voltages; Single level
inverter; Switching components..
Cite this Article: Raju J, Thamilmaran A and Priya M, A Case Study: Analysis of
Single Phase and Hybrid Cascade Multilevel Inverter with PWM and Level Inverters,
International Journal of Mechanical Engineering and Technology 8(12), 2017, pp.
781–792.
http://www.iaeme.com/IJMET/issues.asp?JType=IJMET&VType=8&IType=12
1. INTRODUCTION
Demand for high-voltage, high power converters capable of producing high-quality
waveforms while utilizing low voltage devices and reduced switching Frequencies has led to
the multilevel inverter development with regard to semiconductor power switch voltage
limits. Multilevel inverters include an array of power semiconductors and capacitor voltage
sources, the output of which generate voltages with steed waveforms; While the power
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semiconductors must withstand only reduced voltages (Z. Du et al., 2006). The commutation
of the switches permits the addition of the capacitor voltages, which reach high voltage at the
output,
Attractive features of multilevel inverters are as follows:-
1) They can generate output voltages with extremely low distortion and lower dv/dt.
2) They draw input current with very low distortion.
3) They generate smaller common mode (CM) voltage, thus reducing the stress in the motor
bearings. In addition, using sophisticated modulation methods, CM voltages can be
eliminated.
4) They can operate with a lower switching frequency.
The multilevel inverter has been implemented in various allocations ranging from medium
to high-power levels, such as motor drives, power conditioning devices, also conventional or
renewable energy generation and distribution. There are three commercial topologies of
multilevel voltage source inverters existing: neutral point clamped (NPC), cascaded H-bridge
(CHB), and flying capacitors (FCs). Among these inverter topologies, cascaded multilevel
inverter (CMLI) reaches the higher output voltage and power levels (13.8 KV, 30 MVA) and
the higher reliability due to its modular topology
2. SINGLE LEVEL INVERTER
2.1. Introduction
Demand for high-voltage, high power converters capable of producing high-quality
waveforms while utilizing low voltage devices and reduced switching Frequencies has led to
the multilevel inverter development with regard to semiconductor power switch voltage
limits. Multilevel inverters include an array of power semiconductors and capacitor voltage
sources, the output of which generate voltages with stepped waveforms. While the power
semiconductors must withstand only reduced voltages [10]. The commutation of the switches
permits the addition of the capacitor voltages, which reach high voltage at the output,
Attractive features of multilevel inverters are as follows:-
1) They can generate output voltages with extremely low distortion and lower dv/dt.
2) They draw input current with very low distortion.
3) They generate smaller common mode (CM) voltage, thus reducing the stress in the motor
bearings. In addition, using sophisticated modulation methods, CM voltages can be
eliminated.
4) They can operate with a lower switching frequency.
The multilevel inverter has been implemented in various applications ranging from
medium to high-power levels, such as motor drives, power conditioning devices, also
conventional or renewable energy generation and distribution. There exists three commercial
topologies of multilevel voltage source inverters: neutral point clamped (NPC), cascaded H-
bridge (CHB), and flying capacitors (FCs). Among these inverter topologies, cascaded
multilevel inverter (CMLI) reaches the higher output voltage and power levels (13.8 KV, 30
MVA) and the higher reliability due to its modular topology
2.2. Circuit Diagram
The simplest inverter to understand is the single-phase inverter, which takes a dc input voltage
and converts it to single-phase ac voltage [11]. The main components of the inverter can be
A Case Study: Analysis of Single Phase and Hybrid Cascade Multilevel Inverter with PWM and
Level Inverters
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either four silicon controlled rectifiers (SCRs) or four transistors. Fig.1a. shows a typical
inverter circuit that uses four SCRs, and Fig 1b. Shows a typical inverter circuit output
waveforms. Originally called a dc-link converter, now it's simply called an inverter.
Figure 1 Single phase full inverter (a),wave forms(b)
2.3. Single Phase Two level inverter operation
The diagram in Fig1a. Shows four SCRs used in the inverter circuit. In this circuit SCR1, and
SCR4 are fired into conduction at the same time to provide the positive part of the ac
waveform and SCR2 and SCR3 are fired into conduction at the same time to provide the
negative part of the ac waveform. The waveform for the ac output voltage is shown in this
figure -- notice that it's an ac square wave. A phase-angle control circuit is used to determine
the firing angle, which provides the timing for turning each SCR on so that they provide the
ac square wave. The load is attached to the two terminals where the ac square wave voltage is
supplied.
2.4. General equations of single Phase Two level inverter
Average voltage of single phase inverter Vavg=0
RMS voltage of single phase inverter Vrms=Vd
Peak voltage of inverter Vpk= vd
Peak-peak voltage of inverter =2Vd
2.5. Fourier Analysis of Single phase two level inverter
tnn
vv
n
s
o
sin4
5,3,1
(1)
)sin(.
4
5,3,1
n
n n
s
o tnZn
vi
(2)
Where Zn=load impedance at frequency n.f
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=
21
22 ])1
([Cn
LnR
and phase angle n = R
CnLn
1
tan 1
Power 10002
01 cosivRIP (3)
3. THREE LEVEL INVERTER
3.1. Circuit diagram of three level inverter
Figure 2 Three-Level inverter circuit
3.2. Three Level Inverter circuit Operation
Inverters are used for converting DC voltage into AC voltage. Their construction typically
makes use of power transistors and diodes. These are operated as electronic switches. In
conventional designs using "hard" switching, this gives rise to switching losses which,
especially for high values of the switching frequency, cause a reduction in their energy
conversion efficiency. To improve their efficiency, high-power inverters (from about 10 kW)
frequently make use of a technique referred to as a three-level design (three-level inverter).
Forming the basis of the three level inverter is a hard-switching three-level inverter of this
kind with a T-type topology. This base design is supplemented by a snubber circuit consisting
of a few passive components [8]. It prevents the occurrence of simultaneously high values of
voltage and current, and hence high power dissipation values, during the switching process.
All switching processes therefore take place in a "soft" manner. In this way switching losses
are largely avoided. Furthermore, because the snubber circuit functions, in principle, without
losses, the conversion efficiency of the inverter remains high even for high values of the
switching frequency.
A Case Study: Analysis of Single Phase and Hybrid Cascade Multilevel Inverter with PWM and
Level Inverters
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3.3. Two and Three level total Harmonic Distortion Analysis
Normally Total harmonic distortion is calculating as follows,
THD=1
4,3,2
2
v
vi
n
(4)
Where V1 is fundamental voltage,
V2, V3, V4, Vn.are harmonic components
Table I Different total harmonic distortion levels
Waveforms Signal
transitions
per- period
Harmonics
eliminated
Harmonics
Amplified
System
Description
THD
2 - - 2-level Square
Wave
=45%
4 3,9,27.. - 3-level Square
Wave
>23.8%
8 - - 5-level Square >8.3%
10 3,5,9.. 7,11 2-level PWM >1.2%
12 3,5,9.. 7,11 2-level Very
Low PWM
-
3.4. Wave forms of Fundamental and 2nd
and 3rd
harmonics
Fundamental frequency =f1 (6)
Third harmonic frequency=3f1 (7)
Fifth harmonic frequency =5 (8)
Nth
harmonic frequency=nf1
(9)
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Figure 3 Wave forms of single level inverter with harmonic components
From the above table conclusion is if output level of inverter increases total harmonic
distortion (THD) is decreasing so that we are going for 11 level cascaded hybrid multilevel
inverter.
4. FIVE LEVEL SCASCA DE MULTILEVEL INVERTER
4.1. Circuit Diagram
The below fig shows the cascade hybrid five level inverter, in this we are using two dc
sources and eight IGBT’S, diodes will act as freewheeling operation. The output levels are
calculating as follows as
Ni=2m+1 (10)
Where,
Ni =the no of output levels
M=number of input DC sources
Figure 4 Cascade hybrid Five Level inverter
A Case Study: Analysis of Single Phase and Hybrid Cascade Multilevel Inverter with PWM and
Level Inverters
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4.2. Operation of five level inverter
Conventional cascaded multilevel inverters are one of the most important topologies in the
family of multilevel and multi-pulse inverters. The cascade topology allows the use of several
levels of DC voltages to synthesize a desired AC voltage. The DC levels are considered to be
identical since all of them are fuel cells or photovoltaics, batteries, etc. It requires least
number of components compared to diode-clamped and flying capacitors type multilevel
inverters and no specially designed transformer is needed as compared to multi pulse inverter
[4]. Since this topology consist of series power conversion cells, the voltage and power level
may be easily scaled. The concept of this inverter is based on connecting H-bridge inverters in
series to get a sinusoidal voltage output. The output voltage is the sum of the voltage that is
generated by each cell. The number of output voltage levels are 2m+1, where m is the number
of cells. The switching angles can be chosen in such a way that the total harmonic distortion is
minimized. An n level cascaded H-bridge multilevel inverter needs 2(n-1) switching devices
where n is the number of the output voltage level. Five level CHB inverter Cascade topology
proposed in uses multiple dc levels, which instead of being identical in value are multiples of
each other [2]. It also uses a combination of fundamental frequency switching for some of the
levels and PWM switching for part of the levels to achieve the output voltage waveform. This
approach enables a wider diversity of output voltage magnitudes; however, it also results in
unequal voltage and current ratings for each of the levels and loses the advantage of being
able to use identical, modular units for each level.
The out wave forms of above inverter is follows as
Figure 5 five level inverter output waveforms
4.3. THD analysis of five level inverter
Total harmonic distortion, or THD, is the summation of all harmonic components of the
voltage or current waveform compared against the fundamental component of the voltage or
current wave. THD calculations can be obtained from the SIMULINK. The switching pattern
that is used in this project for all of the multilevel inverters is Sinusoidal PWM technique. In
this method the switching angles for switches should be calculated in such a way that the
dominant harmonics are eliminated (minimized). For a 5-level inverter the 5th harmonic will
be eliminated.
1
22
4
2
3
2
2 ...........
v
vvvvTHD
n *100 (11)
Where,
v2,v3,v4,…….vn are harmonic components
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v1 is fundamental component
The formula above shows the calculation for THD on a voltage signal. The end result is a
percentage comparing the harmonic components to the fundamental component of a signal.
The higher the percentage, the more distortion that is present on the mains signal.
5. HYBRID CASCADE MULTILEVEL INVERTER
The class of inverter is highly visible in grid connected / photo voltaic systems. One H-bridge
module is operated in PWM mode and others are operated in fundamental switching mode.
Thus this kind of switching topology helps in reducing the switching losses. Terminal voltage
of bridge 1 and 2 are fundamental voltages and terminal voltage for bridge 3 is PWM voltage.
Combing all such voltages produces a resultant waveform. Greatest complexity is the
presence of third harmonic component and complexity in the switching scheme.
Figure 6 11-Level cascade hybrid multilevel inverter
5.1. Circuit Operation
Fig.6 shows an 11 level cascaded H-bridge multilevel inverter. The converter consists of three
series connected H-bridge cells which are fed by independent voltage sources. The outputs of
the H-bridge cells are connected in series such that the synthesized voltage waveform is the
sum of all of the individual cell outputs. The output voltage is given by
V=V1 +V2+V3 (12)
Where the output voltage of the first cell is labelled V1, the output voltage of the second
cell is denoted by V2 the output voltage of the second cell is denoted by V3.The three inverter
output voltages are in terms of +vdc/2,0,-vdc/2. The main advantages of cascaded H-bridge
inverter is that it requires least number of components, modularized circuit and soft switching
can be employed. The voltage level of bridge 1 is V1=100 volt, the voltage level of second
bridge 2 is V2=40 volt and the voltage level of second bridge is V3=40 volt PWM output.so
the final output maximum voltage is 180 volt
A Case Study: Analysis of Single Phase and Hybrid Cascade Multilevel Inverter with PWM and
Level Inverters
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Table II Switching scheme of level and PWM inverter
Inverter + cycle on -cycle on
Level inverter 1 S9,S10 S12,S11
Level inverter 2 S5,S6 S7,S8
PWM inverter S1,S2 S3,S4
Table III Triggering pulses for switches
The switching pulse for following system are given as shown in figure 2 and when the
corresponding levels inverter switches are on it is shown is above table. The resultant output
wave form of the each inverter is giveninfigure3.
Figure 7 pulses for hybrid cascade multilevel PWM AND LEVEL inverter
5.2. Modulation Index
For an n-level inverter, the amplitude modulation Index, na, is defined as
na=
( ) (13)
Where,
Pa is the peak-to-peak reference waveform amplitude
Pc is the peak-to-peak carrier waveform amplitude.
Switch Switch pulses output voltage level (1 column=1millisecond)
S9,S10 0 0 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0
S12,S11 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 0 0
S5,S6 0 1 0 0 1 1 0 0 1 0 0 0 1 0 0 0 0 1 0 0
S7,S8 0 0 1 0 0 0 0 1 0 0 0 1 0 0 1 1 0 0 1 0
S1,S2 PWM pulses are given to these switch
S3,S4 PWM pulses are given to these switch
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Peak to peak of the resultant output voltage of level 1 is 40 volt peak to peak. The
resultant output voltage of level 1 is 40 volt PWM peak to peak. Level inverter 1 have dc
source of 100 volt the pulse give to these switches are pulse 1a and pulse 1b. Level
Figure 8 Output wave forms of PWM and level inverter
Inverter 2 have dc source of 40 volt the pulse give to these switches are pulse 2a and pulse
2b.Level inverter 3 have dc source of 40 volt the pulse give to these switches are pulse 3a and
pulse 3b. the resultant output voltage of level 1 is 200 volt-
Final resultant output voltage is 180volt maximum by cascading all inverter in series. Due
to the use of PWM inverter the harmonics are reduced as compared to normal multilevel
inverter.
6. MATLAB/SIMULINK SIMULATION
Figure 9 MATLAB simulation of hybrid cascade multilevel inverter
A Case Study: Analysis of Single Phase and Hybrid Cascade Multilevel Inverter with PWM and
Level Inverters
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Figure 10 MATLAB simulation final output result of cascade multilevel inverter
7. CONCLUSIONS
The need for efficient power conversion due to the explosive growth in renewable energy and
reduced output ripple for sensitive devices has increased the demand for multilevel inverter.
Multilevel inverter with more efficient output is needed. So a new topology with reduced
switch reduced number of sources, reduced sources count will result in reduced cost,
complexity and losses. Harmonic contents present in the output were reduced using optimized
PWM waveform technique. In this paper, advanced topologies have been developed for
multilevel inverters to generate 11 levels voltage at the output .these, dc source and losses is
needed. In this paper, a new topology has been designed with reduced number of sources,
reduced sources count will result in reduced cost, complexity and losses. Harmonic contents
present in the output were reduced using optimized PWM waveform technique. In this paper,
advanced topologies have been developed for multilevel inverters to generate 11 levels
voltage at the output.
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