Analysis and Design of a Multiple Feedback Loop Control Strategy for Single Phase Voltage Source UPS...

8/2/2019 Analysis and Design of a Multiple Feedback Loop Control Strategy for Single Phase Voltage Source UPS Inverters

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53 2 IEEE TRANSACTIONS O N POWER ELECTRONICS, VOL. 11 , NO. 4, JULY 1996

Analysis and Design of a Multiple FeedbackLoop Control Strategy for Single-phaseVoltage-Source TJPS InvertersNaser M. A b d e l - R a h i m , Student Member, IEEE, a n d John E. Q u a i c o e , Senior Member, IEEE

Abstract- This paper presents the analysis and design of amultiple feedback loop control scheme for single-phase voltage-source uninterru ptihle power supply (UPS) inverters with an L-Cfilter. The control scheme is based on sensing the current in thecapacitor of the load filter and using it in a n inner feedback loop.An out er voltage feedback loop is also incorporated to ensure tha tthe load voltage is sinusoidal and well regulated. A general state-space averaged model of the UPS system is first derived an d usedto establish the steady-steady quiescent point. A linearized smallsignal dynamic model is then developed from the system generalmodel using perturbation and small-signal approximation. Thelinearized system model is employed to examine the incrementaldynamics of the power circuit and select appropriate feedbackvariables for stable operation of the closed-loop UPS system.Experimental verification of a laboratory model of the UPSsystem under the proposed closed-loop operation is provided forboth linear and nonlinear loads. It is shown that the controlscheme offers improved performance measures over existingschemes. It is simple to implement and capable of producingnearly perfect sinusoidal load voltage waveform at moderateswitching frequency and reasonable size of filter parameters.Furthermore, the scheme has excellent dynamic response andhigh voltage utilization of the dc source.

I. INTRODUCTIONNINT ERRU PTIBL E POWE R supplies (UPSS) are usedU o interface critical loads such as computers and commu-nication systems to the utility sy stem. The output voltage of the

UPS inverter is required to be sinusoidal with minimum totalharmonic distortion. This is usually achieved by employing acombination of pulse-width modulation (PW M) sche me and asecond-order filter at the output of the inverter.

One way of achieving a clean sinusoidal load voltage is byusing a sine pulse width modulation (SPWM) scheme [1 , [2].In this technique, the load voltage is compared with a referencesinusoidal voltage waveform and the difference in amplitudeis used to control the modulating signal in the control circuitof the power inverter. A more advanced technique employsa programmed optimum PWM scheme that is based on theharmonic elimination technique [ 3 ] , 4]. These schemes havebeen shown to perform well with linear loads. However, withnonlinear loads the PWM scheme does not guarantee lowdistortion of the load voltage.

Manuscript received July 1, 1994; revised February 19, 1996. This workwas supported in part by the Natural Sciences and Engineering ResearchCouncil (NSERC).The authors are with the Faculty of Engineering and Applied Science,Memorial University of Newfoundland, St. Johns A l B 3x5, anada.Publisher ltem Identifier S 0885-8993(96)05164-2.

To overcome this drawback, a real-time feedback controlscheme using dead-beat control was proposed [ 5 ] ,[6]. histechnique employs the capacitor voltage and its derivative ina control algorithm to calculate the duration of the ON/OFFstates of the inverter switching devices such that the capacitorvoltage is exactly equal to the reference voltage at the nextsampling time. Although this technique has been successfullyimplemented for single- and three-phase applications, it has thefollowing drawbacks: 1) it is complex to implement; 2) it issensitive to parameter variations; and 3) its control algorithmrequires the estimation of the load parameters [7] .

In order to achieve a control scheme that overcomes theabove disadvantages, a current regulated control scheme fordc/ac applications was proposed in [8]. In this technique,the current in the filter capacitor is used as the feedbackvariable in a two-switch inverter circuit topology to achieve asinusoidal capacitor current. An outer voltage control loop isalso incorporated for load voltage regulation and compensationfor imperfections in the implementation of the current control

Although the technique results in a sinusoidal capacitorcurrent, the power circuit configuration and the switchingscheme used to implement the technique produce a loadvoltage that is sinusoidal with dc offset. For UP S applications,the presence of the dc voltage offset is unacceptable.

This paper investigates the suitability of a current-regulatedvoltage-controlled strategy for a single-phase voltage-sourcehalf-bridge inverter with a second-order filter. The schemeincorporates an inner capacitor current loop, an outer capacitorvoltage loop, a fixed switching frequency, and variable dutycycle approach to produce sinusoidal output voltage withminimum harmonic distortion. The fixed switching frequencyapproach produces a defined frequency spectrum at the inverteroutput, which makes it easier to design an electromagneticinterference filter to prevent interference with communicationcircuits.

The paper is organized as follows: Section I1 providesthe steady-state performance of the UPS system under open-loop control. A procedure for selecting appropriate feedbackvariables that result in a stable operation of the closed-loop system is provided in Section 111. The proposed controlstrategy is proposed in Section IV. Section V presents adesign procedure for selecting the gains of the inner and outerfeedback loops. The control block of the proposed controlstrategy, its principle of operation, computer simulation, and

loop.

0885-8993/96$05,00 0 996 IEEE


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ABDEL-RAHIM AND QUAICOE: ANALYSIS AND DESIGN OF A MULTIPLE FEEDBACK LOOP CONTROL STRATEGY

=d t

533

-3 _ -1L f R1 ? [?!:;- -

01 -11 L 1 vc(t)- -- Cf Cf

Fig. 1. The single-phase half-bridge UP S inverter.

experimental verification are presented in Section VI. Finally,conclusions are drawn in Section VII. time-dependent duty cycle dl ( t ) 9], as

11. ANALYTICAL O D E L O F T HE OPEN-LOOPSYSTEM: TEADYSTATEPERFORMANCE where V, is the amplitude of the carrier waveform.For a modulating signal given byFig. 1 shows the circuit diagram of the single-phase half-bridge voltage-source UP S inverter. It consists of a load filter( L f an d C f ) nd an R-L load.

The system differential equations can be written in state-v m ( t )= V, sin(w,t) ( 3 )

the system state-space averaged continuous equation can bespace form as

-3L fd- Z l ( t ) = 0d t

- Cf1-

-1-?L10

where S;= 1 when SI s ON an d Sf 0 when SI s OFF.Equation (1) is discontinuous due to the presence of the

switching function ST.One way of studying the systemperformance and characterizing its behavior is to solve (1)numerically and simulate the system behavior at variousoperating points and system parameters. This method has thedisadvantage of being computationally intensive and provideslittle insight into the operation of the system.On the other hand, an averaged time-continuous model ofth e UPS system can be obtained for (1) by assuming thatthe inverter switching frequency, fs, is much higher than thefrequency of the modulating signal, v, ( t ) . onsequently, thediscontinuous switching function Sf can be replaced by its

obtained by substituting the discontinuous switching function,S;, n (1) by its average value in ( 2 ) an d (3). The resultantsystem equation is obtained as

V,M = - .v,

(4)

( 5 )The first row of (4) indicates that the averaging processreplaces the effect of the inverter switching function with acontrollable sinusoidal voltage source of magnitude M V&. tshould be noted that (4) is valid only through the linear rangeof operation, i.e., M 5 1.0.

Assuming that the resistance associated with the filter induc-tor is negligibly small, the equivalent circuit of the averagedUPS system is as shown in Fig . 2.


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534

2000 . . . . . . . . . . . . .1000. . . . . . . . . . . . . . . . . : . . . . . . . . . ! . . . . .rv)

X.- 0 .................a... . . . . . . . . . . . . . . . . .E -1000. . . . . . . . . . . . . . . . . :. . . . . . . . . . . . . . ...m

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 11, NO. 4, JULY 1996

-2000,.-3000

I -

. . . . . . . . . . . . . . . . .

4Y nn

2000v) 1000o, 0sg -1000m- 2 m-3000

Fig. 2. Equivalent circuit of the averaged UPS system.

1

. . . . . . ; . . . . . . : . . . . . . . . . . . . . .

. . . . . . ! . . . . . . . . . . . . . . . . . . . . . .

..........................................

. . . . . . . . . .. . ....................

. . . . . . .' . . . . . . . . . . . . .:. . . . . . . . . . . I . . . . . .

The system steady-state variables are obtained from Fig 2.using the following phasor analysis

an d(9)

where n? is the ph as y reyresy ta t i2n of the modulat ingsignal M sin(w,t) andl,, ,V,, , I,, . I, , are the steady-statevariables of the inverter output current, capacitor voltage andcurrent, and load current at the modulating signal frequency,U,, respectivelyZL,+- XLmXcfm + X Z f m ( X c f m - &L) + I& (XZfm- & f m )

Rl+ J ( X I , - X c f m )(10)rT

- X I , - X c f m - R1Xcfm-

Equations (6)-(9) give the system steady-state variables interms of the load parameters and filter components and repre-sent the steady-state quiescent operating point of the system.

111. STABILITY ANALYSIS F THE UPS S YS TEMIn order to ensure that the UPS system will produce thenominal load voltage, irrespective of disturbances such as

variations in the input supply voltage, perturbations in theswitching times, and the load, a real-time feedback controlscheme is proposed. However, to successfully implementthe real-time feedback control scheme, the power circuitincremental dynamics are examined with a view to selectingthe appropriate feedback variables. It is assumed that theincremental variation in the control signal is much slower

9nM . IL""" I I,-, i nML 1I0U o l ' -

Fig. 3 . Locus of the roots of the power circuit incremental dynamicsfo r a load impedance of 10 R at 0.7 power factor lagging loads,L f = 5.0 mH. C f = 100pF, an d Vd,= 100 .0 V.than the bandwidth of the control loop. Hence, a quasistaticapproach is used to carry out the investigation [lo], [ l l ]


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ABDEL-RAHIM AND QUAICOE: ANALYSIS AND DESIGN OF A MULTIPLE FEEDBACK LOOP CONTROL STRATEGY 535

The system equation given by (4), hough time contin-uous, is nonlinear. The nonlinearity arises from the terms(q t ) / l l( t ) )&t ) u c ( t ) / l l t ) ) and m(t)vd,(t). In order todevelop a dynamic model of the UPS system, the systemequations are first linearized around a nominal steady-state op-erating point. This is carried out using perturbation techniqueand small-signal approximation. The resulting small-signaldynamic model can be written as

(12)Gc, 5, indicate incremental changes in the inverteroutput current, capacitor voltage, and current, resp_ectively,as

a result of incremental changes in the duty cycle, d and hencethe modulation index, f i [see ( 2 ) ] .Equation (12) shows thatthe location of the system poles is dependent on the inputdc voltage ( V d c ) , the system parameters (L l ,Rl,L f an d C f ) ,and the incremental change in the modulation index, 61 orimplicitly, the duty cycle, 2.

Fig. 3(a) shows the locus of the roots of the incrementaldependence of the capacitor voltage due to 10% incrementalchange in the modulation index 7j i . The figure shows thatemploying the capacitor voltage as the feedback variablemakes the system dominant poles move along the imaginaryaxis of the s-plane. The figure also shows that the locationof the system poles are not only dependent on the systemparameters, but they are also time varying. For the circuitparameters given in Fig. 3, it can be seen that the frequencyof the dominant poles can be as high as 4530 radls. This hasthe effect of producing high-frequency oscillations in the loadvoltage. Such behavior is not acceptable for UPS app lications.As a result, the capacitor voltage cannot be employed as thefeedback variable for the closed-loop operation of the UPSsystem.Fig. 3(b) shows that closing the loop around the inverteroutput current makes the system poles move farther intothe left half of the s-plane, resulting in stable closed-loopoperation of the UPS system. However, in order to generatethe reference waveform for the feedback control of th e inverteroutput current, the instantaneous value of the load current mustbe known . Th is will require an additional current sensor. Fromthe point of view of cost, this control scheme is not attractive.

Fig. 3(c) shows the locus of the roots of the incremental de-pendence of the capacitor current due to incremental changesin the modulation index. The figure shows that closing theloop around the capacitor current results in m oving the systempoles farther into the left half of the s-plane. This has the effectof providing active damping to any oscillation that may takeplace in the power circuit. Consequently, a stable operationof the closed-loop control scheme is achieved. Therefore, the

capacitor current is, chosen as the feedback variable for theclosed-loop operation of the UPS system.

Although choosing the capacitor current as the feedbackvariable results in a stable operation of the closed loop UP Ssystem and ensureis sinusoidal capacitor current, it does notguarantee sinusoidal capacitor (load) voltage, especially whenthe inverter output voltage is nonsinusoidal (i.e., PWM).Therefore, in order to achieve sinusoidal capacitor voltage andcurrent, an outer capacitor voltage feedback loop is also used.

IV. THE PROPOSED PS CONTROL YSTEMThe resultant configuration of the proposed control schem e

offers many advantages for UPS system applications. Theinner current loop] provides an inherent peak current limitin the power circuit, especially during "cold" start of thesystem. In addition, since the capacitor current represents therate of change of the load voltage, the control scheme iscapable of predicting and correcting near-future variations inthe load voltage and thus providing a fast dynamic response.Furthermore, the outer voltage loop regulates the load voltageand produces a stiff ac voltage supply as well as ensures asinusoidal load voltage within the acceptable total harmonicdistortion (THD).Fig. 4shows the UPS system with an inner current loop andan outer voltage loop. The error signal e ( t ) s obtained fromsuccessive comparison of the capacitor voltage and currentwith their respective reference signals. The inverter switchingpattern is then obtained from a comparison of e ( t ) and a fixedhigh-frequency (4.0 kHz) triangular w aveform. Th e resultantswitching pattern, which has a fixed switching frequency withvariable duty cycle, produces a sinusoidal load voltage withlow harmonic content.

v. I ~ N A L Y S I SAN D DESIGN F THEF E ~ E D B A C KONTR OL C HEMEIn order to achieve a UPS system with fast dynamic

response and small steady-state error between the load voltageand its reference waveform, both regulators of the feedbackloop have to be carefully designed. The open-loop transferfunction of the inner current loop, G , , ( s ) , is obtained fromthe third row of (12) as

s s +i3)

Fig. 5 shows thle Bode plot of the inner current loop fo rvarious load conditions. The figure shows that the innercurrent loop exhibits a band-pass filter-like characteristics.The figure also shows that the bandwidth of the inner currentloop is not affected by the load variations. It can be seenfrom the figure that the loop possesses a phase margin of270' an d 90" and a theoretical gain margin of infinity.


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53 6 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 11, NO . 4, JULY 1996

1

Fig. 4. The proposed control scheme of the single-phase UP S inverter.

50

U4-501oo 10' 1o2 1o3 10' 1os 1o6Frequency in rad/sec

Frequency in rad/secFig. 5 . Bode diagram of the open-loop transfer function of the inner current loop of th e UPS system: L f = 5.0 mH. C f = 100.0 pF, an d21 = 8. 8 f l , V i j c = 100.0 V.

The closed-loop transfer function of the inner current loopfor unity and 0.7 power factor lagging loads is shown inFig. 6.

The figure shows that the loop possesses a relatively narrowbandwidth with a significant phase error in both cases. Theloop bandwidth can be widened by employing proportionalcontroller (5.)n the feed-forward path of the inner currentloop. However, to avoid excessive gain in the inner currentloop and produce a system that is immune to switching noise,k p c is chosen such that the gain of the closed-loop transfer

function of the inner current loop exhibits near-unity gain fromw G 200 radls up to half the inverter switching frequency(i.e., w G 12500 rad/s). And, since the bandwidth of the innercurrent loop is slightly wider for 0.7 power factor laggingloads (see Fig. 6), the choice of k,, is carried out for thiscondition (i.e., worst-case scenario). It can be shown that forkp c = 2.0, the gain of the closed-loo p transfer function is 0.94at w = 125 00 rad/s. The Bode diagram of the closed-looptransfer function of the inner current loop with k p c = 2. 0is shown in Fig. 7. The figure also shows that the loop


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ABDEL-RAHIM AND QUAICOE: ANALYSIS AND DESIGN OF A MULTIPLE FEEDBACK LOOP CONTROL STRATEGY 53 1

10' 1OBFrequency in radlsec.-1oo 1 iz 10' 1o6Frequency in rawsec

Frequency in rad/sec Frequency in radsecFig. 6.an d 21 = 8.8 Q , & , = 1 0 0 . 0 V .Bode diagram of the closed-loop transfer function of the inner current loop of the UPS system ( I C p c = 1 . 0 ) : L f = 5. 0 mH , Cf = 1 0 0 .0 p F ,

0

mU.z 20d.-

10' 10 1o3 I0' 1 sFrequency in rad'seclOOL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .py;;;;;;;.... i i ; ; ; ; ; ; ; 1 : : ; ; ; ; ; ; 1 ; ; ; ; : ; ; ;. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . .. . . . .)

1o6

. . . . . . . , . .. .. . .. .. . .. .. . . .

' . I

I 10' IO' 1o6Frequeq- in rad'secFig. 7.an d 21 = 8.8 f l at 0.7 power factor lagging, v d c = 1 0 0 . 0 V.Bode diagram of' the closed-loop transfer function of the inner current loop of th e UPS system with k, , = 2.0 . L f = 5.0 mH; Cf = 1 0 0 . 0 p F ,

bandwidth has been increased and the error in the phase overthe frequency range of interest (w E 200 to 12500 rad/s) hasbeen reduced.

The small-signal open-loop transfer function of the outer-

transfer function of the inner current loop as

1 k p c G i c ( s )G,c(s) =-oltage feedback loop is obtained in terms of the open-loop .Cf 1+ k,cGi,(s)


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53 8 IEEE TMNSACTIONS ON POWER ELECTRONICS, VOL. 11, NO . 4, JULY 1996

50

0

-50

1oa 10' 1o2 1oJ 10' 1os 1OBFrequency in radsec0

. . . . .. . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . . .. . . . . . . .. . . . . . . . .\. . . inmra

1oo 10' 10 10 1o* 1oeFrequency in rad'secFig. 8.an d 21 = 8.8 n,Vdc = 1 0 0 . 0 V .

Bode diagram of the open-loop transfer function of the outer-voltage loop of the UP S system with kpc = 2 . 0 ,L f = 5 . 0 m H , Cf = 1 0 0 . 0 pF,

U

-

w I I I I I I I511 1.5 2 2.5 3 3.5 4 4.5

k PV

I I I I I I I I1 1.5 2 2.5 3 3.5 4 4.5 5kPv

0.1'Fig. 9.and 21 = 8.8 Cl,,l


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ABDEL-RAHIM AND QUAICOE: ANALYSIS AND DESIGN OF A MULTIPLE FEEDBACK LOOP CONTROL STRATEGY

Z,=lO.O R (1.0 pu ) atlagging power factor of

-53 9

0.7 p o we r factor laggingload with Zi

TABLE ITH D OF TH E LOAD OLTAGE AS THE LOAD ND FILTERARAM E T E RS CHANCE

X,f,,=0.88 PUX,fm=0.fi6 PU

T H D '%THD '%T H D '%X,fm=0.53 PU

Rd in pu1.0 2.0 3.0 4.0

5.22 3.48 2.78 2.224.62 2.99 2.41 1.964.07 2.53 2.01 1.76

0. 6 I 0.8 I 1. 0Xlf,=0.18 pu 4.0 pu 1 2.0 pu 1 1.33 pu

T H D % I 4.71 I 3.52 I 2.19 I 3.62 I 3.46 I 3.28X,,,=O.l pu 1

X,/,=2.50 puT H D %

X+&=O.l puX,fm=3.0 p u

TABLE I1TH D OF TH E FILTER:APACITOR VOLTA GE WITH A BRIDGE ECTIFIERSTH E NONLINEAR20AD (vdc = 100.0 v, X l f m = 0.15 pU)

0.44 0.41 0.40 0.40 0.42 0.41

X,f7 , ,=5.0 puTH D 7% 11.16 12.23 5 .14 12.32 10.71 11.93T r i g OV CH

To inverter switches4 t

Fig. 10.(Cd = 2500 p F , Rd = 20.0 n).The proposed UP S with a bridge rectifier as the nonlinear load

value shifts the system cross-over frequency to a higher value,thus reducing the available gain and phase margin of the outervoltage loop. Hence, the value of k,, is chosen such thatthe steady-state error between the capacitor voltage and itsreference waveform is within an acceptable value (chosen tobe less than 2%).

Fig. 9 shows the effect of k p , on the steady-state errorbetween the capacitor voltage and its reference waveform forthe closed-loop operation of the UPS system (shown in Fig. 4).The figure shows that the error decreases with increasingvalues of IC, and for k,, 2 2.75, the error is less than 2.0%.Thus , I C p , is chosen as 2.75.

The performance of the proposed UP S system was investi-gated by simu lating its behavior at various loa ding condition s.The input capacitor voltage of 100 V is chosen as 1.0 pu ,while the load impedance of magnitude 10 s1 is chosen thebase value for impedances.

Table I shows the effect of changing the magnitude andphase angle of the load on the THD of the load voltage forvarious values of filter series inductive reactance, X l fm l an dfilter shunt capacitive reactance, X,,,. The table shows thatfo r Xlf, = 0.18 pu an d X,f, = 2.5 the THD of the loadvoltage is very small. Also, it can be shown that the filterratingkost for these values is minimum.

The performance of the proposed control scheme undernonlinear load conditions was also investigated. The nonlinearload was chosen as a bridge rectifier with an output dc filter,Cd , an d a resistive load as shown in Fig. 10.

50V 20mV 5msFig. 11 .system. Experimental results of the transient response of the proposed UP S

T r i g 5 V CH1

50V 50mV 5ms SAVEExperimental results of the steady-state response of the proposedig. 12.UPS system.

Table I1 shows the effect of varying the load resistance onth e TH D of the load voltage for various values of X , f m . Thetable shows that with larger filter capacitor a load voltagewithin th e acceptabllc TH D can be obtained at adv erse loadingconditions.


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540 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 11, NO. 4, JULY 1996

T r i g 65mV CH2 VERT

5ov 5OmV 5mr(b)

Fig. 13. Experimental results of the dynamic response of the proposed UPSsystem for a 100% step change in the load: (a) 100% application of the loadan d (b ) 100% removal of the load.

VI. EXPERIMENTALESULTSA prototype experimental module of the proposed UPS

(Fig. 4) was built to verify the operation of the control strategy.Both the actual capacitor voltage and current in the powercircuit were sensed, filtered, and used as the control variables.

Fig. 11 shows the transient response from cold s tartto full load of the proposed UPS system. The upper traceshows the capacitor voltage and the lower trace shows thecapacitor current. The capacitor current was recorded byobserving the voltage drop across a current shunt of 10.0 m Rresistance. The figure shows that the system takes about aquarter cycle to reach the steady-state values of the capacitorvoltage and current. The steady-state load voltage and currentwaveforms of the UPS system are depicted in Fig. 12. Thefigure shows that the control strategy is capable of producinga nearly perfect sinusoidal load voltage at moderate switchingfrequen cy. The total harmonic d istortion of the capacitor (load)voltage was measured as 2%.

Fig. 13 shows the dynamic response of the UPS systemfo r 100% step change in the load from no load to full load.

:V 5ms SAVEFig. 14 . Experimental results of the proposed UPS system feeding afull-bridge rectifier with an R-L load.

The figure shows that the system exhibits very fast dynamicresponse with excellent load voltage regulation from no-loadto full-load and with very little change in the load voltage atthe point of applying the full load, indicating that the controlscheme ensures a sti ff load voltage.

The system performance with nonlinear loads is shownin Fig. 14. The nonlinear load was chosen as a full-bridgerectifier feeding an R-L load (R = 20.0 R an d L = 16.0 mH).The load current was recorded by observing the voltage dropacross the load resistance using & attenuation oscilloscopeprobe.

Figs. 12-14 show that the proposed control scheme iscapable of supplying both linear and nonlinear loads withexcellent voltage regulation and minimum distortion in theload voltage.

VII. CONCLUSIONA multiple feedback loop control strategy for a single-phase

voltage-source UPS system has been described in the paper.The system performance under open-loop control strategy wasfirst studied to obtain the steady state performance of theUP S system. The power circuit incremental dynamics wasthen investigated to assess the system stability and selectappropriate feedback variables for the closed-loop controlof the system. The stability analysis showed that a feed-back control system with an inner capacitor current con-trol loop and an outer capacitor voltage feedback loop re-sults in a successful operation of the UPS system. The pro-posed control strategy offers many features that are attrac-tive for UPS applications. In addition to the basic featuresof most feedback control systems, such as insensitivity toparameter variations and robustness, the scheme is capa-bl e of producing nearly perfect sinusoidal load voltage atany load power factor with excellent load voltage regula-tion. The scheme also possesses very fast dynamic responseand lends itself to both linear and nonlinear load applica-tions.


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REFERENCESP. D. Ziogas, Optimum voltage and harmonic control PWM techniquesfor three-phase static UPS inverters, IEEE Truns. Ind. Applicat., vol.IA-16, no. 4, pp. 542-546, July/Aug 1980.P. D. Ziogas, S. Manias, and E. P. Wiechman, Applications of currentsource inverters in UPS systems, IEEE Trans. Ind. Applicut., vol. 25 ,no . 3, pp. 408418, May/June 1989.M. Boost and P. D. Ziogas, State of the art PWM techniques: A criticalevaluation IEEE Trans. Ind. Applicat. , vol. 24, pp. 271-280, Mar./Apr.1988.P. Enjeti, J. F. Lindsay, P. D. Ziogas, and M. H. Rashid, New currentcontrol scheme for PWM inverters, Prvc. IEE, vol . 135, pt. B., no. 4,July 1988.A. Kawamura, T. Haneyoshi, and R. G. Hoft, Dead beat controlledPWM inverter with parameter estimation using only voltage sensor, inIEEE Power Electronics Specialists Cvn$ ( PES C ) , 1986, pp. 576-583.A . Kawamura and K. Ishihara, High-frequency deadbeat control ofthree-phase PWM inverte used for uninterruptible power supply, inIEEE Power Electronics Specialists Con$ ( PES C J ,Koyoto, Japan, Apr.1 9 88 , pp . 6 4 4 6 4 9 .A . Kawamura and T. Yokoyama, Comparison of five different ap-proaches for real-time digital feedback control of PWM inverters, inIEEEInd. Appl. Soc. Ann. Mee t . , Seattle, WA, Oct. 1990, pp. 10 05-1011.N. R. Zargari, P. D. Ziogas, and G. Joos, A two switch high per-formance current regulated DC/AC converter module, in Proc. IEEEIndustry Applicutivns Society Ann. Mee t . , 1990, pp. 929-934.R. Wu, S. B . Dewan, and G. R. Slemon, Analysis of an ac-to-dc Voltage-Source Converter Using PWM With Phase and AmplitudeControl, IEEE Trans. Ind. Applicat., vol. 27, pp. 355-364, Mar./Apr.1991.

of modulation and contrutility interface applical

Naser M. Ahdel-Rahim (S87) was born in C airo,Egypt. He received the B S c . Eng (Hons.) degreein electrical engineering from Zagazig University,Shoubra, Egypt in 1984, and the M.Eng. and Ph.D.degrees from Memorial University of Newfound-land, St. Johns, Canada, in 19 89 and 1995, respec-tively.From 1984 to 1986 he worked as an Asso-ciate Lecturer at Zagazig University, where he iscurrently an Assistant Professor in electrical engi-neering. His current research interests are in the area01 of inverters for uninterruptible power supplies andtions.

John E. Quaicoe (S7S-M76-SM93) was born inTarkwa, Ghana. He received the B.Sc. (Eng.) degreefrom the University of Science and Technology,Kumasi, Ghana in 1973, and the M.A.Sc. and Ph.D.degrees from the University of Toronto, Canada, in1977 and 1982, respectively.From 1973 to 1974 he worked as an AssistantLecturer at the University of Science and Technol-ogy, where he was responsible for the developmentof a number of undergraduate laboratories. Afterworking as a Postdoctoral Fellow at the University

[IO] M. F. Schlect, A line interfaced inverter with active control of the out-put current waveform, in Powe r Electronics Specialists Con$ ( PES C ) ,1980, pp. 234-241.[ l l ] C. Hsu Stability analysis of a switched mode inverter using Cu kconverter, in IEEE P ower Electronics Specialists Conf ( PES C J ,Taipie,Taiwan, June 1994, pp. 785-795.

of Toronto for a short time, he joined Memorial University of Newfoundland,where he is presently the Chairman of the Electrical Engineering Department.His research interests are in the area of static power converters and motordrives.Dr. Quaicoe is a member of the Association of Professional Engineers andGeoscientists o f Newfoundland.

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