Analysis and Improvement of the SwitchingBehaviour of Low Voltage Power MOSFETs with

High Current Ratings under Hard SwitchingConditions

Bjoern Wittig and Friedrich W. FuchsChristian-Albrechts-University of Kiel, Germany

Institute of Power Electronics and Electrical DrivesKaiserstr. 2, 24143 Kiel, Germany

Email: bw@tf.uni-kiel.de

Abstract—An analysis and improvement of the switching be-haviour of low voltage power MOSFETs with high current ratingsis presented. Different turn-off active gate control circuits aredescribed and their performance is analyzed with the focus on thereduction of the overvoltage at turn-off under the precondition oflimited increasing of switching losses. The control methods areexperimentally compared to a basic gate drive circuit for twodifferent types of low voltage power MOSFETs.

I. INTRODUCTION

In battery fed power trains, like in cars and lift trucks,power MOSFETs with high current ratings play a significantrole. Typical applications are dc/ac converters for feedinga three phase ac motor or dc/dc converters [1]–[3]. Dueto the high power and low voltages of i.e. 24 V in someapplications high currents are the consequence. Thus thereis a high demand for low voltage power MOSFETs witha low drain-source on-state resistance RDS(on) and a lowtemperature dependence on the market to achieve lowerconduction losses.Due to the reduction of the drain-source on-state resistanceRDS(on) of modern automotive power MOSFETs and thesubsequently decreasing conduction losses, the switchinglosses get a higher influence of the total power lossesof the semiconductors. With higher switching frequenciesthis effect rises and can play an important role in thechoice of a power MOSFET type and gate drive circuitdesign has an influence on the switching losses. Active gatecontrol of switch on and switch off via the gate drive couldbe a chance to reduce the switching losses or the overvoltages.

In the literature many low cost and easy to implementactive gate control methods have been presented forapplications with IGBTs under hard switching conditions.Only a few publications were made concerning the use forpower MOSFETs as the authors know [4]–[6].In [4] a small inductance is used to measure the currentslope in the power MOSFET for decreasing or increasingthe switching speed. In addition a concept was presented by

measuring the drain source voltage slope of the MOSFET toinfluence the switching behaviour. Another method is the useof a small transformer to control a signal mosfet at the gatedrive circuit and to inject an additional current during turn-on,which leads to a decreasing turn-on switching energy [5]. In[6] an EMI suppression driver is presented which only slowsdown the gate-source voltage transition near the gate-sourcethreshold voltage, reducing the drain-source voltage slope.An obvious way to increase or to decrease the voltage andcurrent slopes applied for an IGBT is to switch on or off anadditional gate resistor and current path to the available gateresistor as described in [7]–[9]. In [10], [11] the transistoris turned on again for a very short time after the end ofthe switching process to decrease the current slope andthe overvoltage caused by the parasitic inductances in thecommutation path.

In this paper an analysis and improvement of the switchingbehaviour of low voltage power MOSFETs with high currentratings under hard switching conditions is presented. Ashort explanation and analysis of the theoretical switchingbehaviour and the effect of the stray inductance of thecommutation path on the drain-source voltage characteristicis given at first. Different turn-off active gate control methodsare presented and analysed. These methods are dividedinto three types - the du/dt-control, the di/dt-control andthe two-stage-control - and their functionality is explained.Experimental results for two different types of low voltagepower MOSFETs are presented. A comparison of the resultsworked out for the different presented active gate controlmethods is presented at the end of this paper.

II. SWITCHING BEHAVIOUR OF LOW VOLTAGE POWERMOSFETS

A typical test circuit for the hard switching processof power MOSFETs with an inductive load and with aconventional gate drive circuit is illustrated in Fig. 1. Herethe MOSFET M2 is the device under test and M1 is used as a

978-1-4244-6391-6/10/$26.00 ©2010 IEEE 644

Fig. 1. Typical test circuit for the hard switching process of power MOSFETswith an inductive load and with a conventional gate drive circuit

freewheeling diode like in a typical half bridge configuration.The stray inductance Lσ represents the sum of all strayinductances in the commutation path. The theoretical currentand voltage characteristic at turn-on and turn-off of a powerMOSFET is displayed in Fig. 2 [12], [13]. The widely useddefinitions of the current and voltage rise and fall times andthe turn-on and turn-off delay times for power MOSFETs aredepicted here also.

In Fig. 2 the dotted lines show the theoretical characteristicconsidering the stray inductance Lσ . The drain currentovershoot, which results from the reverse recovery currentIRRM of the body-diode of M1, is indicated also.

At turn-on during the current rise time the induced positivevoltages at the stray inductances in the commutation path leadto a lower voltage stress of the power MOSFET M2 [12], [15].In this phase the voltage decrease is:

Vind = Lσ · diDdt

(1)

During the turn-off process and the current fall time theinduced voltages at the stray inductances are negative. Consid-ering the turn-on overvoltage VFRM of the inverse body-diodeof M1 leads to the following overvoltage peak at turn-off [12]:

Vpk = Lσ · diDdt

+ VFRM (2)

For lower current slopes the turn-on overvoltage VFRM ofthe body diode can be neglected but at higher values VFRMincreases and can lead to an additional overvoltage of a fewvolts for a short time.

In Fig. 2 the principle characteristic of the switchinglosses is illustrated also. There the conduction losses andthe normally negligible blocking losses are indicated asEcond respectively Eblock. Considering the parasitic strayinductances in the commutation path and the describedvoltage characteristic as mentioned above, this inducedvoltages are responsible for a lower turn-on energy Es(on)

and a higher turn-off energy Es(off). Because of the very lowresulting turn-on energy and the relative low amplitude ofdrain current overshoot, turn-on active gate control methods

Fig. 2. Theoretical current and voltage characteristic at turn-on and turn-off of a power MOSFET, without (continuous line) and with (dotted line)consideration of the stray inductance Lσ in the commutation path

Fig. 3. Experimental turn-on and turn-off process of the power MOSFETNP110N055PUG from NEC [14]: VGS 5V/div (blue line), VDS 10V/div(green line), ID 50A/div (red line), t 200ns/div; VDD = 24 V, RG = 3.9 Ω,TJ = 20 C

are not mandatory. Therefore the following analysis ofactive gate drive concepts deals only with the influence andimprovement of the turn-off switching characteristic of lowvoltage power MOSFETs. In Fig. 3 an exemplary turn-onand turn-off process of a low voltage power MOSFET isshown. The reduction of the voltage stress at turn-on and theovervoltage at turn-off is obvious.

III. ACTIVE GATE TURN-OFF CONTROL CIRCUITS

A. du/dt-control

A widely used method to influence the switching behaviouris the so called du/dt-control, which can be seen in Fig. 4

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Fig. 4. du/dt-control methods a) du/dt-control by means of an externalgate-drain-capacitance, b) du/dt-control by means of an external gate-drain-capacitance and a zener diode in series

(a) [16], [17]. There the voltage slope is fed back i.e. bya small capacitance between the gate and the drain of thepower MOSFET.

The current through the external gate-drain-capacitanceCGD, which is proportional to the voltage slope dvDS/dt ofthe transistor, is directly coupled into the gate of the powerMOSFET. This leads to an increase of the voltage rise timeand the current fall time. An expansion of this switchingcontrol method is shown in Fig. 4 (b), where an additionalzener diode Dz is used in series to the external capacitanceCGD, well known as an active clamping concept. This inducesa faster voltage rise at the beginning of the turn-off processand a slower voltage rise at higher drain-source-voltage. Bythe way the current slope is reduced. Thus it is possible onlyto react at too high overvoltages.

B. di/dt-control

Another way to influence the switching speed is to measurethe current slope diD/dt with a feedback circuit at thegate, which is called di/dt-control. This can be done by anadditional inductance at the source pin of the power MOSFETor by using the parasitic inductance LσS2 of the copper wireor track. If a too high current falling slope is detected bymeans of the induced voltage at the inductance, a positivecurrent is fed back via RS and D1 into the gate of the powerMOSFET during the current fall time, which is controlledtowards on state.

In Fig. 5 two ways of realization of the control methodare displayed [17]. The first method in Fig. 5 (a) leads to nosatisfying results because of the slow response time and therelative high on-state resistance of the zener diode. Using asignal transistor TS instead of a zener diode as shown in Fig.5 (b) leads to better results. Thus it is possible to controlthe current slope without to influence the voltage slope atturn-off.

C. Two-stage-control

A more complex active gate control method is the two-stage-control, where a low ohmic current path for switchoff is in parallel to the conventional gate resistor during

Fig. 5. di/dt-control methods a) di/dt-control by means of a zener diode , b)di/dt-control by means of a signal mosfet in the current feedback path

Fig. 6. Two-stage-control gate drive circuit

the voltage rise time. In Fig. 6 the principle circuit of thetwo-stage-control circuit is presented. The low ohmic currentpath is realized by the transistor T2, the low ohmic resistanceRGoff,2 and the diode DGoff,2. At the beginning of theturn-off process, T2 is turned on via the gate voltage Vgg .Additionally a small current is injected through R1 and D1

into the power stage and leads to a voltage drop across R2

and R3. This voltage drop is nearly the drain-source voltageof the power MOSFET plus the forward voltage of the diodeD1. At a defined measured drain-source voltage the transistorT1 is turned on and hence T2 is turned-off. During the currentfall time the low ohmic current path is switched off by thisway.

Although this leads to nearly the same current fall timeand therefore nearly the same induced VDS voltage peakcompared to the conventional gate drive circuit, the voltagerise time can be reduced. Furthermore the turn-off delay timetd(off) is kept low and nearly constant for increasing gateresistance RGoff,1. These method has been also presentedin the literature with IGBTs instead of low voltage powerMOSFETs [18].

IV. EXPERIMENTAL RESULTS

For experimental analysis two different low voltage powerMOSFETs are used, which are described shortly in Ta-ble I [14], [19]. Both power MOSFETs offer nearly the

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Fig. 7. Experimental turn-on and turn-off characteristics of the two-stage-control method in comparison with the conventional gate drive @ RG = 7.5 Ω,TJ = 20 C: a) NP110N055PUG from NEC, b) IRFS3306PbF from International Rectifier

Fig. 8. Experimental turn-on and turn-off characteristics of the du/dt-control by means of an external gate-drain-capacitance in comparison with theconventional gate drive @ RG = 10 Ω, TJ = 20 C: a) NP110N055PUG from NEC, b) IRFS3306PbF from International Rectifier

same breakdown voltage VDSS and continuous drain cur-rent rating ID,cont.. The typical input capacitance Ciss ofthe NP110N055PUG, selected from the datasheet table, isalmost four times higher than the input capacitance of theIRFS3306PbF. Therefore a significant longer turn-off delaytime td(off) and voltage rise time tru is expected in case ofthe NP110N055PUG.The stray inductance Lσ of the whole current commutationpath in this laboratory setup is measured to about 36 nH. TheDC link voltage VDD is chosen to 24 V. All control methodshave been tested at the same working point. Additional analy-ses at junction temperatures of TJ = 100 C have been made,which have not led to an essential temperature dependence ofthe switching process with and without the proposed control

methods and will be therefore not presented here.

NP110N055 IRFS3306PUG PbF

Breakdown voltage VDSS 55 V 60 VDrain current ID,cont. 110 A 120 ADrain-source resist. RDS(on) 1.9 mΩ 3.3 mΩInput capacitance Ciss 17100 pF 4520 pF

TABLE IDATASHEET PARAMETERS OF THE USED POWER MOSFETS IN THE

LABORATORY SETUP, [14], [19]

In Fig. 7 the experimental turn-on and turn-off characteristicof both used power MOSFETs in case of the conventional and

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Fig. 9. Experimental results of the presented active gate control methods with the NP110N055PUG from NEC @ VDD = 24 V, ID = 150 A, TJ = 20 C

the two-stage gate drive circuit are shown. Due to the strayinductance Lσ of the commutation path, the drain-sourcevoltage is very low during the current rise time. It is clearlyto be recognized, that the two-stage control method leads toa faster voltage rise time and therefore to considerable lowerturn-off losses. The turn-on behaviour is not influenced bythe two-stage-control method.Comparing the turn-on and turn-off characteristic of bothpower MOSFETs, it is cognoscible, that at same gateresistance the drain-source voltage slope of the IRFS3306PbFis higher than the voltage slope of the NP110N055PUG.This is caused by the lower input capacitance Ciss of theIRFS3306PbF as mentioned before.

The du/dt-control by means of an external gate-drain-capacitance is compared with the conventional gate drivecircuit in Fig. 8. At turn-on the current and voltagecharacteristics are not different to each other. In contrast atturn-off the du/dt-control provides a less steep current slopeand therefore a lower induced overvoltage Vind, resulting ina higher turn-off energy Es(off).

For comparison the results of the proposed active gatedrive circuits are illustrated in Fig. 9 for the NP110N055PUGfrom NEC. In Fig. 9 (a) the induced overvoltage Vpk independence on the turn-off energy Es(off) is illustrated. Itcan be seen, that the two-stage active gate control leads to themost satisfying results concerning the induced overvoltageand turn-off losses. For lower gate resistances a reductionof 10 to 20 % of the turn-off energy Es(off) at the sameinduced overvoltage was achieved. The du/dt-control methodby the means of an external gate-drain-capacitance with

and without a zener diode also delivers good results. Thedi/dt-control does not provide satisfying results at highergate-resistances because of the lower voltage drop at thesource stray inductance Lsσ2 during turn-off.

In Fig. 9 (b)-(c) the induced overvoltage Vind and theturn-on and turn-off switching energy Es depending on thegate-resistance are shown. With higher gate resistance theovervoltage decreases and the switching energy increases.In case of the two-stage-control there is a much lowerswitching energy rise with higher gate-resistance due to thereduced voltage rise time, which can also be seen in Fig. 9 (f).

Another effect of the two-stage-control is the short turn-offdelay time td(off), which is nearly constant with increasinggate-resistance and much lower compared to the other activegate drive methods. This can lead indirectly to lower powerlosses of a converter with half bridge topology due to apossible reduction of the deadtimes. In Fig. 10 (a)-(f) theexperimental results for the IRFS3306PbF from InternationalRectifier are presented, where similar results are depicted asdescribed before.

V. CONCLUSION

Different turn-off active gate control methods for low volt-age power MOSFETs with high current ratings have been pre-sented and analysed. First the theoretical switching behaviourof a power MOSFET is explained. Different gate controlmethods of the du/dt-control and of the di/dt-control and onetwo-stage-control concept have been presented. The proposedgate drive circuits have been realized and measured in thelaboratory. The two-stage-control concept delivers the best

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Fig. 10. Experimental results of the presented active gate control methods with the IRFS3306PbF from International Rectifier @ VDD = 24 V, ID = 150 A,TJ = 20 C

results of the analysed active gate drive circuits consideringthe turn-off losses in dependence with the turn-off overvoltage.The turn-off delay time can be reduced by the two-stagecontrol in comparison to a conventional gate drive circuitalso. With minor additional components needed a remarkablereduction of power losses is achieved. Thus this method canbe judged well to be used in industrial applications.

ACKNOWLEDGMENT

The authors would like to thank the Fraunhofer-Gesellschaftand the state of Schleswig-Holstein, which partly founded thisproject. The work was carried out in a combined project ofthe ’Centre of Competence for Power Electronics Schleswig-Holstein’.

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