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890 IEEE Transactions on Powcr Systems, Va!. 13, No.3, August 199R ANALYSIS OF HARMONIC MITIGATION METHODS FOR BUILDING WIRING SYSTEMS Thomas Key, Senior Member Power Electronics Applications Center Knoxville, Tennessee Ahstract-There is a growing number of available harmonic mitigation methods. Selection of the best suited method for a particular case can be a complicated decision making process. The difficulty normally arises from not knowing how a parti cular technology and design will perform in a specific non-sinusoidal system. This paper looks at seven harmonic mitigation methods and compartS their compensation characteristics applied to building wiring systems. Both passive and active mitigation methods are considered for harmonics generated by single-phase equipment. The performance is studied through computer simulation with detailed source and associated rectifier load interfaces in the model. I. INTRODUCTION Switch-mode power supplies (SMPS) and other power converters reshape electrical power to better serve many electronic equipment applications. The lowest cost and t h c easiest way to reshape electric power for electronic equipment is to use a simple rectifier that converts ac to pulsating dc along with an energy storage capacitor to smooth voltage ripple. This type of electronic power conversion is used in everything from adjustable-speed drives to personal computers and other office electronic appliances. One of the side effects of the power conversion process is harmonic currents generated into the power system. Experience has shown that these currents do not upset the end-use electronic equipment as much as they overload neutral conductors and transformers, and in general, cause additional losses and reduced power factor for the electrical power system components transporting the real power to the equipment. Fig. 1 shows single-phase rectifier interface circuits and their input current waveforms. As can be seen the input current contains significant harmonic components, causing the most problems for the building wiring systems. PE-086-PWRS-2-06-1997 A paper recommended and approved by the IEEE Power System Engineering Committee of the IEEE Power Engineering Society for publication in the IEEE Transactions on Power Systems. Manuscript submitted May 29, 1996; made available for printing June 11, 1997. Jih-Sheng Lai, Senior Member Oak Ridge National Laboratory Oak Ridge, Tennessee 8 ' , . -�. .. ij : �i 1-phase rectifier Switch Mode Power Supply DC Load Fig. 1. Single-phase rectier circuit diagram and input cuent. With concern for harmonic levels that can overload building power systems and with new standards on the way to limit harmonic levels, numerous approaches have been proposed. These range from reducing the harmonics generated by equipment tu installing large filters in building wiring systems. Some approaches use passive filters or special transformers, while others use active filters or active current shaping circuits. Selection of a method suitable for a particular case becomes a complicated decision making process. The complication normally arises from the difficulty of predicting how a filter will perform and what side effect� may be created in a spccific system application. To evaluate harmonic mitigation equipment performance in the electrical power system, the commercial building model shown in Fig. 2 is used. This model, from [1], represents a 600-kVA service, 480/208-V building wiring, and 60-kW non- linear computer SMPS loading. �II Service Entrance SUD'panels Branch Circuil or Load Center or Cord Connection Three-phase Loads 2 3 40 Branches per phase : Builtinto :Load Equipment Fig. 2, Possible harmonic compensation locations in a typical building eleclrical power system. This paper analyzes seven different harmonic mitigation methods in both time- and frequency-domain, calculates t he expected performance, identifies specific systems assumptions and describes possible side effects. Both passive and active approaches are considered at three compensation locations in the building wiring system: 0885-8950/98/$10.00 © 1997 IEEE
Transcript
Page 1: ANALYSIS OF HARMONIC MITIGATION METHODS FOR BUILDING WIRING SYSTEMS

890 IEEE Transactions on Powcr Systems, Va!. 13, No.3, August 199R

ANALYSIS OF HARMONIC MITIGATION METHODS FOR BUILDING WIRING SYSTEMS

Thomas Key, Senior Member

Power Electronics Applications Center

Knoxville, Tennessee

Ahstract-There is a growing number of available harmonic mitigation methods. Selection of the best suited method for a particular case can be a complicated decision making process. The difficulty normally arises from not knowing how a particular technology and design will perform in a specific non-sinusoidal system. This paper looks at seven harmonic mitigation methods and compartS their compensation characteristics as applied to building wiring systems. Both passive and active mitigation methods are considered for harmonics generated by single-phase equipment. The performance is studied through computer simulation with detailed source and associated rectifier load interfaces in the model.

I. INTRODUCTION Switch-mode power supplies (SMPS) and other power

converters reshape electrical power to better serve many electronic equipment applications. The lowest cost and thc

easiest way to reshape electric power for electronic equipment is to use a simple rectifier that converts ac to pulsating dc along with an energy storage capacitor to smooth voltage ripple. This type of electronic power conversion is used in everything from adjustable-speed drives to personal computers and other office electronic appliances. One of the side effects of the power conversion process is harmonic currents generated into the power system. Experience has shown that these currents do not upset the end-use electronic equipment as much as they overload neutral conductors and transformers, and in general, cause additional losses and reduced power factor for the electrical power system components transporting the real power to the equipment.

Fig. 1 shows single-phase rectifier interface circuits and their input current waveforms. As can be seen the input current contains significant harmonic components, causing the most problems for the building wiring systems.

PE-086-PWRS-2-06-1997 A paper recommended and approved by the IEEE Power System Engineering Committee of the IEEE Power Engineering Society for publication in the IEEE Transactions on Power Systems. Manuscript submitted May 29, 1996; made available for printing June 11, 1997.

Jih-Sheng Lai, Senior Member Oak Ridge National Laboratory

Oak Ridge, Tennessee

8', � .r--' -�.'f--' .. ij : �i

1-phase rectifier

Switch Mode Power Supply

DC Load

Fig. 1. Single-phase rectifier circuit diagram and input current.

With concern for harmonic levels that can overload building power systems and with new standards on the way to limit harmonic levels, numerous approaches have been proposed. These range from reducing the harmonics generated by equipment tu installing large filters in building wiring systems. Some approaches use passive filters or special transformers, while others use active filters or active current shaping circuits. Selection of a method suitable for a particular case becomes a complicated decision making process. The complication normally arises from the difficulty of predicting how a filter will perform and what side effect� may be created in a spccific system application.

To evaluate harmonic mitigation equipment performance in the electrical power system, the commercial building model shown in Fig. 2 is used. This model, from [1], represents a 600-kV A service, 480/208-V building wiring, and 60-kW non­linear computer SMPS loading.

�II

Service Entrance

SUD'panels Branch Circuil or Load Center or Cord Connection

Three-phase Loads

2 3

--40 Branches per phase

:Builtinto :Load Equipment

Fig. 2, Possible harmonic compensation locations in a typical

building eleclrical power system.

This paper analyzes seven different harmonic mitigation methods in both time- and frequency-domain, calculates the

expected performance, identifies specific systems assumptions and describes possible side effects. Both passive and active approaches are considered at three compensation locations in the building wiring system:

0885-8950/98/$10.00 © 1997 IEEE

Page 2: ANALYSIS OF HARMONIC MITIGATION METHODS FOR BUILDING WIRING SYSTEMS

(1) built-into single-phase load equipment.

(2) cord connected at a single-phase branch outlet, and

(3) hard-wired at a three-phase sub-panel or load center.

For passive filters, the frequency response models are established to show tuning at selected harmonic frequencies. The utility source and rectifier loads arc simulated to account [or system interactions, which are significant for some filters.

II. HARMONIC MITIGATION BUILT-INTO EQUIPMENT AND

PLVGGED-IN AT THE BRANCH CIRCUIT

Eliminating harmonics at their source has been shown to be most effective to reduce losses in the building power system [1,2]. However, the increased first cost presents a barrier to this approach. With inccntivcs such as TEC Standard 1000-3-2 [3], many manufacturers are looking at ways to reduce harmonics inside electronic equipment or at the end of branch circuits. Using the PC power supply case, possibilities of limiting harmonics to comply with TEC have been analYLed and tested by the authors. We will consider the four single­phase methods. previously analyzed by the authors [4,5]:

I. Built-into equipment

• A series inductor added at the input circuit

• An active boost converter with current-shaping circuit

2. Cord-connected

• A parallel-connected, series LC-resonant filter

• A series-connected, parallel LC-resonant filter

A. Series Inductor Filter (SIF) This filter is an option for the power supply manufacturer

who has concerns about standards limiting the current distortion. It was pointed out by Lai [5] and Jovanovic [6] that with a series inductor, SMPS harmonic currents can be sigmficantly lowered to meet the IEC standard. The series inductor can be added on either the ac or dc side. Fig. 3 illustrates the method of adding a series filter inductor, Leo on the dc side. For a full-bridge rectifier, thc inductor can be simply added between the rectifier and the smoothing capacitor, Cd" as shown in Fig. 3(a). An input-side capacitor, Cm, is normally added to correct displacement power factor to near unity. When adding the series inductor to a voltage­doubler type rectifier circuit, the inductor needs to be split in two halves. These two inductors can be wound on separate cores, or on the same core with mutual coupling, as shown in Fig.3(b).

When the inductor size is sufficiently large, the current becomes continuous, and the total harmonic distortion (THD) is greatly reduced. However, in continuous conduction mode the displacement power factor will be lowered. A basic design criterion is to produce a current between the discontinuous and continuous operation modes, which optimizes harmonic distortion and power factor. This brings current THD down to below 50% with a power faetor around 0.90 [5, 6].

891

Using a 15 percent series inductor as the study case, the

simulated rectifier input voltage, Vm, and current, iim are shown

in Fig. 4. Fig. 4(a) shows the steady-state time domain responses where the input current tends to be continuous and lagging the input voltage. Fig. 4(b) shows the harmonic contcnts. Thc THD of the input current is 47.5 percent in this case. The input voltage is not much distorted because the source voltage, V.I> in this simulation is assumed to be an ideal sine wave. The main problem found in this ease is the 15-percent inductor also drops the dc-link voltage by 15 percent, greatly reducing the ride through capability.

L,

(al

(b)

Switeh Mode Power Supply

Switch Mode Power Supply

Fig. 3. Circuit diagrams showing dc-side series inductor for current shaping. (a) Full-bridge rectifier. (b) Voltage-doubler rectifier.

;�= .. �� ,��'") : \..., v v: +- t o w Time (ms)

(a)

10 0.6 0.6 0.4 0.2 oo�������+H+H��

1.0 08 os 04 02 00�����+H+H+H+H+rH+

1 3 5 7 9 11 131517 19 212325272931 Harmonic Order

(b) Fig. 4. Input voltage and current of a rectifier with a series inductor.

(a) Time domain waveforms. (b) Frequency spectra.

B. Boost Converter Current Shaping (BCCS) Like the SIF, this special circuit built into the SMPS can

greatly reduce current distortion and meet standards limiting harmonic emissions. The boost converter is also called a "step­up converter" which converts low-dc voltage to high-de voltage. Fig. Sea) shows the circuit of a power supply containing a front-end boost converter. By modulating the duty cycle of switch Sb, the input current can be controlled to track the input voltage waveshape. Fig. 5(b) shows the associated input voltage, Vim and current, iin, waveforms. With low distortion and accurate tracking between current and voltage, the power factor is typically higher than 0.99. Fig. 5(c) shows

Page 3: ANALYSIS OF HARMONIC MITIGATION METHODS FOR BUILDING WIRING SYSTEMS

892

the harmonic spectra of the boost converter input voltage and current. Thc input currcnt THD is normally less than 5%.

To achieve stable operation, the output voltage of a boost converter must be higher than the peak value of the inpul voltagc. With consideration of source voltage variations, the design rule is to multiply the nominal input voltage peak value by 1.2 to obtain the dc link voltage, Vdr." For a universal l1S/230-V system, Velc is typically designed at 38SV. This design rule implics that the boost convcrter will substantially increase the ride through capability if the dc link capacitor, C,lco is sufficiently sized.

\ ff I-

(bl

boost converter

Cal 1.0 <rC'�'�--c-����--� 0.8 0.6

_ L . / 0.4 \ I 0.2

0.0 i"H-H--fL++-fo+-H+++4-'+l-+++-H-H-l+++-H 1.0 .. · ..... · ... · ..

···;·7 .... ··;;-·,· .... .. ·..,.· .. · ... · ....

0.8 0.6 0.4 0.2 0.0 .J"H'"l4'+-I44-p,""+++i·+'·1--f..t·

1 3 5 7 9 11 13 15 17 1921 2325 2729 31

Ijarmonic Order

(cl Fig. 5, Inserting a boost converter cunent shaping circuit between the rectifier and SMPS. (a) Circuit diagram. (b) Input voltage and current

waveforms. (c) Harmonic spectra.

C. Parallel Connected Resonant Filter (PCRF)

An add on appliance, this filter is usually configured to plug into a convenience outlet and serve as a plug in point for 2 to 4 electronic devices. Fig. 6(a) shows the circuit diagram of a commercially available peRF. The resonant branch impedance Zr as a function of frequency can be expressed as

ZrCw)=joLr + _. _1 _ . (1) JwCr

The impedance approaches zero when W=!4 = I/JLrCr, whcre

!4 is the "resonant frequency," In other words, the designated harmonic current shunts through the parallel branch and circulates between the filter and the rectifier circuit. To mitigate the third harmoniC, the resonant frequency is tuned to

180 Hz, w=2n/180. A realistic passive component contains a lossy resistance which provides some damping. However, if the electric power supply voltage contains some third harmonic, the resonant branch may still be overloaded hy third harmonic current. Thus, a series inductor, Lj, is added to detune the PCRF on the supply-side and reduce this

uncontrolled loading from the supply, With the additional series inductor, the resonant frequency looking from the source

becomes I1JrLr + Lt)Cr . The frequency response of the PCRF filler circuit impedance, shown in Fig. 6(b), indicates I80-Hz trapping. Simulated input voltage and current waveforms, and their harmonic spectra are shown in Fig. 6(c) and 6(d).

R,. L,.

+i

150

dB

peRF

(a)

100Hz

Frequency (b)

Rectifier +

SMPS

l_ElJ<Hz

I 0 lIIT'--'--r--"-��

--;j\,i,P">···�+ i;""/\ ri H 0/ \" /r �,: 0.2 , , , 1 00

Time (ms) 50 1 3 5 7 9 11 13151719212325272931

Harmonic Order (c) (d)

Fig. 6, A parallel connected resonant filter (peRF). (al Circuit diagram. (b) Frequency responses of resonant circuit impedance. (e)

Time domain simulation results, (d) Harmonic spectra.

Tt should be noted that the power factor of the peRF is leading with respect to fundamental voltage and current. The current in the resonant filter branch is a function of frequency and can be expressed as:

I ( ) - jcoCr V LrW- 2 in I-w Lrer (2)

where Vin is the voltage across the resonant branch, The resonant branch current, hn is leading when the supply frequency is lower than the resonant frequency. Under light load conditions, the leading reactive current hr is significantly higher than the real component of the load current. Such a k(l{ling current worsens the power factor of the individual power supply but may help compensate other lagging reactivc power in the building wiring system. The dc link voltage, typically reflected by a flat-topped portion of the rectifier input voltage, Vim is not affected much by the added peRF, and thus the ride-through capability remains unaffected,

D. Series Connected Resonant Filter (SCRF)

Page 4: ANALYSIS OF HARMONIC MITIGATION METHODS FOR BUILDING WIRING SYSTEMS

Like the parallel version, this is a plug-in filter that serves several other electronic devices with a typical rating of 6 amps. The SCRF can be single-tuned or multi-tuned. For a single­tuned SCRF the impedance of the filter circuit as a function of the supply frequency can be derived as:

\Z(W)\= �� m , I 2 2 2 ' -VR,(l-W C,L,)+w L, The multi-tuned SCRF connects multiple tuned filters in

series. Fig. 7(a) is a double-tuned SCRF containing a third harmonic tuned LC circuit, LrJ and C], and a high frequency tuned LC circuit, Lrh and Crh, to eliminate high-order harmonics. Fig. 7(h) indicates the filter impedance peaks at 180-Hz and 1.02-kHz. Figs. 7(c) and 7(d) show the simulated input voltage and current waveforms and harmonic spectra. Fig. 7(d) indicates a much-improved current THD (from 100% to 25%). However, a flat-topped portion of the rectifier input voltage, VIn, is observed in Fig. 7(c). The peak V,n value is significantly less than the peak supply input voltage, V.I> (about 75%). As a result, the SMPS ride-through capability is suhstantially reduced. A single-tuned SCRF, with only LrJ and Cd, may increase the peak Vin value to about 88% of the peak V.I value, but its current THD will be increased to about 45':70.

18G

dB

Time (ms)

(c)

v· v· I SeRF In

-1----------------1� : Cd Crh : , I

(a)

100Hz 1 .0KHz

Frequency (b)

LO�-��,· 0.8

0.6

0.4

0.2

+ SMPS

10�llz

00 1"H_'HAf¥f-�_H-t+HH++H_t+w+I

50

LO 0.8 1 3 5 7 9 1113151719212325�'72931

. ............•.•. { I 0.6 iUt, •. '.+' -l; 0.4

�:� _'-R'_�M4-++l++-++f++++HiW 1 35 7 91113151719212325:>72931

Harmonic Order (d)

Fig. 7. A double-tuned series connected resonant filter (SeRF). (a) Circuit dillgmm. (b) Fn'q""n.y «"ponses of rcwn<lnt circuit. (c)

Time domain simulation results. (d) Harmonic spectra.

III. HARMONIC MITIGATION METHODS AT SUB­

PANEL OR LOAD-CENTER LEVEL

893

Mitigation at the branch circuit-panel or load-center level using 3-phase filters is the next step away from the plug­conneetcd filters. For parallel-connected filtering devices at the load center, harmonics are allowed to travel further upstream in the power system. This leads to higher day-to-day costs that will accumulate due to l R losses in power system conductors that carry the harmonic currents. Conversely, for series-connected devices at the load center, such as a series connected choke or tuned filter, there are increased losses in the filter itself. These losses are simply the result of the higher series impedance, which blocks the flow of harmonics, but also increases the linc loss required to deliver thc remaining components of the load current.

All external methods for mitigating harmonics at the individual load level can be applied at the sub-panel or load center level. Three methods are considered in this paper.

1. Neutral current blocking filter (NCF)

2. Zigzag auto-transformer grounding filter (ZZP)

3. Active power filters (APF)

A. Neutral Current Blocking Filter (NCF) This filter is connected in the neutral conductor betwecn

the step-down transformer and the circuit panel or load center. Because triplcn harmonics all flow through the neutral conductor, it is reasonable and economical to block the triplen harmonics in the neutral instead of individual phases. Fig. 8(a) shows a neutral current blocking scheme that connects a third­harmonic tuned SCRF between neutral and ground. Fig. 8(b) compares frequency responses of the resonant circuit impedance, IZrl, with and without the system connected. It appears that at high frequencies the impedance is highly affected by system components including source impedance and rectifier smoothing capacitors in all three phases. With the system connected, a sharp notch occurs at 900 kHz. This implies highcr frequcncy harmonics could bc amplified instead of attenuated.

Figs. 8(c;) shows the phase-a voltage and current waveforms. The two voltage waves are the rectifier input voltage with respect to neutral, V,,_," , and to ground, V"a, The two current waves are the phase-a rectifier input current, ia_in, under the conditions with and without NCF. With NCF the current waveform looks like a three-phase rectifier input current with double peaks instead of a single peak. The peak

value of thc fundamental current is significantly reduced with NCF.

Fig. 8(d) compares harmonic spectra of the rectifier input voltage and currcnt under the conditions with and without NCF. According to this figure, the triplen harmonics are effectively suppressed with NCF, but other harmonics tend to increase. This augmcntation of high frequency components indeed rcflect5 the prediction of the frequency re'pon,e

Page 5: ANALYSIS OF HARMONIC MITIGATION METHODS FOR BUILDING WIRING SYSTEMS

894

analysis. The phase-a rectifier input voltage, Va_in, of Fig. X(c) indicates a flat-topped portion that lowers the dc-link voltage by about 12 percent, which will decrease the ride-through capability of electronic equipment in a similar manner to the seRF

VO\· L,1.I' ia_in VaG

Lbs -¥- ib_in

". : Neutral Harmonic , ________ : Blocking Filter

(a)

d�'L�::j�N��OIY��l

-20 � --- - -- - -- -- - -- -� lr:!t.eJ?9! it{ -- - -- ____ J 10Hz 189Hz 1 .8KHz 5. 8KHz

Frequency

?tt:,�'/\��:n7\""'1 • \ I \) \ ! l ...... y ...... _\ ......... yJ

· · · · w: , .... wI6 • f\f\" NCFflV'0 NCF 11'\ :,.' I:IT"" \ v{r.JV\ ''<[\/1 : la in '¥' \i , f..�-- --l

o Time (ms) (c)

50

(b)

1.0 0.8 0.6 0.4 0.2 0.0 -I'I-1"H-1'-f';·-l+4'-1+4+H-+++-4 ++1...>+1"++14 1.0 0.8 0.6 0.4 0.2 0.0

1 3 5 7 9 11 13 15 17 1921 2325272931

135 91113151719212325272931

(d)

Fig. 8. A neutral current blocking filter. (a) Circuit diagram. (b) Frequency response of the circuit impedance. (a) Time·domain

simulation results. (b) Harmonic Spectra

B. Zigzag Grounding Filter (ZZF)

Another way to protect the step-down transformer and shared-neutral conductor from triplen harmonics is to cancel them near the load. Fig. 9 shows a special zigzag grounding filter (ZZF) that employs a three-phase autotransformer to caned tho 3rd or trip I on lmnnonic curn;nts Pl. Because all the triplen harmonic currents (zero sequence cUlTents) are added to the neutral and flowing from load-side back to source-side neutral, the parallel-connected auto-transformer can provide a zero sequence current path to trap and cancel the triplen harmonics.

The basic harmonic cancellation principle can be understood by looking at the transformer phase voltages:

Vbl = Vb2 = V;"I sin(cot -120') + VOl3 sin 3(cot -120')+.. (4) Vd = v" = V'"I sinew! + 120') + V;,,3 sin3(wt + 120')+··

where Vllf, Vhf, VcJ are the three-phase primary winding voltages, and Vab Vhb Vc2 are the secondary winding voltages. With phase to neutral windings split and wound on two different legs of a 3 legged core, each pair on a leg is reversed in polarity as shown in Fig. 9(a). Fig. 9(b) is the phasor diagram showing the vector summation of the phase winding voltages. By this method the balanced triplen harmonic voltages are canceled in the phase voltages, i.e.,

V Ill' = Val - V/;2

= .J3vnd �in«(j)t + 30') + 0 + .J3vms sin(5wt- 30' )+_ .. . (5) This equation shows that the triplen harmonic voltages are

not present in the phase voltages, and the triplen currents are trapped in the zigzag transformer windings. By adding more phasc-shifted zigzag windings, with different phase angle and winding arrangements, the positive and negative sequence harmonic currents such as 5th and 7th harmonic currents can also be canceled [7].

(a)

(b)

Fig. 9. A typical zigzagauto-transformer showing connections to three-phase nOll-linear loads.

rig. 10 SllOWS simulation results of a three-phase system with and without a ZZF. The system is again assumed to be balanced with the load-side neutral current, im containing mostly triplen harmonics. The neutral connection of the zigzag auto-transformer draws a current, i" and cancels in because they are nearly identical in magnitude, but in opposite directions.

Page 6: ANALYSIS OF HARMONIC MITIGATION METHODS FOR BUILDING WIRING SYSTEMS

Because the transformer draws a lagging cxcitatJlOn current, the source current could be augmented with a higher fundamental current. Fig. 11 shows voltage and current harmonic spectra with and without ZZF compensation. I As expected, the ZZF reduces current THD from about 100% down to about 30%, and the triplen harmonics are almost canceled. The fundamental current, however, is almost doubled at low-load conditions. Although the percentage of the current augmented hy ZZF may be reduced at higher load current conditions, the performance dependence on load condition is obvious. It should be noted that the ZZF current iz is fixed and irrespective to the level of non-linear loading. Therefore, if the load level is low, and the system is not well­balanced, the zigzag auto-transformer will produce an over­compensated current, possibly worsening the current THD and power factor.

With a parallel-connection to the system, the effect of the ZZF on the dc-link voltage is not significant, and the ride through is not affected.

20A T ----------------------------------- l

SEL»:

iu,=ia_�� -2SA�-----------------------------------�

Phase-a Load Current 25A r-------_---------------------------�

W:;VVV\I\N1 -2SA r-----------------------------------� SOms Neutral Current lOOms

(a)

,:,:,����-J -2SA�-----------------------------------� Phase-a Load and Source Currents

25A

:.�)f(�\;:;I\. �J\ -

�/\�-Jj �-J\ �·�Pr��� :V. }\J i'J' V\\)c. ·V·. \). .\j .• V: - 25A r - . )- - - - - - � -- - - - - - - - - - - - - - - - - - - - �

SOms -1, Load-Side Neutral and lOOms ZZF Neutral Currents

(b)

Fig. 10. Simulation results of a three-phase nonlinear system. (a) Without ZZF. (b) With ZZF.

1 3 5 7 9 11 13151719212325272931 Harmonic Order

Fig. 11. Harmonic spectra of voltages and currents with and without a zigzag filter.

895

C. Active Power Filter (APF) Electronic power conditioners can be controlled to

actively eliminate harmonics and improve power factor. The critical point is the fast and accurate calculation of the required compensation current. In a three-phase power system, the instantaneous harmonic power can be decomposed by a Park transformation method [8,9]. To derive harmonic power, it is necessary to look at the instantaneous load voltages, Vabco and instantaneous load currents, iahc. These voltage and current components can be transformed into a, {3, and 0 components, va{JO and ia{JO [9]. With the orthogonal relationship between a and {3, the active and non-active power components can be described as:

P = vuhe • iabc = vexPO • iapo (6)

(7)

The active power, p, is a scalar, containing real power at all frequencies. But the non-active power, q,,{JO, is a vector containing both fundamental frequency reactive power and all the distortion components of non-real power. To fully compensate for such a complex non-active power, an APF or a power line conditioner using a high frequency switching inverter is required.

An active filter with both series and parallel (shunt) connected sections, as shown in Fig. 12, can compensate for hoth voltage and current harmonics. Perhaps the more common one is the paralIe:l-type current compensating filter, which can be a fully active parallel-type filter or the combination of passive and active sections that allows a smaller active section. The other approach to reduce the size of the active section is to use the combination of passive shunt and active series filters. This approach can avoid possible interaction between two fillters. More and more commercial products are becoming available for different types of active harmonic filtering.

� � --��OM�-----------------------r�---

Source

ill:

P'WM Controlled Series Filter Shunt Filter ,-------------------------,

!W':

Fig. 12. A power line conditioner containing a series and a shunt active filters for harmonic voltage and current compensation.

Page 7: ANALYSIS OF HARMONIC MITIGATION METHODS FOR BUILDING WIRING SYSTEMS

896

In the filter shown in Fig. 12 the shunt-connected active filter section operates like a current source and injects an equal and opposite current to cancel the load harmonic current. The resulting source current is nearly sinusoidal but the voltage may still be distorted. At the series-connected active filler section voltage distortion is compensated using a coupling transformer. The coupling transformer operates as a voltage source that forces the source voltage, and consequently the load current, to become more sinusoidal.

This approach provides some isolation between source and load allowing secondary voltage to be controlled by the coupling transformer. The series clement also hehaves like a high impedance to harmonic currents, therefore blocking harmonic current flow from the load to the ac source and from the ac source to the load side. Because this connection requires intrusion to the system connection, the series APF or the combination of series and shunt APF is more suitable for a new installation than as a retrofitted device.

Fig. 13 shows simulation results of a three-phasc APF compensating a three-phase diode rectifier load. Waveforms show that both source voltage from phase to neutral, V" and load current, [!.flad are compensated. The current THD was reduced from 65% to 5% in this case.

� -- --i --;:;::-+ V, /'-.. /""0,. ..-.... r-- - ........ "-.r ......... --- :::::::

,-------- - - --1/' fLoad f1 -

r-' -- --� \i

j--. Starting Compensation

Fig. 13 Simulation results of an APF compensating a three-phase

diode rectifier load.

IV. DISCUSSION

For the harmonic elimination methods analyzed in this paper wc have attempted to compare performances based on several chosen parameters, such as current and voltage distortions, energy savings and side effects. Table I summarizes this performance comparison for filter methods used with single-phase SMPS.

The numbers shown in the table are based on the analytical results in our model and will not necessarily be the same under different conditions or with a different system model. System interactions are expected to bring about a variation in measured field data, because of the different case­by-case conditions. For e)(ample, without compensation the

(T'D in this case is 100%, but in general it varies from 80% to 130%.

The example building wiring system studied in this paper contains 240 distributed SMPS loads on 120 branch circuits presented and evaluated in [1] and [2]. The wiring losses, not calculated in this paper. are used in comparing performance to emphasize the loss reduCtion and effectiveness of harmonic

mitigation at different locations. As was reported in [1], the most effective performance comes from harmonic elimination methods that are built-in or closest to the harmonic generating loads.

T bl P f a eI. er ormance

Location Mitigation type none & performance

fTHD at source 100

side (%) fTHV at load side 100

(%) VTHlJ at load -5

input (%) V"c inside the 100 SMPS (% rated Wiring losses I 13.6 (% of loading)

C omparison of build-in

SIF BCCS

50 5

50 5

<3 <3

85 120

7.9 5.6

H armonic MltiGalion l\ h d 1et 0 s

at plug at load center

PCRF SCRF NCF ZZF APF

20 25 65 30 5

100- 25 65 100] 100]

-10 --40 -20 -5 -5

102 75 88 99 100

6.0 6.2 1 1 .3 11.1 7.8

I Based on a 60-kW load system With detailed calculatIOn shown 111 [2).

2 A single-phase SMPS is used as the base case. 3 Parallel connection does not affect the load side current THD.

As indicated in Table I, the BeeS is the best approach in terms of harmonic mitigation performance and wiring loss reduction. The only concern of this method is the cost to the original equipment manufacturer. The SrF may appear potentially lower cost while meeting IEC 1000-3-2, but its loss reduction is not high enough to benefit the users. Passive resonant filters including PCRF, SCRF and NCF are effective in suppression of triplen harmonics, but they tend to distort the voltage waveform. The APF performs well in terms of harmonic mitigation, but not the wiring loss reduction because its installation is typically far away from the single-phase load.

In addition to harmonic compensation performance analysis, the paper points out two important side effects of passive filters in the power system. I. Rectifier input voltage distortion and output dc link

capacitor voltage reduction by series connected filters. 2. Rectifier input current augmentation by parallcl connected

filters.

Regarding the first of these side effects, the paper shows that the load voltage distortion increases, and the rectifier output dc-capacitor voltage in-side the SMPS is reduced by the addition of the series-connected filters including SIF, SeRF and NCF. This side effect has two consequences related to the loads served:

(a) Reduction of ride-through capability due to voltage distortion.

Because Vde is directly fed to the switch-mode regulator, the reduction of Vdc would dramatically reduce the ride-through capability. On the other hand. the boost converter increases VJe by at least 20%, its ride-through capability can be easily enhanced with a proper-sized capacitor.

Page 8: ANALYSIS OF HARMONIC MITIGATION METHODS FOR BUILDING WIRING SYSTEMS

(b) Increased heating and reduced performance in other connected equipment.

The flat-topped portion of the rectifier input voltage is the reflection of Vdc' When it occurs at the sub­panel or load-center level, the distorted voltage also serves other types of loads such as lighting and rotating equipment. The side effects are the increased heating and reduced performance in these equipment due to high voltage harmonics.

The reduction of the dc link capacitor voltage, Vdn is related to the series impedance in the circuit. When adding a

15% series inductance, the SIP drops V de by 15%, as compared to the same branch circuit with only the rectifier loading. For the SCRF method, the voltage drop depends on the number of resonant circuit stages. A double-tuned SCRF drops Vd,. by 25%, while a single-tuned SCRF drops about 12%. However, the current THD of a single-tuned SCRF will be higher than that of a double-tuned SCRF, 45% as compared to 25% [4].

With the NCF, the voltage drop in a balanced three-phase system is about 12%, similar to the single-phase single-tuned SCRF case.

The second important side effect observed is the characteristic of some parallel-connected harmonic mitigation methods to increase current harmonics. In this case the SMPS

rectifier input current generates higher-order harmonics due to

parallel connected filters such as the PCRF and ZZF. These parallel connected filters tend to inject currents into

the system. The PCRF il�ects a leading current, while the ZZF injects a lagging current. The injected current in effect augments the out-of-phase fundamental current components, reducing displacement power factor. The cffect is wor:;c at light-load conditions.

Given the typical unknown system details, especially the other connected loads, it is difficult to predict the subsequent effect of the parallel filter. Because the other system load may have either leading or lagging power factor, the injected

current could provide some useful reactive compensation for some of them, but on the other hand, it may over compensate and worsen the leading or lagging condition.

V. CONCULSIONS This paper describes basic principles, typical installation

locations, performance and side effects of common harmonic mitigation methods used in building wiring systems. With the

897

need to comply with up-coming harmonic standards, and the potential for unexpected poor performance and side effects, the selection of the appropriate filter becomes a more complicated process. The explanation and analysis of the different harmonic elimination provided in this paper illustrates what will be required to make this choice.

Since only one generic commercial building case is evaluated in this paper, future work is needed to look at

several different installation cases. This is necessary to completely determine the sensitivity and the range of performance for different harmonic e limination methods.

REFEREl'\CE

[1] T. Key and 1. S. Lai, "Cost and Benefits of Harmonic Current Reduction fur Switch-Mode Power Supplies in a Commercial Building," in Conf Rec. of IEEE lAS Annu. MIg., Orlando, FL, Oct.1995,pp. llOl-ll08.

[2] J. S. Lai and T. S. Key, "Cost Effectiveness of Harmonic Mitigation Equipment for Commercial Office Buildings," to be presented in IEEIi lAS Annu. Mig., San Diego, CA. Oct. 1996.

[3] International Electrotechnical Commission. lEe 1000-3-2 Standard: Limits for Hannonic Current Emissions, Mar. 1995.

[4] J. S Lai, D. Hurst, and T. Key, "Switch-Mode Power Supply Power Factor Improvement Via Harmonic Elimination

Methods," in Calif Rec. oJAppl. Pwr Electr. Calif, Dallas, TX,

M ar . 1991, pp. 415-422. l5J T. S. Key and J. S. Lai, "Comparison of Standards and Power

Supply Design Opti ons for Limiting Harmonic Distortion,"

IEEE TrailS. all Ilid. Appl . . Jul.lAug. 1993, pp. 688-695. [6] M. M. Jovanovic and D. E. Crow, "Merits and LimItations of

Full-Bridge Rectifier wi th LC Filter in Meeting IEC 1000-3-2 Harmonic-Limit Specifications," in Conf Rec. of Appl. Pwr Electr. Calif, Dallas, TX, Mar. 1991, pp. 415-422.

[7] P. J. A. Ling and C. J. Eldridge, "Designing Modern Electrical Systems with Transformers that Inherently Reduce Harmonic Distortion in a PC-Rich Environment," in Prac. Power Qualily, Scpo 1994, pp. 166-178.

[8] H. Akagi, Y. Kanazawa, and A. Nabae, "Instantaneous Reactive Power Compensators Comprising Switching Devices WIthout Energy Storage Components," IEEE Trans. on Ind. Appl. May

1984, pp. 625-631. [9] F. Z. Peng and 1. S. Lai, "Generalized Instantaneous Reactive

Power Theory for Three-Phase Power Systems," IEEE Trans. on

Instr. and Meas., Feb. 1996, pp. 2 93-297.


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