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Ref:(i) An Introduction to Logic Circuit Testing by parag lala- chapter 3
(ii) VLSI Test Principles and Architectures: Design for Testability by Laung-Terng Wang, Cheng-Wen Wu, Xiaoqing Wen
Built-In Self Test (BIST)
1. Introduction
Built-In Self Test (BIST)
1. Introduction
Built-In Self Test (BIST)
2. Pattern Generation
Built-In Self Test (BIST)
Pseudo-Random Generation using LFSR
2. Pattern Generation
Built-In Self Test (BIST)
Example of a 4-bit LFSR as a Pattern Generator.
Pseudorandom states generated by the LFSR.
Pseudo-Random Generation using LFSR
2. Pattern Generation
Built-In Self Test (BIST)
1. Introduction 2. Pattern Generation 3. Signature Analysis 4. BIST Architectures 5. Summary
n-Bit (Internal XOR) Signature Generator.
3. Signature Analysis
Serial
Built-In Self Test (BIST)
Built-In Self Test (BIST)
n-Bit (External XOR) Signature Generator.
Serial
3. Signature Analysis
Serial
Example of a 4-bit (External) Signature Generator.
Built-In Self Test (BIST)
3. Signature Analysis
Q.1.
Sol.1.
r-Bit (Internal XOR) Parallel Signature Generator.
r-Bit (External XOR) Parallel Signature Generator.
Parallel
Built-In Self Test (BIST) 3. Signature Analysis
Built-In Self Test (BIST)
3. Signature Analysis
Modular LFSR Serial Compacter Example
Built-In Self Test (BIST)
3. Signature Analysis
Modular LFSR Parallel Compacter Example
Built-In Self Test (BIST)
1. Introduction 2. Pattern Generation 3. Signature Analysis 4. BIST Architectures 5. Summary
Built-In Self Test (BIST)
4. BIST Architectures
Built-In Logic Block Observer (BILBO)
4. BIST Architectures
Built-In Self Test (BIST)
Modular Bus-Oriented Design with “BILBO”.
Built-In Self Test (BIST)
4. BIST Architectures
Built-In Logic Block Observer (BILBO)
General Form of a BILBO
maximal-length sequence
=2 n – 1
BIST- Scan path Technique