IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 2, FEBRUARY 2015 871
PFC Cuk Converter-Fed BLDC Motor DriveVashist Bist, Student Member, IEEE, and Bhim Singh, Fellow, IEEE
Abstract—This paper deals with a power factor correction(PFC)-based Cuk converter-fed brushless dc motor (BLDC) driveas a cost-effective solution for low-power applications. The speedof the BLDC motor is controlled by varying the dc-bus voltage of avoltage source inverter (VSI) which uses a low frequency switchingof VSI (electronic commutation of the BLDC motor) for low switch-ing losses. A diode bridge rectifier followed by a Cuk converterworking in a discontinuous conduction mode (DCM) is used forcontrol of dc-link voltage with unity power factor at ac mains. Per-formance of the PFC Cuk converter is evaluated under four differ-ent operating conditions of discontinuous and continuous conduc-tion modes (CCM) and a comparison is made to select a best suitedmode of operation. The performance of the proposed system is sim-ulated in a MATLAB/Simulink environment and a hardware proto-type of the proposed drive is developed to validate its performanceover a wide range of speed with unity power factor at ac mains.
Index Terms—Brushless dc (BLDC) motor, continuous conduc-tion mode (CCM), Cuk converter, discontinuous conduction mode(DCM), power factor correction (PFC), power quality (PQ).
I. INTRODUCTION
BRUSHLESS dc (BLDC) motors are recommended formany low- and medium-power drives applications be-
cause of their high efficiency, high flux density per unit volume,low maintenance requirement, low electromagnetic interference(EMI) problems, high ruggedness, and a wide range of speedcontrol [1], [2]. Due to these advantages, they find applicationsin numerous areas such as household application [3], transporta-tion (hybrid vehicle) [4], aerospace [5], heating, ventilation andair conditioning [6], motion control and robotics [7], renew-able energy applications [8], [9], etc. The BLDC motor is athree-phase synchronous motor consisting of a stator having athree-phase concentrated windings and a rotor having perma-nent magnets [10], [11]. It does not have mechanical brushesand commutator assembly; hence, wear and tear of the brushesand sparking issues as in case of conventional dc machines areeliminated in BLDC motor and thus it has low EMI problems.This motor is also referred as an electronically commutated mo-tor since an electronic commutation based on the Hall-effectrotor position signals is used rather than a mechanical commu-tation [12], [13].
There is a requirement of an improved power quality (PQ)as per the international PQ standard IEC 61000-3-2 which rec-ommends a high power factor (PF) and low total harmonicdistortion (THD) of ac mains current for Class-A applications
Manuscript received September 1, 2013; revised January 3, 2014; acceptedFebruary 22, 2014. Date of publication March 4, 2014; date of current ver-sion October 7, 2014. Recommended for publication by Associate EditorS. Williamson.
The authors are with the Department of Electrical Engineering, In-dian Institute of Technology Delhi, New Delhi 110016, India (e-mail:[email protected]; [email protected]).
Digital Object Identifier 10.1109/TPEL.2014.2309706
(<600 W, <16 A) which includes many household equip-ments [14]. The conventional scheme of a BLDC motor fedby a diode bridge rectifier (DBR) and a high value of dc-linkcapacitor draws a nonsinusoidal current, from ac mains which isrich in harmonics such that the THD of supply current is as highas 65%, which results in PF as low as 0.8 [15]. These types ofPQ indices cannot comply with the international PQ standardssuch as IEC 61000-3-2 [14]. Hence, single-phase power factorcorrection (PFC) converters are used to attain a unity PF at acmains [16], [17]. These converters have gained attention due tosingle-stage requirement for dc-link voltage control with unityPF at ac mains. It also has low component count as compared toa multistage converter and therefore offers reduced losses [17].
Conventional schemes of PFC converter-fed BLDC motordrive utilize an approach of constant dc-link voltage of the VSIand controlling the speed by controlling the duty ratio of highfrequency pulse width modulation (PWM) signals [18]–[21].The losses of VSI in such type of configuration are consider-able since switching losses depend on the square of switchingfrequency (Psw loss ∝ f 2
S ). Ozturk et al. [18] have proposeda boost PFC converter-based direct torque controlled (DTC)BLDC motor drive. They have the disadvantages of using acomplex control which requires large amount of sensors andhigher end digital signal processor (DSP) for attaining a DTCoperation with PFC at ac mains. Hence, this scheme is not suitedfor low-cost applications. Ho et al. [19] have proposed an activepower factor correction scheme which uses a PWM switching ofVSI and hence has high switching losses. Wu et al. [20] have pro-posed a cascaded buck–boost converter-fed BLDC motor drive,which utilizes two switches for PFC operation. This offers highswitching losses in the front-end converter due to double switchand reduces the efficiency of the overall system. Gopalarathnamet al. [21] have proposed a single-ended primary inductance con-verter (SEPIC) as a front-end converter for PFC with a dc-linkvoltage control approach, but utilizes a PWM switching of VSIwhich has high switching losses. Bridgeless configurations ofPFC buck–boost, Cuk, SEPIC, and Zeta converters have beenproposed in [22]–[25], respectively. These configurations offerreduced losses in the front-end converter but at the cost of highnumber of passive and active components [22]–[25].
Selection of operating mode of the front-end converter is atradeoff between the allowed stresses on PFC switch and costof the overall system. Continuous conduction mode (CCM) anddiscontinuous conduction mode (DCM) are the two differentmodes of operation in which a front-end converter is designed tooperate [16], [17]. A voltage follower approach is one of the con-trol techniques which is used for a PFC converter operating in theDCM. This voltage follower technique requires a single voltagesensor for controlling the dc-link voltage with a unity PF. There-fore, voltage follower control has an advantage over a currentmultiplier control of requiring a single voltage sensor. This
872 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 2, FEBRUARY 2015
Fig. 1. BLDC motor drive fed by a PFC Cuk converter using a current multiplier approach.
Fig. 2. BLDC motor drive fed by a PFC Cuk converter using a voltage follower approach.
makes the control of voltage follower a simple way to achievePFC and dc-link voltage control, but at the cost of high stresson PFC converter switch [16], [17]. On the other hand, the cur-rent multiplier approach offers low stresses on the PFC switch,but requires three sensors for PFC and dc-link voltage con-trol [16], [17]. Depending on design parameters, either approachmay force the converter to operate in the DCM or CCM. In thisstudy, a BLDC motor drive fed by a PFC Cuk converter op-erating in four modes/control combinations is investigated foroperation over a wide speed range with unity PF at ac mains.These include a CCM with current multiplier control, and threeDCM techniques with voltage follower control.
II. SYSTEM CONFIGURATION
Figs. 1 and 2 show the PFC Cuk converter-based VSI-fedBLDC motor drive using a current multiplier and a voltage
follower approach, respectively. A high frequency metal–oxide–semiconductor field-effect transistor (MOSFET) is used in theCuk converter for PFC and voltage control [26]–[30], whereasinsulated-gate bipolar transistors (IGBTs) are used in the VSI forits low frequency operation. The BLDC motor is commutatedelectronically to operate the IGBTs of VSI in fundamental fre-quency switching mode to reduce its switching losses. The PFCCuk converter operating in the CCM using a current multiplierapproach is shown in Fig. 1; i.e., the current flowing in the inputand output inductors (Li and Lo), and the voltage across theintermediate capacitor (C1) remain continuous in a switchingperiod, whereas Fig. 2 shows a Cuk converter-fed BLDC motordrive operating in the DCM using a voltage follower approach.The current flowing in either of the input or output inductor (Li
and Lo) or the voltage across the intermediate capacitor (C1)becomes discontinuous in a switching period [31], [32] for aPFC Cuk converter operating in the DCM. A Cuk converter is
BIST AND SINGH: PFC CUK CONVERTER-FED BLDC MOTOR DRIVE 873
Fig. 3. Operation of the Cuk converter in the CCM during (a, b) differ-ent intervals of switching period and (c) associated waveforms. (a) Interval I.(b) Interval II. (c) Waveforms.
designed to operate in all three DCMs and a CCM of operationand its performance is evaluated for a wide voltage control withunity PF at ac mains.
III. OPERATION OF THE CUK CONVERTER IN
DIFFERENT MODES
The operation of the Cuk converter is studied in four differentmodes of CCM and DCM. In CCM, the current in inductors(Li and Lo) and voltage across intermediate capacitor C1 re-main continuous in a switching period [33]. Moreover, the DCMoperation is further classified into two broad categories of a dis-continuous inductor current mode (DICM) and a discontinuouscapacitor voltage mode (DCVM). In the DICM, the currentflowing in inductor Li or Lo becomes discontinuous in theirrespective modes of operation [31], [32]. While in DCVM op-eration, the voltage appearing across the intermediate capacitorC1 becomes discontinuous in a switching period [34], [35]. Dif-ferent modes for operation of the CCM and DCM are discussedas follows.
A. CCM Operation
The operation of the Cuk converter in the CCM is describedas follows. Fig. 3(a) and (b) shows the operation of the Cukconverter in two different intervals of a switching period andFig. 3(c) shows the associated waveforms in a complete switch-ing period.
Interval I: When switch Sw in turned ON, inductor Li storesenergy while capacitor C1 discharges and transfers its energy
Fig. 4. Operation of the Cuk converter in the DICM (Li ) during (a)–(c)different intervals of switching period and (d) associated waveforms. (a) IntervalI. (b) Interval II. (c) Interval III. (d) Waveforms.
to dc-link capacitor Cd as shown in Fig. 3(a). Input inductorcurrent iLi increases while the voltage across the intermediatecapacitor VC 1 decreases as shown in Fig. 3(c).
Interval II: When switch Sw is turned OFF, the energy storedin inductor Lo is transferred to dc-link capacitor Cd , and induc-tor Li transfers its stored energy to the intermediate capacitorC1 as shown in Fig. 3(b). The designed values of Li, Lo , and C1are large enough such that a finite amount of energy is alwaysstored in these components in a switching period.
B. DICM (Li) Operation
The operation of the Cuk converter in the DICM (Li) isdescribed as follows. Fig. 4(a)–(c) shows the operation of theCuk converter in three different intervals of a switching periodand Fig. 4(d) shows the associated waveforms in a switchingperiod.
Interval I: When switch Sw in turned ON, inductor Li storesenergy while capacitor C1 discharges through Switch Sw totransfer its energy to the dc-link capacitor Cd as shown inFig. 4(a). Input inductor current iLi increases while the volt-age across the capacitor C1 decreases as shown in Fig. 4(d).
Interval II: When switch Sw is turned OFF, the energy storedin inductor Li is transferred to intermediate capacitor C1 viadiode D, till it is completely discharged to enter DCM operation.
Interval III: During this interval, no energy is left in input in-ductor Li ; hence, current iLi becomes zero. Moreover, inductorLo operates in continuous conduction to transfer its energy todc-link capacitor Cd .
874 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 2, FEBRUARY 2015
Fig. 5. Operation of the Cuk converter in DICM (Lo ) during (a)–(c) differ-ent intervals of switching period and (d) associated waveforms. (a) Interval I.(b) Interval II. (c) Interval III. (d) Waveforms.
C. DICM (Lo) Operation
The operation of the Cuk converter in the DICM (Lo) isdescribed as follows. Fig. 5(a)–(c) shows the operation of theCuk converter in three different intervals of a switching periodand Fig. 5(d) shows the associated waveforms in a switchingperiod.
Interval I: As shown in Fig. 5(a), when switch Sw in turnedON, inductor Li stores energy while capacitor C1 dischargesthrough switch Sw to transfer its energy to the dc-link capacitorCd .
Interval II: When switch Sw is turned OFF, the energy storedin inductor Li and Lo is transferred to intermediate capacitorC1 and dc-link capacitor Cd , respectively.
Interval III: In this mode of operation, the output inductor Lo
is completely discharged; hence, its current iLo becomes zero.An inductor Li operates in continuous conduction to transfer itsenergy to the intermediate capacitor C1 via diode D.
D. DCVM (C1) Operation
The operation of the Cuk converter in the DCVM (C1) isdescribed as follows. Fig. 6(a)–(c) shows the operation of theCuk converter in three different intervals of a switching periodand Fig. 6(d) shows the associated waveforms in a switchingperiod.
Interval I: When switch Sw in turned ON as shown inFig. 6(a), inductor Li stores energy while capacitor C1 dis-charges through switch Sw to transfer its energy to the dc-linkcapacitor Cd as shown in Fig. 6(d).
Fig. 6. Operation of the Cuk converter in the DCVM (C1 ) during (a)–(c)different intervals of switching period and (d) associated waveforms. (a) IntervalI. (b) Interval II. (c) Interval III. (d) Waveforms.
Interval II: The switch is in conduction state but intermediatecapacitor C1 is completely discharged; hence, the voltage acrossit becomes zero. Output inductor Lo continues to supply energyto the dc-link capacitor.
Interval III: As the switch Sw is turned OFF, input inductorLi starts charging the intermediate capacitor, while the outputinductor Lo continues to operate in continuous conduction andsupplies energy to the dc-link capacitor.
IV. DESIGN OF THE PFC CUK CONVERTER
A PFC-based Cuk converter-fed BLDC motor drive is de-signed for dc-link voltage control of VSI with PFC at the acmains. The Cuk converter is designed for a CCM and threedifferent DCMs. In the DCM, any one of the energy storing el-ements Li, Lo or C1 is allowed to operate in the discontinuousmode whereas in the CCM, all these three parameters operatein continuous conduction. The design and selection criterion ofthese three parameters is discussed in the following section.
The input voltage Vs applied to the DBR is given as
vs(t) = Vm Sin(2πfLt) = 220√
2 Sin(314t)V (1)
where Vm is the peak input voltage (i.e.,√
2Vs, Vs is the rmsvalue of supply voltage), and fL is the line frequency, i.e., 50 Hz.
The instantaneous voltage appearing after the DBR is asfollows:
Vin(t) = |Vm Sin (ωt)| =∣∣∣220
√2 Sin (314t)
∣∣∣ V (2)
where ‖ represents the modulus function.
BIST AND SINGH: PFC CUK CONVERTER-FED BLDC MOTOR DRIVE 875
TABLE ISPECIFICATIONS OF A BLDC MOTOR
The output voltage Vdc of the Cuk converter is given as [15]
Vdc =D
(1 − D)Vin (t) (3)
where D represents the duty ratio.The instantaneous value of duty ratio D(t) depends on the
input voltage appearing after DBR Vin(t) and the required dc-link voltage Vdc .
Hence, the instantaneous duty ratio D(t) is obtained by sub-stituting (2) into (3) and rearranging it as
D(t) =Vdc
Vin(t) + Vdc=
Vdc
|Vm Sin (ωt)| + Vdc. (4)
The Cuk converter is designed to operate from a minimumdc voltage of 40 V (Vdcmin) to a maximum dc-link voltage of200 V (Vdcmax). The PFC converter of maximum power ratingof 350 W (Pmax) is designed for a BLDC motor of 251 W (Pm )(full specifications given in Table I) and the switching frequency(fS ) is taken as 20 kHz. Since the speed of the BLDC motoris controlled by varying the dc-link voltage of the VSI, hencethe instantaneous power Pi at any dc-link voltage (Vdc) can betaken as linear function of Vdc . Hence, for a minimum valueof dc-link voltage as 40 V, the minimum power is calculated as70 W.
A. Design of Li for Continuous or DiscontinuousCurrent Conduction
The critical value of input inductor Lic is expressed as [17]
Lic =Vin(t)D(t)2Iin(t)fS
=RinD(t)
2fS=
(V 2
s
Pi
)D(t)2fS
=1
2fS
(V 2
s
Pi
) (Vdc
Vin (t) + Vdc
)
(5)
where Rin(t) is the input side resistance, and Iin(t) is the inputside current after DBR.
Hence, the critical value of input side inductor is directlyproportional to the rms value of supply voltage; therefore, theworst case design occurs for the minimum value of supply volt-age (i.e., Vs = Vsmin = 85 V). Now, the critical value of inputinductor at the maximum dc-link voltages of 200 V at the peak
value of supply voltage (i.e.,√
2Vsmin ) is calculated as
Lic200 =1
2fS
(V 2
s min
Pmax
)(Vdc max√
2Vs min + Vdc max
)
=1
2 × 20 000
(852
350
)(200
85√
2 + 200
)
= 322.3μH.
(6)
And the critical value of the input inductor at the minimum valueof dc-link voltages of 40 V at the peak value of supply voltageis calculated as
Lic40 =1
2fS
(V 2
s min
Pmin
) (Vdc min√
2Vs min + Vdc min
)
=1
2 × 20 000
(852
70
)(40
85√
2 + 40
)
= 644.25μH.
(7)
Hence, the value of critical input inductance is obtained lowerat maximum dc-link voltage. Therefore, the critical value ofinput inductor is selected lower than Lic200 . The performanceof the Cuk converter feeding BLDC motor drive is analyzedfor different values of the input side inductor, i.e., 300, 200,and 100 μH, respectively. Fig. 7(a) shows the variation of THDof supply current at ac mains for the proposed BLDC motordrive with dc-link voltage for different values of the input sideinductor. A high THD of ac mains current is obtained at highervalues of the input side inductor which does not comply withthe IEC 61000-3-2 [14]. Hence, the input inductor (Li) of theorder of 100 μH is selected for its operation in discontinuousconduction to achieve a low value of THD of supply current atac mains.
The value of input inductor to operate in the CCM is decidedby the amount of permitted ripple current (η) and is as [17]
Liccm =Vin(t)D(t)ηIin(t)fS
=RinD(t)
ηfS=
(V 2
s
Pi
)D(t)ηfS
=1
ηfS
(V 2
s
Pi
) (Vdc
Vin (t) + Vdc
)
. (8)
The maximum inductor ripple current is obtained under therated condition, i.e., Vdc = 200 V for a minimum supply voltage(Vsmin = 85 V). Hence, the input side inductor is designed atthe peak value of minimum supply voltage (i.e., Vs =
√2Vsmin)
as
Liccm =1
ηfS
(V 2
s min
Pmax
)(Vdc max√
2Vs min + Vdc
)
=1
0.25 × 20 000
(852
350
) (200
85√
2 + 200
)
= 2.57mH
(9)
where the permitted amount of ripple current (η) is selected as25% of the input current.
Hence, the input side inductor of 2.5 mH is selected for itsoperation in continuous conduction.
876 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 2, FEBRUARY 2015
Fig. 7. Variation of THD of supply current at ac mains with change in dc-linkvoltage for (a) different values of input side inductors (Li ) and (b) differentvalues of output side inductors (Lo ).
B. Design of Lo for Continuous or DiscontinuousCurrent Conduction
The critical output side inductor is designed as [17]
Loc =Vdc (1 − D(t))
2ILo(t)fS=
VdcD(t)2Iin(t)fS
=RinVdcD(t)2Vin(t)fS
=(
V 2S
Pi
)Vdc
2Vin(t)fS
(Vdc
Vin(t) + Vdc
)
. (10)
The maximum current ripple in an inductor occurs at themaximum power and for minimum value of supply voltage (i.e.,Vsmin = 85 V). Hence, the output inductor is calculated at thepeak of supply voltage (Vin =
√2Vsmin). The critical value
of the inductor corresponding to maximum dc-link voltage of
200 V (i.e., Vdcmax ) is given as
Loc200 =(
V 2s min
Pmax
)Vdc max
2√
2Vs minfS
(Vdc max√
2Vs min + Vdc max
)
=(
852
350
)200
2√
2 × 85 × 20 000
(200
85√
2 + 200
)
= 536μH. (11)
Moreover, the critical value of output side inductor at peak ofVsmin and minimum dc-link voltage of 40 V is given as
Loc40 =(
V 2s min
Pmin
)Vdc min
2√
2Vs minfS
(Vdc min√
2Vs min + Vdc min
)
=(
852
70
)40
2√
2 × 85 × 20 000
(40
85√
2 + 40
)
= 214.4μH. (12)
Hence, the critical value of output inductor is to be selectedlower than Loc40 . The performance of the proposed BLDC mo-tor drive is analyzed for different values of output side inductor,i.e., 200, 130, and 70 μH, respectively.
Fig. 7(b) shows the variation of THD of supply current at acmains for the proposed BLDC motor drive with dc-link voltagefor different values of the output side inductor. A high THDof ac mains current is obtained at higher values of output sideinductor which does not comply with the IEC 61000-3-2 [14].Hence, the output inductor (Lo) of the order of 70 μH is selectedfor its operation in discontinuous conduction to achieve a lowvalue of THD of supply current at ac mains.
The value of output inductor to operate in the CCM is decidedby the amount of permitted ripple current (λ) and is as [17]
Loccm =Vdc (1 − D(t))
λILo(t)fS=
VdcD(t)λIin(t)fS
=RinVdcD(t)λVin(t)fS
=(
V 2s
Pi
)Vdc
λVin(t)fS
(Vdc
Vin(t) + Vdc
)
. (13)
Hence, the maximum current occurs at maximum dc-linkvoltage (i.e., Pmax ) and the minimum supply voltage of 85 V(i.e., Vsmin ). Hence, the value of output inductor (Lo) for apermitted maximum ripple current (λ) of 25% is calculated as
Loccm =(
V 2s min
Pmax
)Vdc max
λ√
2Vs minfS
(Vdc max√
2Vs min + Vdc max
)
=(
852
350
)200
0.25 ×√
2 × 85 × 20 000
(200
85√
2 + 200
)
= 4.29mH. (14)
Hence, Lo of 4.3 mH is selected for operation of outputinductor (Lo) in continuous conduction.
C. Design of C1 for Continuous or Discontinuous Voltage
The critical value of intermediate capacitance C1c is as [17]
C1c =VdcD (t)
2VC 1 (t) fS RL. (15)
BIST AND SINGH: PFC CUK CONVERTER-FED BLDC MOTOR DRIVE 877
Hence, by substituting the expressions of intermediate capac-itor voltage, VC 1(t) = {Vdc+Vin(t)}, emulated load resistance,RL = V 2
dc /Pi and D(t) from (4) in (15) and rearranging it oneobtains
C1c =Vdc
2 {Vdc + Vin (t)} fS
(
V 2dc
/
Pi
)
(Vdc
Vin (t) + Vdc
)
=Pi
2fS (Vin (t) + Vdc)2 . (16)
Now, the maximum ripple in the intermediate capacitor oc-curs at the maximum value of supply voltage (i.e., Vsmax =270 V). Hence, the critical value of the intermediate capacitanceis calculated at maximum dc-link voltage (Vdcmax = 200 V) as
C1c200 =Pmax
2fS
(√2Vs max + Vdc max
)2
=350
2 × 20 000(
270√
2 + 200)2 = 25.84 nF. (17)
And the critical value of intermediate capacitance at minimumdc-link voltage (Vdcmin = 40 V) is calculated as
C1c40 =Pmin
2fS
(√2Vs max + Vdc min
)2
=70
2 × 20 000(
270√
2 + 40)2 = 9.83 nF. (18)
Hence, an intermediate capacitor is selected less than C1c40 .Therefore, the value of intermediate capacitor is taken as 9.1 nFfor its operation in discontinuous conduction.
The value of intermediate capacitance to operate in the CCMwith a permitted ripple voltage of κ% is given as [17]
C1ccm =VdcD (t)
κVC 1 (t) fS RL
=Vdc
κ {Vdc + Vin (t)} fS
(
V 2dc
/
Pi
)
(Vdc
Vin (t) + Vdc
)
=Pi
κfS (Vin (t) + Vdc)2 . (19)
Hence, the value of intermediate capacitor is calculated atmaximum ripple voltage in C1 which occurs at maximum valueof supply voltage (i.e., Vsmax = 270 V) and maximum dc-linkvoltage and is given as
C1ccm =Pmax
κfS
(√2Vs max + Vdc max
)2
=350
0.1 × 20 000(
270√
2 + 200)2 = 0.516μF (20)
where κ is selected as 10% of the maximum voltage appearingacross the intermediate capacitor.
Hence, the intermediate capacitor of 0.66 μF is selected forthis application for the intermediate capacitor operating in con-tinuous conduction.
TABLE IIDESIGN PARAMETERS IN DIFFERENT MODES OF OPERATION
D. Design of DC-Link Capacitor (Cd)
The value of the dc-link capacitor is calculated by [17]
Cd =Idc
2ωΔVdc=
(Pi/Vdc)2ωδVdc
=Pi
2ωδV 2dc
. (21)
Now, the value of the dc-link capacitor is calculated at maxi-mum value of dc-link voltage given as
Cd200 =Pmax
2ωδV 2dc max
=350
2 × 314 × 0.04 × 2002 = 348.33μF
(22)where δ represents the permitted ripple in dc-link voltage whichis taken as 4% of Vdc .
And the dc-link capacitance at minimum value of dc-linkvoltage (Vdcmin) is expressed as
Cd40 =Pmin
2ωδV 2dc min
=70
2 × 314 × 0.04 × 402 = 1741.6μF.
(23)Hence, the value of the dc-link capacitor is taken higher than
the Cd40 to ensure a ripple of dc-link voltage less than 4% evenat lower values of dc-link voltages. Hence, the dc-link capacitorof 2200 μF is selected for the application.
Table II shows the specification of the PFC Cuk converter andthe selected values of input and output inductors, intermediatecapacitor, and the dc-link capacitor for a PFC Cuk converteroperating in different modes of conduction.
E. Design of Filter Parameters (Lf and Cf )
A low-pass LC filter is used to avoid the reflection of higherorder harmonics in the supply system. The maximum value offilter capacitance is given as [36]
Cmax =Im
ωLVmtan(θ) =
(
Pmax√
2/
Vs
)
ωLVmtan(θ)
=
(
350√
2/220)
314 × 220√
2tan(1◦) = 401.98 nF (24)
878 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 2, FEBRUARY 2015
where Im and Vm are the peak value of supply current andsupply voltage, respectively, and θ is the displacement anglebetween supply voltage and supply current.
Hence a value of filter capacitor Cf is taken as 330 nF.Now, the value of the filter inductor is designed by considering
the source impedance (Ls) of 4–5% of the base impedance.Hence, the additional value of inductance required is given as
Lf = Lreq+Ls ⇒ 14π2f 2
c Cf=Lreq +0.04
(1
ωL
) (V 2
s
Po
)
∴ Lreq =1
4π2×(2000)2 × 330×10−9−0.04
(1
314
) (2202
350
)
= 1.573 mH (25)
where fc is the cut-off frequency which is selected such thatfL < fc < fS ; hence, it is taken as fS /10.
Hence, an LC filter is selected with inductance Lf and capac-itance Cf as 1.57 mH and 330 nF, respectively.
Therefore, an input side LC filter with Lf = 1.57 mH andCf = 330 nF is taken for harmonics suppression at the ac mains.
V. CONTROL OF THE PFC CUK CONVERTER-FED BLDCMOTOR DRIVE
Two different control schemes of the PFC Cuk converter arethe current multiplier and the voltage follower approach for itsoperation in CCM and DCM, respectively. A brief descriptionof both control schemes is presented in this section.
A. Current Multiplier Approach for the Cuk ConverterOperating in the CCM
An equivalent reference voltage (Vdc∗) corresponding to theparticular reference speed (N∗) is generated by a “ReferenceVoltage Generator” as the speed of the BLDC motor which isproportional to the dc-link voltage of the VSI. Fig. 1 showsthe Cuk converter feeding BLDC motor drive using a currentmultiplier approach. A reference voltage is generated by theproduct of speed and the voltage constant (Kb) of the BLDCmotor and is given as
V ∗dc = kbN
∗. (26)
This reference voltage is compared with the sensed dc-linkvoltage (Vdc) to generate a voltage error (Ve). The voltage errorVe at any instant “k” is given as
Ve(k) = V ∗dc(k) − Vdc(k). (27)
This voltage error is given to voltage proportional-integral(PI) controller for generation of a controlled output (Vc) as
where kpi and kii are the proportional and integral gain of thecurrent PI controller.
Finally, the controller output (Vcc) is compared with the highfrequency sawtooth waveform to generate the PWM signal tobe given to the PFC converter switch as
md(t) < Vcc(t) then Sw = 1, else Sw = 0 (32)
where Sw denotes the switching signals as 1 and 0 for MOSFET
to switch ON and OFF, respectively.
B. Voltage Follower Approach for the Cuk ConverterOperating in the DCM
In this approach, a reference voltage (Vdc∗) corresponding tothe particular reference speed (N∗) is generated similar to thecurrent multiplier approach as
V ∗dc = kbN
∗ (33)
where kb represents the BLDC motor’s voltage constant and N∗is the reference speed.
Now, this reference voltage is compared with sensed dc-linkvoltage (Vdc) to generate a voltage error (Ve). The voltage errorVe at any instant “k” is given as
Ve(k) = V ∗dc(k) − Vdc(k). (34)
This voltage error is given to the voltage PI controller togenerate a controlled output (Vcd) given as
where kpv and kiv are the proportional and integral gain of thevoltage PI controller.
Finally, the controller output (Vcd) is compared with the highfrequency sawtooth waveform to generate the PWM signal tobe given to PFC converter switch as
md(t) < Vcd(t) then Sw = 1, else Sw = 0 (36)
where Sw denotes the switching signals as 1 and 0 for MOSFET
to switch ON and OFF, respectively.
VI. SIMULATED PERFORMANCE OF THE PROPOSED BLDCMOTOR DRIVE
The performance of the Cuk converter-fed BLDC motor driveis simulated for four different modes in MATLAB/Simulink en-vironment. The performance of each mode of operation is eval-uated on the basis of various performance parameters. Supplyvoltage (vs) and supply current (is) are used for estimating the
BIST AND SINGH: PFC CUK CONVERTER-FED BLDC MOTOR DRIVE 879
Fig. 8. Simulated performance of the BLDC motor drive with the Cuk con-verter operating in the CCM.
PQ of the system. The speed (N), electromagnetic torque (Te),and the stator current (ia) of the BLDC motor are used for deter-mining the satisfactory operation of the BLDC motor, whereasthe dc-link voltage (Vdc), inductor’s currents (iLi and iLo), in-termediate capacitor’s voltage (VC 1), switch voltage (Vsw ), andswitch current (isw ) are used for the performance evaluation ofthe PFC Cuk converter. PQ indices such as PF, displacementpower factor (DPF), crest factor, and THD of supply current areanalyzed for determining PQ at ac mains.
A. Performance of the BLDC Motor Fed by the Cuk ConverterOperating in the CCM
The circuit configuration and control of the PFC Cuk con-verter operating in the CCM are shown in Fig. 1. The parametersselected for this converter to operate in the CCM are as follows:
Input inductor Li = 2.5 mH, output inductor Lo = 4.3 mH,intermediate capacitor C1 = 0.66 μF, and dc-link capacitorCd = 2200 μF.
Fig. 8 shows the performance of the proposed BLDC mo-tor drive fed by a PFC Cuk converter operating in the CCM.Fig. 8 shows the steady-state performance demonstrating theassociated waveforms for 3 cycles of line frequency. The input
TABLE IIIPERFORMANCE OF THE BLDC MOTOR DRIVE WITH THE CUK CONVERTER
OPERATING IN THE CCM
inductor current iLi , output inductor current iLo , and interme-diate capacitor’s voltage VC 1 are continuous in operation whilethe supply current iS is sinusoidal and in phase with the supplyvoltage vS which shows a unity PF at ac mains. Table III showsthe performance of the proposed BLDC motor fed by a PFC Cukconverter operating in the CCM over a wide range of dc-linkvoltage control (i.e., speed control) with unity PF operation at acmains [14]. Table VII shows the peak voltage and current stressof the PFC converter switch for different modes of operation.The peak voltage and current stresses of 560 V and 8.1 A areobtained under rated condition in this mode of the CCM.
B. Performance of the BLDC Motor Fed by a Cuk ConverterOperating in the DICM (Li)
The circuit configuration and control of the PFC Cuk con-verter operating in the DICM of operation with input inductor(Li) operating in discontinuous conduction are shown in Fig. 2.The parameters selected for this converter to operate in DICM(Li) are as follows:
Input inductor Li = 100 μH, output inductor Lo = 4.3 mH,intermediate capacitor C1 = 0.66 μF, and dc-link capacitorCd = 2200 μF.
The steady-state performance of the Cuk converter-fed BLDCmotor drive operating in the DICM with input inductor operatingin discontinuous conduction is shown in Fig. 9. The input in-ductor current iLi is discontinuous as shown in Fig. 9, while theoutput inductor current iLo and intermediate capacitor’s voltageVC 1 remain continuous. Table IV shows the improved PQ op-eration of the BLDC motor fed by a Cuk converter operating inthe DICM (Li) over a wide range of speed control. As shown inTable VII, peak voltage stress of 570 V and peak current stressof 33.1 A are obtained under rated condition in this mode of theDICM (Li).
C. Performance of the BLDC Motor Fed by a Cuk ConverterOperating in the DICM (Lo)
The circuit configuration and control of the PFC Cuk con-verter operating in the DICM of operation with output inductor(Lo) operating in discontinuous conduction are shown in Fig. 2.
880 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 2, FEBRUARY 2015
Fig. 9. Simulated performance of the BLDC motor drive with the Cuk con-verter operating in the DICM (Li ).
TABLE IVPERFORMANCE OF THE BLDC MOTOR DRIVE WITH THE CUK CONVERTER
OPERATING IN THE DICM (Li )
The parameters selected for this converter to operate in theDICM (Lo) are as follows:
Input inductor Li = 2.5 mH, output inductor Lo = 70 μH,intermediate capacitor C1 = 0.66 μF, and dc-link capacitorCd = 2200 μF.
Fig. 10. Simulated performance of the BLDC motor drive with the Cuk con-verter operating in the DICM (Lo ).
TABLE VPERFORMANCE OF THE BLDC MOTOR DRIVE WITH THE CUK CONVERTER
OPERATING IN THE DICM (Lo )
Fig. 10 shows the performance of the proposed BLDC motordrive fed by a PFC Cuk converter operating in the DICM (Lo).A discontinuous output inductor current iLo is obtained whilethe input inductor current iLi and intermediate capacitor’s volt-age VC 1 remain in continuous conduction operation. Table Vshows the performance of the BLDC motor drive fed by a Cuk
BIST AND SINGH: PFC CUK CONVERTER-FED BLDC MOTOR DRIVE 881
Fig. 11. Simulated performance of the BLDC motor drive with the Cuk con-verter operating in the DCVM.
converter operating in the DICM (Lo) over a wide range ofdc-link voltage control (i.e., speed control). An improved PQoperation is achieved for the complete range of speed control.The peak voltage and current stress of 560 V and 20.5 A, re-spectively, is obtained under rated condition in this mode of theDICM (Lo) as shown in Table VII, which is quite acceptablefor a power rating of 350 W.
D. Performance of the BLDC Motor Fed by a Cuk ConverterOperating in the DCVM (C1)
The circuit configuration and control of the PFC Cuk con-verter operating in the DCVM of operation with the interme-diate capacitor (C1) operating in discontinuous conduction areshown in Fig. 2. The parameters selected for this converter tooperate in the DCVM (C1) are as follows:
Input inductor Li = 2.5 mH, output inductor Lo = 4.3 mH,intermediate capacitor C1 = 9.1 nF, and dc-link capacitor Cd =2200 μF.
The steady-state performance of the BLDC motor drive fedby a Cuk converter operating in the DCVM is shown for 3 cyclesof line frequency in Fig. 11. In this mode, the voltage across the
TABLE VIPERFORMANCE OF THE BLDC MOTOR DRIVE WITH THE CUK CONVERTER
OPERATING IN THE DCVM (C1 )
intermediate capacitor (VC 1) remains discontinuous while thecurrents in input and output inductors (iLi and iLo) remain incontinuous conduction. A near unity PF operation is achievedat the ac mains for a wide range of dc-link voltage control (i.e.,speed control) as shown in Table VI. As shown in Table VII, thepeak current stress of 10.5 A is obtained which is low and of theorder of peak current stress as obtained in the CCM, but a veryhigh voltage stress of 1950 V is obtained under rated conditionwhich makes this configuration difficult to realize in practice.
E. Comparative Analysis of the Proposed BLDC Drive Withthe PFC Cuk Converter in Different Modes of Operation
The performance of the Cuk converter feeding a BLDC motorhas been analyzed for different continuous and discontinuousmodes of operation. The stress on the PFC converter switchin case of the PFC Cuk converter operating in the CCM isvery low, but it utilizes a current multiplier approach for PFCoperation which requires three sensors (i.e., two voltages andone current sensor), which is not recommended for low-costand low-power applications. The performance in terms of PQis obtained satisfactory in all configurations. Fig. 12(a) and (b)shows the variation of THD of supply current and PF at ac mainswith dc-link voltage. The THD of supply current obtained isbelow 9% in all modes which is well acceptable in IEC 61000-3-2 which recommends a THD of supply current of the orderof 19% for class-A applications (household equipments) [14].The PF obtained is above 0.99 for all conditions which shows aunity PF operation at the ac mains.
An analysis based on the peak voltage across the switch andcurrent stress through the switch is also carried out to deter-mine the feasibility and the stress constraints of the proposedscheme. Fig. 13(a) and (b) shows the peak voltage and currentstress variation with the load on the BLDC motor. As shown inFig. 13(a), the voltage stress of the DCVM (C1) is very high(1950 V) and cannot be recommended because of higher switchrating requirement, whereas the voltage stress for the remainingthree modes is of the order of 560 V which is acceptable. Now,the choice among the two configurations of DICM is decided
882 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 2, FEBRUARY 2015
TABLE VIISTRESS ON PFC CONVERTER SWITCH FOR DIFFERENT CONFIGURATION OF THE CUK CONVERTER-FED BLDC MOTOR DRIVE
Fig. 12. Variation of (a) THD of supply current and (b) PF with dc-link voltagefor different configuration of the PFC Cuk converter-fed BLDC motor drive.
on the basis of peak current stress as shown in Fig. 13(b). Alower current stress in the DICM (Lo) is obtained which makesit suitable for the particular application. Moreover, EMI prob-lems in the DICM (Li) configuration are high because of the
Fig. 13. Variation of (a) switch peak voltage and (b) peak current with loadfor different configuration of the Cuk converter-fed BLDC motor drive.
input side inductor which in series with the supply operating indiscontinuous mode. A comparative analysis of four differentmodes of operation is summarized in Table VIII. Based on thisanalysis, a hardware prototype of the BLDC motor drive with
BIST AND SINGH: PFC CUK CONVERTER-FED BLDC MOTOR DRIVE 883
TABLE VIIICOMPARATIVE ANALYSIS OF VARIOUS MODES OF OPERATION
TABLE IXCOMPARATIVE ANALYSIS OF THE PROPOSED CONFIGURATION WITH
CONVENTIONAL SCHEMES
the Cuk converter operating in DICM (Lo) is developed as dis-cussed in the next section.
F. Comparative Evaluation of the Proposed ConfigurationWith Conventional Schemes
This section deals with a comparative study of three con-figurations of BLDC motor drive. The proposed configurationis compared with a conventional DBR-fed BLDC motor driveand a conventional single-switch PFC converter feeding BLDCmotor drive via a PWM-based switching of VSI [18]–[20]. Theevaluation is based on the control requirement, sensor require-ment, system complexity, losses in a drive system, and the over-all cost of the system.
Table IX shows a comparative performance of the proposedconfiguration with the conventional scheme of BLDC motordrives. The proposed configuration requires a single voltagesensor for dc-link voltage control as compared to other twoconfigurations, which reduces the cost of the overall system.The sensor requirement in a conventional PFC-based BLDCmotor drive is highest due to the use of PWM-based switchingof BLDC motor which requires two current sensors and onevoltage sensor for dc-link voltage control. Moreover, a simple
TABLE XVARIATION OF DC-LINK VOLTAGE AND SPEED WITH REFERENCE VOLTAGE
control loop for dc-link voltage control and to achieve electroniccommutation is used which requires a low-cost processor for thedevelopment purpose.
Hence, the simplicity, low losses in VSI due to fundamentalswitching, requirement of minimum amount of sensing, anda much simple approach of speed control with a PFC at acmains make the proposed drive a good solution for low-powerapplication.
VII. HARDWARE VALIDATION OF THE PROPOSED DRIVE
A DSP (TI-TMS320F2812) is used for the development ofthe proposed BLDC motor drive. Isolation between the DSP-based controller and gate drivers of solid state switches of VSIand PFC converter is provided using an opto-coupler. The pre-filtering and isolation circuits for a Hall-effect position sensorare also developed for sensing the rotor position signals. More-over, software-based moving average filter is also developed forsensing the Hall signals [37]. The performance of the proposeddrive is evaluated for a wide range of speed control with unityPF operation at ac mains.
A. Steady-State Performance of the Proposed Drive
Fig. 14(a) and (b) shows the operation of the proposed BLDCmotor drive for a dc-link voltage (Vdc) of 200 and 50 V, respec-tively. The supply current is achieved is sinusoidal in nature andis in phase with the supply voltage vs demonstrating the unityPF at ac mains. The dc-link voltage Vdc is maintained at the de-sired value and the frequency of stator current ia of the BLDCmotor is used for the determination of speed of the BLDC mo-tor. The frequency of the stator current as shown in Fig. 14(a)and (b) is of the order of 80 and 18 Hz, respectively (electroniccommutation of the BLDC motor). This frequency is very lowas compared to PWM-based control of VSI for controlling thespeed of the BLDC motor drive. Hence, the switching lossesin VSI corresponding to such low frequency are very low ascompared to PWM based switching of VSI. The variation ofspeed and the dc-link voltage with reference voltage at analog-to-digital converter (ADC) of DSP is shown in Table X.
B. Operation of the Cuk Converter Operating in theDICM (Lo)
Fig. 15(a) and (b) shows the waveforms of current in inputand output inductors (iLi and iLo) and intermediate capacitor’svoltage (VC 1) to demonstrate the DICM operation of outputinductor Lo . As shown in these figures, the current in inputinductor (iLi) and voltage across intermediate capacitor (VC 1)
884 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 2, FEBRUARY 2015
Fig. 14. Steady-state performance of the Cuk converter-fed BLDC motor driveunder rated condition with dc-link voltage as (a) 200 V and (b) 50 V.
remain continuous but the current in output inductor becomesdiscontinuous for a switching period. Fig. 15(c) shows the volt-age and current of the PFC converter’s switch with peak voltageand current stress of 580 V and 19 A, respectively.
C. Dynamic Performance of the Proposed Drive
Fig. 16(a) shows the dynamic performance of the proposedBLDC motor drive during starting at dc-link voltage of 50 V.This stator current (ia) of the BLDC motor and supply currentwaveforms are recorded to show the limited overshoot under thedynamic conditions. Fig. 16(b) shows the dynamic performanceof the proposed BLDC motor drive during speed control whichis obtained by step change in dc-link voltage from 100 to 150 V.Moreover, the dynamic performance of the proposed BLDC mo-tor drive during step change in supply voltage from 250 to 180 Vis shown in Fig. 16(c). The change in dc-link voltage is obtainedwith smooth transition and limited overshoot in supply current
Fig. 15. Test results of the proposed BLDC motor drive showing (a) supplyvoltage with inductors currents and intermediate capacitor’s voltage and (b)its enlarged waveforms. (c) Waveform of voltage and current stress on PFCconverter switch.
BIST AND SINGH: PFC CUK CONVERTER-FED BLDC MOTOR DRIVE 885
Fig. 16. Test results of the proposed BLDC motor drive at rated load onBLDC motor during: (a) starting at dc-link voltage of 50 V, (b) step change indc-link voltage from 100 to 150 V, and (c) change in supply voltage from 250 to170 V.
Fig. 17. PQ indices of the proposed BLDC motor drive at rated load on theBLDC motor with: (a)–(c) dc-link voltage as 200 V under rated conditions,(d)–(f) dc-link voltage as 50 V under rated conditions, (g)–(i) dc-link voltage as200 V and supply voltage as 90 V at rated load, (j)–(l) dc-link voltage as 200 Vand supply voltage as 270 V at rated load.
and stator current of the BLDC motor, which demonstrates asatisfactory closed-loop performance of the proposed drive.
D. Unity PF Operation of the Proposed Drive
Supply voltage vs , supply current is , active Pac , reactive Pr ,and apparent Pa powers are measured on a “Fluke” make PQanalyzer to demonstrate the PQ indices such as PF, DPF, andTHD of supply current. Fig. 17(a)–(c) and (d)–(f) shows theresults obtained at dc-link voltage of 200 and 50 V, respectively.Moreover, Fig. 17(g)–(i) and (j)–(l) shows the performance atsupply voltages of 90 and 270 V, respectively. An improved PQis obtained in all these conditions and the obtained PQ indicesare within the recommended limits of IEC 61000-3-2 [14]. Asatisfactory performance of the proposed BLDC motor drive fedby a PFC Cuk converter is achieved and is demonstrated throughsimulated and experimental results. Thus, the proposed drive issuitable for achieving a unity PF at ac mains over a wide rangeof speed control at universal ac mains.
886 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 2, FEBRUARY 2015
Fig. 18. Waveform of the supply current showing the “control detuning phe-nomenon” in a Cuk converter operating in the DICM (Lo ).
VIII. CONCLUSION
A Cuk converter for VSI-fed BLDC motor drive has beendesigned for achieving a unity PF at ac mains for the devel-opment of the low-cost PFC motor for numerous low-powerequipments such fans, blowers, water pumps, etc. The speedof the BLDC motor drive has been controlled by varying thedc-link voltage of VSI, which allows the VSI to operate in thefundamental frequency switching mode for reduced switchinglosses. Four different modes of the Cuk converter operating inthe CCM and DCM have been explored for the development ofthe BLDC motor drive with unity PF at ac mains. A detailedcomparison of all modes of operation has been presented on thebasis of feasibility in design and the cost constraint in the de-velopment of such drive for low-power applications. Finally, abest suited mode of the Cuk converter with output inductor cur-rent operating in the DICM has been selected for experimentalverifications. The proposed drive system has shown satisfac-tory results in all aspects and is a recommended solution forlow-power BLDC motor drives.
APPENDIX
Detuning phenomenon in a Cuk converter: “Detuning phe-nomenon” represents the inability of a PFC converter to main-tain a sinusoidal supply current at near zero-crossings of thesupply voltage [38]. This distortion of the supply current at itszero crossing results in high THD of supply current and directlyaffects the PF at ac mains. Now, considering a case of a PFCCuk converter-fed BLDC motor drive with the Cuk converteroperating in the DCM with output inductor (Lo) is designedto operate in the DCM. During the PFC operation, the supplycurrent is in phase with the supply voltage and it is sinusoidalin nature. The input power at zero crossings of supply voltageis very low and the duty ratio is unity. Hence, a distortion ininput inductor current occurs due to inability of the input induc-tor to maintain a continuous current through it. Fig. 18 showsthe distortion of supply current near zero crossing for a PFC
Cuk converter-fed BLDC motor drive with the Cuk converteroperating in the DICM (Lo).
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Vashist Bist (S’13) received the Diploma and B.E.degrees in instrumentation and control engineeringfrom the Sant Longowal Institute of Engineering andTechnology, Punjab, India, in 2007 and 2010, respec-tively, and is currently working toward the Ph.D. de-gree in the Department of Electrical Engineering, In-dian Institute of Technology Delhi, India.
His research interests include power electronics,electrical machines and drives.
Bhim Singh (SM’99–F’10) received the Bachelor ofEngineering (electrical) degree from the University ofRoorkee, Roorkee, India, in 1977, and the M.Tech.(power apparatus and systems) and Ph.D. degreesfrom the Indian Institute of Technology Delhi (IITD),New Delhi, India, in 1979 and 1983, respectively.
In 1983, he joined the Department of ElectricalEngineering, University of Roorkee, as a Lecturer. Hebecame a Reader there in 1988. In December 1990,he joined the Department of Electrical Engineering,IITD, as an Assistant Professor, where he became
an Associate Professor in 1994 and a Professor in 1997. He was the ABBChair Professor from September 2007 to September 2012. Since October 2012,he has been a CEA Chair Professor. He has guided 45 Ph.D. dissertations,139 M.E./M.Tech. theses, and 60 B.E./B.Tech. projects. He has been grantedone US patent and has filed 12 Indian patents. His fields of interest include powerelectronics, electrical machines, electric drives, power quality, renewable energy,flexible ac transmission systems, and high voltage direct current transmissionsystems.
Dr. Singh received Khosla Research Prize of University of Roorkee in theyear 1991. He received JC Bose and Bimal K Bose awards of The Institutionof Electronics and Telecommunication Engineers for his contribution in thefield of power electronics. He also received the Maharashtra State NationalAward of Indian Society for Technical Education (ISTE) in recognition ofhis outstanding research work in the area of power quality. He received PESDelhi Chapter Outstanding Engineer Award for the year 2006. He also receivedKhosla National Research Award of IIT Roorkee in the year 2013. He has beenthe General Chair of the IEEE International Conference on Power Electronics,Drives and Energy Systems (PEDES’2006), Co-General Chair of PEDES’2010,held in New Delhi. He has executed more than 60 sponsored and consultancyprojects. He is a Fellow of The Indian National Science Academy, the IndianNational Academy of Engineering, The National Academy of Science, India,The Indian Academy of Sciences, India, The World Academy of Sciences, theInstitute of Engineering and Technology, Institution of Engineers (India), andInstitution of Electronics and Telecommunication Engineers and a Life Memberof the ISTE, System Society of India, and National Institution of Quality andReliability.
