CHAPTER 1CHAPTER 1GENERAL DESCRIPTIONGENERAL DESCRIPTIONANDANDARCHITECTURE ARCHITECTURE OF OF THE SYSTEMTHE SYSTEMED.2 Update of the chapterED.1 Creation of theRelease 2.A L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY Page 1/1SUMMARY OF CHAPTER 11. GENERAL DESCRIPTION AND ARCHITECTURE OF THE SYSTEM......................................1.1 GENERALITIES.................................................................................................................................................1.1.1 INTRODUCTION.........................................................................................................................................1.1.2 THE A.C.T.: ALCATEL CRYSTAL TECHNOLOGY..................................................................................1.1.2.1 Description...........................................................................................................................................1.1.2.2 Advantages..........................................................................................................................................1.1.2.3 Limits...................................................................................................................................................1.2 THE "ALCATEL CRYSTAL TECHNOLOGY" (A.C.T.) CONFIGURATION.....................................................1.3 THE MULTI "ALCATEL CRYSTAL TECHNOLOGY" (A.C.T.) CONFIGURATION.........................................1.4 ARCHITECTURE OF THE SYSTEM.................................................................................................................1.4.1 THE ARCHITECTURE OF THE BASIC CONFIGURATION......................................................................1.4.2 THE ARCHITECTURE OF THE MULTI A.C.T. CONFIGURATION...........................................................1.5 ARCHITECTURE DESCRIPTION.....................................................................................................................1.5.1 INTRODUCTION.........................................................................................................................................1.5.1.1 ACT LINK TYPE 1 AND THE ACCESS CHIP CALLED C1................................................................1.5.1.2 Other ACT links...................................................................................................................................1.5.2 FUNCTIONAL SPLIT IN ALCATEL 4400..................................................................................................1.5.2.1 Main reasons.......................................................................................................................................1.5.2.2 Clock....................................................................................................................................................1.5.2.3 Circuit switching...................................................................................................................................1.5.2.4 Packet switching..................................................................................................................................1.5.2.5 Tones/DTMF detector and generator..................................................................................................1.5.2.6 Conference..........................................................................................................................................1.5.2.7 The voice messages............................................................................................................................1.5.2.8 Power supply.......................................................................................................................................1.5.3 THE PROCESSING IN ALCATEL 4400.....................................................................................................1.5.3.1 Processing architecture.......................................................................................................................1.5.3.2 Processing units..................................................................................................................................1.5.3.3 Software...............................................................................................................................................1.5.4 THE LINK TYPE 1 AND THE C1 MECHANISMS......................................................................................1.5.4.1 Type1 links, its structure....................................................................................................................1.5.4.2 The general mechanisms of the C1 chip.............................................................................................1.5.4.3 The inter-ACT link................................................................................................................................1.5.4.4 The UA link..........................................................................................................................................A L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/2GENERAL DESCRIPTION AND ARCHITECTURE OF THE SYSTEM GENERALITIESINTRODUCTIONThis chapter describes the architecture of the A4400 for the generic release 1.X.X.. The mainspecifcities of this release are :*a large panel of shelves and cabinets which covers the whole range from 50 to 4000 users.- WM1 cabinet: wall mounted 9 slot cabinet with integrated power supply on the mains.- M1 cabinet: contains a 10 slot shelf and a power supply shelf on the mains.- M2 cabinet: can contain a 28 slot shelf or two 14 slot shelves (external 48V power supply)- M3 cabinet: can contain two 28 slot shelves or four 14 slot shelves (external 48V power supply)- PWSC cabinet: contains a power supply shelf on the mains able to power feed a M1 or M2 cabinet.- Voice HUB: the last of the range which is a PBX system housed in a 19" data look rackable module,itcovers the range from 10 to 128 users.* backpanel design able to support high bandwidth applications (tested up to 622 Mbits/s)(the only available link to day in the ACT is the 8 Mbits/s link, handled by the C1 chip)* three types of Attendant consoles:- A4034 console: A4034 set working as Attendant (possibility to take on an AOM)- A4048 console: Flat Bed Console (with LCD display and possibility to take on an AOM)- A4058 console: Screen Based Console, A4034 set with a PC-V24 connected as subdevice* Z interfaces for analog sets and devices (Fax, Minitel etc..)* UA interfaces with a large panel of digital sets:- A4001, A4003, A4011, A4012, A4023, A4034, A4040 (Alpha line)- A5010, A5015, A5018, A5022, A5028 (Beta line)- A4088 (Terminal adapter allowing DATA ports)* possibility to make remote UA sets (and subdevices) with a range up to 8Km * integrated SO interfaces* integrated public and private interfaces- analog: NDDI, DDI, Tie lines (depending on the countries requirements)- digital: PCM (NDDI, DDI, Tie lines), T0, T2 (public and private networks)* DATA ports:- behind UA sets (set subdevices) or terminal adapterasynchronous V24 interfaces (V110/V14) (V110/V120)synchronous V24,V35,V36, X21 interfaces (V110/V120)SO interfaces (with or without bus power feeding)- on CPU boards: asynchronous V24/V28 ports802.3 Ethernet access- on IO2 and SPB boards: asynchronous V24/V28 ports- on ECX1 board: 802.3 accesses (8x10Base-T and 1x AUI)* DECT functionalities thanks DECT4 boards (for 4 base stations each one) and using A4075 handsets with high integrated A4400 features.A L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/3* voice processing (voice mail, Fax server, automated attendant):- external applications with integrated features: A4620, A4630.- full integrated applications: 4635H, 4635J- mini-messaging* integrated applications:- ACD application with trafc analysis, PC application for supervision and administration.- Hotel/Hospital applications- Automated attendant applications- CTI applications* ability to fulfl homogeneous networks up to 32 nodes and 20000 users with ABC- F2 protocol and homogeneous numbering plan. (a node can be a stand alone A.C.T. ora multi-A.C.T. system)* ability to fulfl heterogeneous networks with ABC- F1 protocol or QSIG protocol.* signifcant network features such as N x 64K channels, VPN services, LCR services.* stand alone and network management thanks a range of A47XX management machines.(confguration, accounting, faults and alarm management, performances...)THE A.C.T.: ALCATEL CRYSTAL TECHNOLOGYDescriptionThe ALCATEL 4400 system is based on the ACT which is a set of full interconnected boards, where each board is connected to the others through point to point links.Physically each link represents 4 wires.All the links are layed out on the system back panel. Depending on the type this back panel ofers up to 28 slots ; each slot has 27 links (4 wires) to all the other slots. These slots are non dedicated (excepted for the basic "Call handling" CPU) ; that means that each kind of board (coupler or CPU or auxiliary) can be plugged in any position in the back panel.All the links are not necessarily used ; in this case they are physically present in the back panel but not used. Each board receives the knowledge of this environment (link used) during the initialisation phase.Links can be particularised depending on the needs of the peer-to-peer connected boards, in terms ofwires use, transmission technique, transmission code and throughput.The following fgure gives a logical representation of the "ACT"A L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/4Utilisez Word 6.0c (ou ultrieur)pour afficher ue i!a"e Macitosh.Physically the ACT is a shelf ; this shelf has, depending on the type up to 28 slots where the boards are plugged in.All these slots are interconnected via a back panel which has all the necessary wires.Advantages * openness for architecture evolutionSuch an architecture allows to recreate all the systems topologies usually used, like loops, part of loops, single star, double star, etc... A topology shall be chosen rather than an other depending on theneeds of exchanges between boards.A L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/5cetral fuctio#oard#oard#oard#oard#oardExample of the use of the ACT architecture in loopscetral fuctio#oard#oard#oard#oard#oard Example of the use of a single star : centralisation of a specifc function (e.g. a packet switching function)Therefore, it is easy to realise a functional split depending on the needs in the system : some functionsare centralised (CPU, clock, voice guidance), others are distributed (power supply, switching, etc.).Moreover it is always possible to add boards whatever their characteristics of bandwidth or rate, within the limits of the maximum authorised number of boards.A L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/6*Cost efective-in small capacity (from 50 users)-for the traditional voice services* Openness for new services(packet switching, broadband)The architecture is open to future needs like high bandwidth data, cells, video :- a physical link (4 wires) is in every case available- the use of the link is depending on the need of the extremities.The following fgure shows in the ACT how new bandwidth requirements (e.g. 155 Mbits/s between futurerelease x boards) can work together with solutions taken for the previous releases. Themain constraint if cross communication are necessary is that the release x board must be able to handle both the new link and the link to the release 1 boards.Utilisez Word 6.0c (ou ultrieur) pour afficher ue i!a"e Macitosh.* PerformancesPoint to point transmission allow to have high throughputs in the system without implementing ex-pensive and complicated technics. As there is no more division of the links, it is useless to foreseevery high throughputs links to carry the addition of throughputs used by each participant.Then, as the addition of a board means the addition of several links, the global trafc increases withthe number of boards.A L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/7* RedundancyIn Alcatel 4400 system, the redundancy must be seen under diferent considerations :- Because of the full point to point exchanges, board redundancy possibility is intrinsic.More, links with transmission problems do not disturb the other transmissions- As the chosen architecture allows to distribute most of the functions, failure problems are limited : a board owns, locally, its necessary resources. In case of failure, only the concerned boardis disturbed.Thus only centralised functions must be assisted ; e.g. the main CPU can be duplicated.Limits* According to the complexity of the back plane in such an architecture and for packaging reasons, we limit at 28 boards per ACTWith this limit, all the confgurations between 50 and about 400 lines will be covered with only1 ACT. For systems which have more then 400 lines an interconnection of ACTs isrequired.* The second limits is given by the maximum bandwidth that the 4 wires of the back panel can carry ; this limits is about 150 Mbits/s (today tested at 622 Mbits/s).A L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/8THE "ALCATEL CRYSTAL TECHNOLOGY" (A.C.T.) CONFIGURATION- The basic confguration of the 4400 has only one ACT ; this confguration is described in the following drawing.$oice "uidaceUA%&O'TO pac(etT)'T0 *CMC*U&0&0+&,- &ETISDNnetworks& private pac(ete. li( for pac(et traffic i future releaseli( t/pe 0 for circuit ad si"alli" trafficA L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/9THE MULTI "ALCATEL CRYSTAL TECHNOLOGY" (A.C.T.) CONFIGURATION- The ACT and the full meshing between boards is limited to 28 boards. With 28 boards it is not possible to cover the whole range up to 4000 users. Therefore multi-ACT interconnection is required. For ALCATEL 4400 we use the star confguration to interconnect up to 20 ACTs. -The whole of the system is articulated around one Master or Main A.C.T. including the system CPU (and the redundant CPU) which represents the frst level of the confguration.The 19 other A.C.Ts, called peripheral A.C.Ts, can be structured in a second A.C.T. level (it means that they are connected directly on the main A.C.T.) or can constitute a third A.C.T. level (it means that some ofthem are connected on second level peripheral A.C.Ts) as shown in the following drawing.Third level of A.C.T. (Peripheral A.C.T.s)First level of A.C.T. (Main A.C.T.)+terACT li(+terACT li(+terACT li(+terACT li(+terACT li(+terACT li(MainCP!ed"ndantCP1oard1oard1oard 1oardI.#. $ I tercoectio#oardI.#.I.#.I.#.I.#.I.#.I.#.I.#.I.#.I.#.I.#.1oard1oard1oard1oard1oard1oard1oard1oard1oard1oard1oard1oard1oardTo a secod le2el peripheral ACTTo a secod le2el peripheral ACTI.#.I.#.+terACT li(I.#.I.#.I.#.1oard1oardSe%ond level of A.C.T. (Peripheral A.C.T.s)To a third le2el peripheral ACTI.#.To a third le2el peripheral ACTI.#.A L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/10ARCHITECTURE OF THE SYSTEMTHE ARCHITECTURE OF THE BASIC CONFIGURATION* The basic confguration is a mono ACT confguration. It covers the range between 50 to 400 users. This confguration exists in diferent packaging depending on the shelf type : 9, 10, 14 or 28 and depending on the presence of an US shelf (A 4300 concentrator). The US shelf is interesting in case of A4300 migrationwhen the end user want keep his 4300 digital sets or/and analog trunk interfaces not available in A.C.T. size boards.*when required up to 12 A4300 US shelves can be connected to the central ACT. Eachconcentrator is connected through one or two 2Mbit/s PCM links* The following drawings show the basic confguration and the main physical entities which are partof the release.Several Voice Processing applications: external and integrated and DECT applicationC*U3VPCPUMSBSPA3SCSI 4635H4635JZ46104620$oice Mail &'()PCMV24ZV244635IDECTBasestation4075 or4074handsetA L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/11Telephone and Data applications*4A1 #usU&T+E ,,+A 5300 cocetratorISDNnetworksanalo*networksISDNnetwork&0T05 6 $)500 6 $)570).3Attedat CosoleA50358 A50578A5097TA+&,- &ET& privateanalo*networks+ M,it-s links t.pe /AU: %T)'*CMUAC*U3$)5as/c.8s/c.:)08 &O8 iterf.%$)5as/c.8 :)08 &O8 iterf.% e. iterf.14A&U'$;%(&*1)+O)Modem, MAO etc..A L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/12THE ARCHITECTURE OF THE MULTI A.C.T. CONFIGURATION- The multi ACT confguration covers the range between 400 and 4000 users.This confguration can have up to 20 ACTs interconnected in a star topology.- The main principlesof the ALCATEL 4400 confguration are :* one CPU will control the whole system. This CPU is located in the central or main ACT (regarding to the star topology).The main advantage of this choice is to increase the capacityof the system with full homogeneous services. That means that this confguration has the same services as ALCATEL 4400 mono-ACT.* the other ACTs do not have any CPU ; they are called peripheral ACTs* the interconnection between the central ACT and the peripheral ACTs can be done throughseveral ways depending of the topology constraints and the trafc of the installation.- by INT board providing 4 simultaneous 2Mbit/s links (copper link but can be moved to fbre optic linksthanks addition of TNLO boards).- by INTOF board providing one 8 Mbit/s link (can be a copper link or a fbre optic link thanks a back panel daughter board called COST). It is mandatory in case of DECT applications.- by RT2 board providing one 2 Mbit/s link (this type of link is used to interconnect a main A.C.T. and a small remote A.C.T. on leased line through the public domain)* the communication which involve only subscribers from a same peripheral ACT are donelocally* the signalling coming from the peripheral ACT to the central ACT is relayed by the interconnection boards.* this confguration has a redundant CPU when more than 64 trunks are connected to thesystem. In that case the back-up CPU is located in the central ACT. * when required up to 12 A4300 US shelves are connected to the central ACT. Eachconcentrator is connected through one or two 2Mbit/s PCM linkThe following drawing shows the architecture of the ALCATEL Multi A.C.T. confguration.A L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/13ALCATEL 4400 multi-A.C.T. architectureCPMainCP !ed"ndantPeripheral A.C.T.third level (re!ote i this case)MAIN A.C.T.First levelINT/A+-TT)UAINT/#INT0FUAUAUAT)&0&0%T)U&T+E AU:tru( ,,+U& shelfINT/#INT/AINT0FINT0FINT0F!T1a!T1,P",li% do2ain(leased line)T0*CMUAUAT)UAINT0FINT0FPeripheral A.C.T.se%ond level *CM%&U'$;A L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/14ARCHITECTURE DESCRIPTIONThis chapter describes the system concerning switching, processing and software.This chapter is split into tree parts :- one which describes the system in term of inter-connections of the diferent elements of the system,- the second part which describes the system in terms of functional split onto the several physicalentities of the system- the third par which describes the system in terms of processing and software.INTRODUCTIONThe ALCATEL 4400 system is based on the ACT which is a set of full interconnected boards, where each board is connected to the others through point to point links. But this point is already described in the previousparagraph 1.1.2. of ACT LINK TYPE 1 AND THE ACCESS CHIP CALLED C1The ACT ofers from each board 4 wires to all the other boards. For the narrow band service of thefrst release the needsbetween the boards are :- be able to carry at least 64 voices channels between two boards (case the UA board which has 32 connections with 2 channels per connection)- be able to carry signalling messages between the boards and the CPU.The choice which was done is to create a 8 Mbit/s link called link type 1 which is able to carry :- up to 120 channels at 64 Kbit/s- 1 bi-directional packet channel at 256 K bits/sThe link type 1 is handled by an ALCATEL dedicated chip called C1.This chip is directly connected to the back panel and handles the 27 x 8 Mbits/s links towards all the other boards of the ACT.The main function realised by this chip are :- the broadcasting of the B channels from any boards to all the 27 links of type 1- the circuits switching for each of the 120 incoming B channels to one of the local (to the board) B-channels- the packet access for the signalling messages between the couplers and the CPU- the conferences between B channels ; each conference is limited to a 3 party conferenceThis chip will be used on each board connected to the ACT.The C1 chip is one of the main element of the hardware architecture of this frst release ; it determines all the communication mechanisms in the system.Other ACT linksThey are specifcs links able to carry high bandwidth trafc like cells, video, packets and will be fulldefned later.A L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/15FUNCTIONAL SPLIT IN ALCATEL 4400Main reasonsThe physical architecture of ALCATEL 4400 allows to split the functions easily according to the needs :the principal need is to avoid redundancy problems, and thus to decentralise the most functions of thesystem.Feasibility and cost are criteria to distribute a function or not.The system owns 3 types of boards, the CPU(s), the couplers (lines termination) and the auxiliariesboards with specifc functionality.The diferent functions are then split on the boards as follows :ClockThe necessity to transport B channels entails the need to synchronise all the system, and to use acentralised clock.As CPU and clock are minimal and essential functions, the clock module is implemented on the CPUboard (or on the INT board in case of several interconnected ACT). Synchronisation and clock sig-nals are then distributed to each board.The clock signal is provided by the CPU and can be synchronised by an external pilot : this one comesfrom a public network through a KD (ETSI terminology for public network access) interface (T2 or T0 interface for instance), or from a private network with digital specialised lines, through a MD (ETSI terminology for privatelinks between PABXs) interface.The following fgure outlines the clock distributionA L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/16T0 boardCPUT2 boardCPUexternal piloteclock signalClock distribution and synchronisationNotes :- The CPU can provide or receive the clock. It is depending on the role of the CPU : the master CPU will provide the clock, the back-up CPU will receive the clock in order to check its presence.- The clock signal and the pilot signal are layed out in the panel in a bus principle.Circuit switchingTo avoid redundancy of the function (for reliability in case of problem), the circuit switching is decentralised and realised on the couplers that handle circuits.On the ALCATEL 4400 links carrying B channels, circuits are broadcasted. They are switched at the arrival : afterreceiving command from the CPU, each destination coupler knows which circuits it has to be extracted.In case of local communication on the coupler, or in case of tones processing, B channels are switchedon the board.A L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/17Utili sez Word 6.0c (ou ultrieur)pour afficher ue i!a"e Macitosh. Circuit switching principlePacket switching* D channel packet switchingThe D channel packet switching is handled in a centralised mode. The packet are extracted from the D channels and sent to the main CPU were they are switched to the destination D channel.* 802.3 packet switching : for further study.Tones/DTMF detector and generator* The detectionThe tone processing (tone detection, Q23 detection, R2 detection,...) is realised on each telepho-nic coupler (line boards, DDI, NDDI) ; the necessary tones /DTMF detectors are located on theconcerned boards : the switch of the corresponding channels is assured locally.There is one exception : the DTMF detectors necessary during the conversation phase (e.g. for aautomatedattendant function or a DISA function are located on auxiliary boards (SU/VG or GPA).* The generationThe tones frequencies, the music on hold and the Q23 signal are centrally generated. The genera-tors are located on the CPU of the system ; the signals are then broadcasted in the system to eachboard.The R2 and the SOCOTEL generators are located on auxiliary boards (SU/VG or GPA)The cadence of the tones is realised on the line boards.A L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/18ConferenceThe conference function is decentralised on the couplers for conferences up to 3 participants maxi-mum. Several conferences can be activated at the same time on each telephonic coupler.The compression/decompression, and the "addition" of the B channels concerned by the conferenceare realized on the coupler.For conferences with more than 3 participants, the specifc auxiliary board GPA is needed (extended to 29participants). It integrates compression/decompression, addition and attenuation functions.The voice messagesAll the voice messages necessary for the voice guidance service are centrally located on an auxiliaryboard called voice guidance. The voice messages can be sent in diferent modes : or one time, or severaltimes, or indefnitely to each given channel.To provide interactive voice guidance (e.g. for the automated attendant, DISA) the necessary DTMFdetector are located on the same board. These detectors are specially used for this purpose.Power supplyThe power supply is distributed on each board : 48 V is the only voltage given to the boards and eachboard convertsit into the specifc voltages it needs.Thus the available power increases with the system's extension.A L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/19THE PROCESSING IN ALCATEL 4400Processing architectureIn ALCATEL 4400 the processing is centralised ; that means that the basic services (call handling) will run on only one CPU. This CPU controls all the interfaces of the system via dedicated protocols between the central CPU and the on board controllers.For backup reasons this CPU can be duplicated.Processing unitsTo cover the whole of the capacity range of the A4400 several types ofCPU boards are available:CPU3 with a 386 SX processor, CPU3 step 2 with a 386 EX processorCPU2 with a 486 DX processorCPU5 with two processor daughter boards, one of them supports all INTEL 486 processor family and the other one includes the PENTIUM processor also from INTEL. The processing units of ALCATEL 4400 are based on PC architecture with standard PC chip set.These processing units can be connected to IO boards via AT bus on stifener. The CPU owns a hard disk and the controller to drive a foppy disk.SoftwareSYSTEM SOFTWARE DISTRIBUTIONThe PABX software is distributed on several CPUs :- the CPU part (basic "Call handling" CPU and optional application CPUs)- the Interface boards CPU SOFTWARE 1.5.3.3.1. System software layersThe software is divided into 3 layers :- OS CHORUS kernel layer, controlling the other 2 layers- INTERFACE layer, enabling the applications to communicate- APPLICATION layer, ofering system integratedapplicationsA L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/20Utilisez Word 6.0c (ou ultrieur) pour afficher ue i!a"e Macitosh.BASIC PRINCIPLEA L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/21The APPLICATIONS layer contains :- real time application (telephone application, packet switching, etc,)- UNIX applications (system management, call charging, phonebook, etc,).The Alcatel platform provides the applications with the means to communicate :- with applications supported by the same OS CHORUS (application layer)- with external applications or users external accesses.The Alcatel platform interfaces are :- MiX for UNIX applications- IO1, IO2, SPB (V24) board controllers- the telephone monitor (MONITEL)- X25 monitor1.5.3.3.2. Real time applications The telephony applications handles :- voice and data call management- management of terminals, connections, resources (lines, auxiliaries, bundles), maintenance of equipment and telephone services- creation and transmission of call data records to the call charging application- dialogue with the ACD, hotel, hospital applications, with voice services and telemarketing.X25 packet switching handles :- X25 layer 3 application- supervision of permanent logical links (T2, S0, V24, etc.)- access for PABX applications to the X25 world- transport ina wide, multi-Crystal network- network supervision.1.5.3.3.3. UNIX applicationsThe main UNIX applications are MAO, call charging and trafc observation.- The MAO function manages the confguration of the system ; it uses a SQL server. Dialogue with the PC MAO applications is done via CMIP/CMISE. Some functions can also be accessed via attendant consoles or users sets.- Call charging ensures storage on disk and management of call data records received from the tele- phone application- Trafc observation updates counters corresponding to a type of event.A L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/22The following (incomplete) list presents other UNIX applications :- phonebook, ACD, telemarketing, hotel/hospital management, fle transfer between CPU disk and external accesses, teleloading of interface boards EPROM.1.5.3.3.4. Alcatel platformthe sub-system called Monitel is the interface and medium of the telephone application for coupler board signalling.The X25 monitor is the X25 application interface.The IO controller provides the CPU boards (CPU, IO2, SPB) with the means for communicating :- signalling messages to coupler boards- reception of signalling messages and addressing to the correct main and back-up CPU application (telephone application, X25 switching, background task, maintenance, MAO application, telephony application PC)- SPB (V24) controller ensures the link between a CPU application and V24external access.- the Ethernet controller ensures access for 802.3 interface- the IO2 controller ensures the link between the B channel and the CPU application (X25 switching or UNIX application) as well as IO2 management.MiX is the UNIX sub-system supporting the UNIX applications.CMIP/CMISE is the OSI layer 7 protocol for network management (MAO/Confguration and Maintenance, Call charging, Trafc observation).ABC-A is the protocol used for the following applications : Screen based Console (Alcatel 4058) and FAX/E-Mail server (Alcatel 4855)ABC-F is the protocol which integrates a more or less greater part of the services across a homogeneous or heterogeneous PABX network.A L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/23Other protocols are used for the following applications :- voice mails- videophone (PC processing wide band video switching)- protocol for ACD/MIS, hotel telemarketing external systemINTERFACE BOARD SOFTWARE Interface board software is divided into three parts :- an operating system- the common part:. for a basic system : - system initialisation, transmission controllers, cadencing,EPROM software, dynamic memory processing- the specifc part:. for the telephone services of specifc couplers :- transmission, line signalling detect, registers for this sig- nallingThe interface boards forspecifc applications are located on the corresponding boards : INT, UA, SUVG, PAG, PRA, BPRA, PCM, etc.Softwares boards can be downloaded from CPU, except for INT boards.THE LINK TYPE 1 AND THE C1 MECHANISMSThis chapter describes one of the main element of the ALCATEL 4400 architecture : the link which interconnects all the boards and the access chip to all these link called C1.Type1 links, its structureThe links of type 1 are used to carry circuits or B channels between telephonic boards, analog subs-cribers, trunk line, mixed, UA (...) and signalisation between CPU boards and couplers. Each link oftype 1 ofers a 8 Mb/s rate and consists in 128 time slots of 64 kbits/s. The link is synchronous : all the couplers have the same clock. The link is organised in :- 2 banks of 60 times slots used to carry 64 K Bits/s channels (or n x 64 kbits/s channels)- 2 banks of 4 x 64 kbits/s channels slots used to carry packets ; these times slots are considered as a 256 K bits/s channel.The following fgure presents the mapping on the link :! S ! S ! S ! S !60 TS ! S ! S ! S ! S !60 TS !packet packets channel 1 channel 2These channels are used to carry packets between the couplers and the CPUs ; these packets can besignalling messages or D channel packets :A L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/24The following fgure shows how the channels are used :- the CPU handles the channel 1 from all the link to receive packets (the CPU has no access in the reception way to the channel 2- the couplers are receiving on channel 2 ; they have no physical access in the reception way to channel 1Utilisez Word 6.0c (ou ultrieur)pour afficher ue i!a"e Macitosh.The general mechanisms of the C1 chip* C1 Environment and general functionsC1 is present on all boards which have access to ACT. It handles mainly the access to the 27 x 8Mbits/s links of type 1. C1 is ever associated to a processor which controls the chip ; this processoris a 80188. The following drawing shows C1 in its general environment.Utilisez Word 6.0c (ou ultrieur) pour afficher ue i!a"e Macitosh.A L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/25The functions of C1 can be classifed into :- transmission functions- packet access and transmission- circuit switching functions- miscellaneous functions* Transmission functionC1 handles the transmission and the framing of the 27 links it controls. It accesses directly to thewires of the back panel.* Packet channel handling C1 handles the access to the 256 K bits/s packet channel on each link. Due to the multiple access(27 transmitters to one receiver) it was necessary to defne an access mechanism. The choice is a mechanism of request / grant (very similar to 802.9).The principle is as follow :- when a coupler wants to send a message on the 256 kbits/s channel of a link, it has frst to send a request signal (automatically sent by C1) to the C1 of the destination coupler. When the receiver CPUis OK it will program its DMA and via C1 send back a grant signal. When receiving the grant signal, the C1 activates the DMA of the 80188 and the transfer happens.The C1 can simultaneously send a message to one line and receive a message from an other line.Utilisez Word 6.0c (ou ultrieur) pour afficher ue i!a"e Macitosh.A L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/26* Switching mechanismThe switching function of C1 allows the connection of 64 Kbits/s channels and also n x 64 kbits/s channels. The principle of the switching is based on :- the broadcasting of all the channels of a coupler to all the ACT links- the switching of the channel is done at the receiving sideThe following drawing presents the switching principle in ALCATEL 4400Utilisez Word 6.0c (ou ultrieur) pour afficher ue i!a"e Macitosh.The switching function consists in :- switching anyone of the 28 x 120 time slots of the ALCATEL 4400 links to anyone of the 120 B channels of the internals PCMs- broadcasting anyone of the 120 B channels of the PCMs on its corresponding timeslot of the27ALCATEL 4400 links* Conference functionThe addition of the participants time slots is realized in each coupler. This addition is done by the C1chips which realises the decompression, addition, recompression with the content of two time slots.For the intrusion (which is 3 party conference + a tone) it is necessary frst to add the tone to theoperator's channel and then realise the conference.In case of conference with more than 3 participants, a specifc auxiliary board is foreseen in thesystem.A L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/27The following scheme presents the conference principle :Utilisez Word 6.0c (ou ultrieur) pour afficher ue i!a"e Macitosh. Conference A, B, C, D : exchange of the time slots* Miscellaneous functions for specifc useSome functions of C1 like :- OET/CET (Terminal Observation/Command) handling for the analog board- UA layer 2 handling for the UA board- tone cadencing are dedicated to special use on some couplersThe inter-ACT linkThis link between two ACTs of a ALCATEL 4400 confguration carries :- 64 kbits/s channels or n x 64 k bits/s channels- packets (e.g. signalling messages)- clock and synchronisation between two ACTsA L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/28In fact there are three types of physical links (as seen 1.3.3.), INTxA/B links, INTOF links and RT2 links.INTxA/B link is physically composed of 4 x 2 Mbits/s PCM, (4 x 32 T.S. 120 B channels).A maximum of four INTA/B links are authorised to interconnect two A.C.T., that is to say 480 B channels.The channels are used as follows :- 4 x 64 kbits/s channel are used to carry the signalling packets between the main CPU and the board of the peripheral ACT- according to the needs of the diferent countries, the basic frequencies 30 x 64 Kbits/s channels are used to carry the tones, the Q23 frequencies and the music on hold signal to the peripheral ACT- the remaining channel (depending on both the number of INT boards and the number of available PCMs) are usable for voice or data switching For a standard confguration with 2 INT boards and backup, 180 x 64 kbits/s are available for the normal trafc :-> 1 INT board : 90 TS (voice or data) + 30 TS (tones) + 4 TS (signalling)-> 2 INT boards with backup : 180 TS (voice or data) + 30 TS (tones) + 4 TS (signalling)+ 30 TS (tones backup) + 4 TS (signalling backup)-> 2 INT boards without backup : 210 TS (voice or data) + 30 TS (tones) + 4 TS (signalling)- confguration rules at peripheral ACT level : the frst INT board is in CPU position (clock distribution function) the second INT board is in backup CPU position (for signalling and tones channels backup) or not (no signalling and tones channels backup) the two additional INT boards are anywhere in the peripheral ACT.INTOF is physically composed of 1 x 8 Mbits/s link, (128 T.S. 120 B channels).A maximum of four INTOF links are authorised to interconnect two A.C.T., that is to say 480 B channels.The switching rules concerning signalling, tones and voice or Data are the same as for INTA/B links.The confguration rules at peripheral ACT level are also the same as for INTA/B links.RT2a/b link is physically composed of 1 x 2 Mbits/s PCM, (1 x 32 T.S. 30 B channels).A maximum of two RT2a/b links are authorised to interconnect two A.C.T., that is to say 60 B channels.The channels are used as follows :- 1 x 64 kbits/s channel are used to carry the signalling packets between the main CPU and the board of the peripheral ACT- Contrary to the other links, tones, Q23 frequencies and music on hold signal are generated directly by the RT2b board on the peripheral ACT. Therefore the 30 B channels of the link are available for voice and Data. For a confguration with 2 RT2a/b links, 60 x 64 kbits/s are available for the normal trafc.- confguration rules at peripheral ACT level : the frst RT2b board is in CPU position (clock distribution function) the second RT2b board, if backup, is in backup CPU position (for signalling backup); if not backup it can be located anywhere in the peripheral A.C.T..A L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/29The UA linkThe UA (User Access) link carries :- 1 UA signalling channel at 64 kbits/s- 3 B channelsThe signalling packets carried by the signalling channel of the UA link canbe :- either UA layer 3 messages- either ABC A messages carried by the UA protocol as escape frames- either ISDN signalling messages- or X25 packets in D channelThe UA link allows the connection of either :- a UA set which can have the following options :* a V24 subdevice* a S0 subdevice* a MAC/PC subdevice- a DTE adapter which can be equipped with two data subdevices (e.g. 2 V24)The UA boards handles the polling of the 32 UA signalling channels and the layer 2 between the board and the terminal. All the messages are then sent to the active CPU. On the reverse way the board receives the frames from the CPU and send them to the addressed UA signalling channels. The proces-sor of the UA board provides the segmenting of the layer 3 packets into layer 2 frames.END OF DOCUMENTA L C T E LTELECOMLarge Systems Marketing Dpt.All rights reserved. Passing on and copying of this document, use andcommunication of its contents not permitted without writtenautorization.Ref. LSMD392/96INTERNAL USE ONLY ED.2 Page: 1/30