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Chapter 01: Introduction
CSS430 Systems Programming
These slides were compiled from the OSC tet!oo" slides #Sil!erschat$% &al'in%
and &agne( and the instructors) class materials*
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Why Operating Systems?
Goals
Execute user programsand make solving user problemseasier
Making the computer system convenientto use
Using computer ardwarein an eicient manner
!einitions
"esource allocator +manages and allocates resources
#ontrol program
+controls the execution o user programs and operations o $%O devices
&ernel+the one program running at all times 'all else being application programs(
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#omputer System #omponents
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CSS503CHAPTER 1: INTRODUCTION
Operating)System Operations
*rotection
!istinguishing user and kernel
$%O Management
+synchronous $%Os
*rocess Management,aunching- synchroni.ing- and terminating programs
Memory Management
Giving each task a independent logical address space
Storage Management
Giving logical views o disk spaces- 'i/e/ directories and iles(
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+ bit o 0istory
1atch systems
Multiprogramming
2ime)sharing systems 'multi)user(
*# Systems 'protection3(
Symmetric Multiprocessor +rchitecture
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1atch Systems
+ 4ob is assembled o the program- the data- and some control inormation 'in control cards(/
*rogrammers pass their 4obs to an operator/
2he operator batched together 4obs/
OS transers control rom one 4ob to ano
ther/
Each 4ob output is sent back to the programmer/
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Multiprogramming
Several 4obs are kept in main memory at the same time/
OS picks one o them to execute/
2he 4ob may have to wait or a slow $%O operation to complete/
OS switches to and executes another 4ob/
2o acilitate multiprogramming- OS needs5 Job scheduling
Memory management
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2ime)Sharing Systems
2his is a logical extension o multiprogramming/
Each user has at least one separate program in memory/
+ program in execution is reer
red to as a process/ *rocess switch occur so re6ue
ntly that the users can interactwith each program while it is r
unning/ 7ile system allows users to access data and program interactively/
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*ersonal)#omputer Systems
*ersonal computers
+computer system dedicated to a single user/
User convenienceand responsiveness
#an adopt technology developed or larger operating system
ssome eatures/
+t its beginning- a single user system didnt not need advanced #*U utili.ation and protection/
,ater- ile protection is necessary to avoid virus and bad stu
Overall- t e same OS concepts are appropriate
or t e various dierent classes o computers
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Symmetric Multiprocessing +rchitecture
Multiprocessor systems with more than one #*U in close communication 'in one box(/
2ig t ly cou pled system processors share memory and a clock8 shared)memory)based communication/
+dvantages o parallel system5
$ncreased throughput
Economical
$ncreased reliability
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9uad)#ore !esign
An MPU chip has fourCPU cors! ach: o"nin# i$s o"n s%a&& '1 cach! sharin# a &ar# '( cach! an) accssin# $h %ain %%or* $hrou#h '(+
11CSS,30 Opra$in# S*s$%s : In$ro)uc$ion
M%or*
r#is$rs
cach
r#is$rs
cach
r#is$rs
CPU cor1CPU cor0 CPU cor(
r#is$rs
CPU cor3
cach cach
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#omputer System Organi.ation Computer-system operation (hardware):
One or more CPUs, device controllers connect through common busproviding access to shared memory.
Concurrent execution of CPUs and devices competing for memory cycles.
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#omputer)System Operation
$%O devices and the #*U can execute concurrently/
Each device controller is in charge o a particular device type/
Each device controller has a local buer/
#*U
moves data rom%to main memory to%rom local buers/
$%O is rom the device to local buer o controller/
!evice controller inorms #*U that it has inished its operation by causing an
interrupt
/
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#ommon 7unctions o $nterrupts
$nterrupt transers control to the interrupt service routine generally- through the interruptvector- which contains the addresseso all the service routines/
$nterrupt architecture must save the addresso the interru
pted instruction/
$ncoming interrupts are disabled while another interrupt isbeing processed to prevent a lost interrup t /
+ trapis a sotware)generated interrupt caused either by anerror or a user re6uest/
+n operating system is interrupt driven/
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!ual)Mode Operations:/ User modeexecution done on behal o a user/
;/ &ernel mode'also supervisor mode- system mode- or &ernel mode(execution done on behal o OS
Switc ing between two modes5
User to &ernel5 !evice interrupts- hardware traps )) system calls cause a trap to the kernel mode
&ernel to User5 special instruction '$"E2( causes the OS to return to user mode ater servicing re6uests/
15
OS M t d O i
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OS Managements and Overview
$%O and interruptions
*rocesses
Storage 'hierarchy(
Memory and !M+
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$nterrupt 0andling
2he operating system preserves the state o the #*Uby storing registers and the program counter/
!etermines which type o interrupt has occurred5
polling
vectored
interrupt system
Separate segments o code determine what action should be taken or each type o interrupt/
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Synchronous $%O
!uring execution- each program needs $%O operations to rece
ive keyboard inputs- open iles-
and print out results/+t the early computer era- a program had to wait or an $%O operation to be completed/ 'Sync
hronous $%O(2his re6uently causes #*U idle/
1-
In$rrup$ Han)&r
Har)"ar)a$a $ransfr
user
time
D.ic Dri.r
R/us$in# procss"ai$in#
kernel
Durin# cu$ion! ach
pro#ra% n)s IOopra$ions $o rci.2*oar) inpu$s! opn 4&s!an) prin$ ou$ rsu&$s+
In $h ar&* co%pu$r ra! apro#ra% ha) $o "ai$ for anIO opra$ion $o co%p&$)+ S*nchronousIO6
This fr/un$&* causs CPUi)&+
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+sync $%O and $nterrupts
) +synchronous $%O returns control to a user progra
m wit outwaiting or the$%O to complete/
) When the $%O is complet
ed- aninterrupt
occurs to#*U that temporarily susp
ends the user program and handles the $%O device/
In$rrup$ Han)&r
Har)"ar)a$a $ransfr
user
time
D.ic Dri.r
R/us$in# procsscon$inuin#
kernel
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CSS503CHAPTER 1: INTRODUCTION
$%O Management
7aster #*U%Memory versus Slower $%Os
Synchronous $%O or #*U $%O
#*U takes care o +ll $%O operations/
*olling wastes #*U time/
r/us$in# procss"ai$in#
).ic )ri.r
In$rrup$ han)&r
Har)"ar
)a$a $ransfr
usr
2rn&
$i%
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CSS503CHAPTER 1: INTRODUCTION
$%O Management 'cont/(
Device interrupts and DMA
Asynchronous I/O DMA takes care of I/O data transfers.
Devices interrupt CPU when they areready.
a r/us$in# procssrp&ac) "i$h ano$hr on
).ic )ri.r
In$rrup$ han)&r
Har)"ar)a$a $ransfr
usr
2rn&
$i%
DMA
interrupts
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CHAPTER 1: INTRODUCTION
*rocess Management
+ program in execution
*rocess needs5
#*U- memory- 7iles- $%Os etc/
OS must supports5 #reation5 loading it in memory
Synchroni.ation%communication5aving a process wait or another/
2ermination5 clean it up rom mem
ory
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CSS503CHAPTER 1: INTRODUCTION
Memory Management
*roviding each process witha logical address space
Mapping logical address to physical address 'paging andsegmentation(
7acilitating virtual memory using disk
Stack
Text
Heap
Stack
Text
Heap
Stack
Text
Heap
Process As Logical Address
Process Bs Logical Address
Process C
Physical Address Space
irtual Me!ory in Disk
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CSS503CHAPTER 1: INTRODUCTION
Storage Management
!isk partitioning
+llowing multiple ile systems
7ile and directory manage
ent ,ogical to physical mapping
7ile operations open- read- write- seek- close
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Storage)!evice 0ierarchy
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CSS503CHAPTER 1: INTRODUCTION
Memory 0ierarchy
Level Size Speed
(ns)
Managed
by
Registers 1KB 0.25 ~ 0.5 Compiler
Cache 16MB 0.5 ~ 25 Hardware
Main
memory
16GB 80 ~ 250 OS
Hard disks Several TB 5000 OS
$mportant "ules on Storage Operations
$nclusion property
Memory coherence
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CSS503CHAPTER 1 INTRODUCTION
!iscussions
Solve 2ext Exercises5
:/< '*rivileged $nstructions(
:/:= '#*U Mode(
:/;; '!M+(
:/;> '#ache Memory(