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Chapter 5 Dr. Panos Nasiopoulos - University of British...

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Dr. Panos Nasiopoulos Sequential Logic 1 Sequential circuit: A circuit that includes memory elements. In this case the output depends not only on the current input but also on the past inputs. A synchronous sequential circuit uses signals that affect the storage elements only at discrete instances of time. - timing device: clock pulse Chapter 5 Synchronous Sequential Logic Memory Memory
Transcript

Dr. Panos Nasiopoulos

Sequential Logic 1

Sequentialcircuit:Acircuitthatincludesmemoryelements.Inthiscasetheoutputdependsnotonlyonthecurrentinputbutalsoonthepastinputs.

Asynchronoussequentialcircuitusessignalsthataffectthestorageelementsonlyatdiscreteinstancesoftime.-timingdevice:clockpulse

Chapter5SynchronousSequentialLogic

Memory

Memory

Dr. Panos Nasiopoulos

Sequential Logic 2

Flip-Flops

Flip-Flop:acircuitthatcanmaintainabinarystateindefinitely.

RSFlip-Flop

Aflip-flophastwousefulstates:whenQ=1:setstate;whenQ=0:resetorclearstate.

Q

Q’ FF

Dr. Panos Nasiopoulos

Sequential Logic 3

•  ClockedRS

•  Whenbothinputsaresetto1,theoutputsmomentarilygoto0.Thestateisindeterminate.

Q S R Q(t+1)0 0 0 0

0 0 1 0

0 1 0 1

0 1 1 indeterminate

1 0 0 1

1 0 1 0

1 1 0 1

1 1 1 indeterminate

WhenCgoesto1,informationfromSandRgoesthroughtotheFF.

Characteristictable

Dr. Panos Nasiopoulos

Sequential Logic 4

•  DFlip-Flop

•  JKFlip-Flop

Q D Q(t+1)0 0 0

0 1 1

1 0 0

1 1 1

Characteristictable

D Q(t+1)0 0

1 1

J K Q(t+1)

0 0 Q

0 1 0

1 0 1

1 1 Q’

Dr. Panos Nasiopoulos

Sequential Logic 5

•  TFlip-Flop

T Q(t+1)0 Q

1 Q’

Dr. Panos Nasiopoulos

Sequential Logic 6

Characteristic&ExcitationTables

Q Q(t+1) J K0 0 0 X

0 1 1 X

1 0 X 1

1 1 X 0

Q Q(t+1) D0 0 0

0 1 1

1 0 0

1 1 1

Q Q(t+1) T0 0 0

0 1 1

1 0 1

1 1 0

S R Q(t+1)0 0 Q(t)

0 1 0

1 0 1

1 1 ?

J K Q(t+1)0 0 Q

0 1 0

1 0 1

1 1 Q’

D Q(t+1)0 0

1 1

T Q(t+1)0 Q

1 Q’

Dr. Panos Nasiopoulos

Sequential Logic 7

AnalysisofSequentialCircuits

•  StateEquations:–  Behaviorofclockedcircuitsisdescribedbystateequations

–  Stateequations:specifynextstateasafunctionoftheinputsandthepresentstate

–  A(t+1)=–  B(t+1)=

–  y=

Dr. Panos Nasiopoulos

Sequential Logic 8

AnalysisofSequentialCircuits

•  StateTable:–  Thetimesequenceofinputs,outputsandffscanbeshowninastatetable

PresentState

Input NextState

Output

A B x A B y0 0 0 0 0 0

0 0 1 0 1 0

0 1 0 0 0 1

0 1 1 1 1 0

1 0 0 0 0 1

1 0 1 1 0 0

1 1 0 0 0 1

1 1 1 1 0 0

A(t+1)=A(t)x(t)+B(t)x(t)B(t+!)=A’(t)x(t)

y=x’[A(t)+B(t)]

Dr. Panos Nasiopoulos

Sequential Logic 9

AnalysisofSequentialCircuits

•  StateTable:

–  Anotherformofstatetableisthefollowing:

PresentState Input NextState Output

A B x A B y

0 0 0 0 0 0

0 0 1 0 1 0

0 1 0 0 0 1

0 1 1 1 1 0

1 0 0 0 0 1

1 0 1 1 0 0

1 1 0 0 0 1

1 1 1 1 0 0

PresentState

NextState Output

x=0 x=1 x=0 x=1

AB AB AB y y

00 00 01 0 0

01 00 11 1 0

10 00 10 1 0

11 00 10 1 0

Dr. Panos Nasiopoulos

Sequential Logic 10

StateDiagram•  Statediagramrepresentsgraphicallytheinformationinastatetable–  State:shownbyacircle–  Transitionsbetweenstates:linesconnectingcircles–  Binary#insidecircleindicatesstateoftheff–  Input/output:#/#closetotransitionlines

PresentState

NextState Output

x=0 x=1 x=0 x=1

AB AB AB y y

00 00 01 0 0

01 00 11 1 0

10 00 10 1 0

11 00 10 1 0

Dr. Panos Nasiopoulos

Sequential Logic 11

AnalysiswithJKandTflip-flops•  RecalltheJKflip-flopdesignbasedonaDflip-flop:

•  ThestateequationattheinputoftheDflip-flopis:–  DA=

•  ForaTflip-flop:

•  ThestateequationattheinputoftheDflip-flopis:–  DA=

Dr. Panos Nasiopoulos

Sequential Logic 12

AnalysiswithJKflip-flops•  Example:Analyzethefollowingsequentialcircuit:

•  JA=BKA=Bx’•  JB=x’KB=A’x+Ax’

PresentState Input NextState F-Finputs

A B x A B JAKA JBKB

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

1 1 1

1) First find inputs to ff

2) Then next state

Dr. Panos Nasiopoulos

Sequential Logic 13

AnalysiswithJKflip-flops•  Example:Analyzethefollowingsequentialcircuit:

•  JA=KA=•  JB=KB=

•  Truthtablewithstatestates:(wedonotneedtoknowtheffinputvaluessincewecancalculatethenextstatedirectlyfromthestateequations)

•  Then:A(t+1)=JA’+K’A=BA’+(Bx’)’A=B(t+1)=x’B’+(A’x+Ax’)’B=

Dr. Panos Nasiopoulos

Sequential Logic 14

DesignProcedure•  STEPS:

–  1st-derivethestatediagram–  2nd-assignbinaryvaluestothestates–  3rd-derivestatetable–  4th-choosetypeofflip-flops–  5th–deriveequationsfortheffinputsandtheoutput–  6th–drawthelogicdiagram

•  Q:Howmanyflip-flopsareneeded?•  A:thenumberisdeterminedbythe#ofstates.

EXAMPLE:Designacircuitthatdetects3ormoreconsecutive1’sinabinarystring.

Dr. Panos Nasiopoulos

Sequential Logic 15

DesignProcedure

•  DesignthecircuitusingDflip-flops.–  Inputsfortheflip-flopsarethesameasthenextstate

•  UseK-mapstosimplifythetwoinputstoflip-flopsDAandDBandoutputy.

PresentState

Input NextState

Output

A B x A B y0 0 0 0 0 0

0 0 1 0 1 0

0 1 0 0 0 0

0 1 1 1 0 0

1 0 0 0 0 0

1 0 1 1 1 0

1 1 0 0 0 1

1 1 1 1 1 1

Dr. Panos Nasiopoulos

Sequential Logic 16

DesignProcedure

Dr. Panos Nasiopoulos

Sequential Logic 17

•  DesignusingJKflip-flops–  ExcitationtableforJK

–  ThestatetableshouldalsoincludetheinputstoJKflip-flopswhichgeneratethedesiredtransitionsequence.

Example:Assumethefollowingstatetable

Q Q(t+1) J K0 0 0 X

0 1 1 X

1 0 X 1

1 1 X 0

PresentState

Input NextState FFinputs

A B x A B JA KA JA KA0 0 0 0 0

0 0 1 0 1

0 1 0 1 0

0 1 1 0 1

1 0 0 1 0

1 0 1 1 1

1 1 0 1 1

1 1 1 0 0

Dr. Panos Nasiopoulos

Sequential Logic 18

•  SimplifytheinputsusingK-maps

PresentState

Input NextState FFinputs

A B x A B JA KA JA KA0 0 0 0 0 0 X 0 X

0 0 1 0 1 0 X 1 X

0 1 0 1 0 1 X X 1

0 1 1 0 1 0 X X 0

1 0 0 1 0 X 0 0 X

1 0 1 1 1 X 0 1 X

1 1 0 1 1 X 0 X 0

1 1 1 0 0 X 1 X 1

Dr. Panos Nasiopoulos

Sequential Logic 19

•  DesignthecircuitusingJKflip-flops–  Equations:

•  JA=Bx’•  KA=Bx•  JA=x•  KB=Ax+A’x’

Dr. Panos Nasiopoulos

Sequential Logic 20

DesignofCounters

•  Asequentialcircuitthatgoesthroughadefinedsequenceofstateswhentheinput(count)pulsesareappliediscalledacounter–  Countnumberofoccurrencesofanevent.–  Usefulingeneratingtimingsequencestocontrolotheroperationsinadigitalsystem.

•  Example:Designacounterthatcountsfrom0to7andreturnsto0after7.

Statediagram

–  Noinputsoroutputs–  Transitionsoccurduringaclockedge(0to1)–  Nextstatedependsentirelyonthepresentstate

Dr. Panos Nasiopoulos

Sequential Logic 21

DesignofCounters

•  Statetable(forTflip-flops)

•  SimplifytheinputsusingK-maps

PresentState NextState FFinputsA2 A1 A0 A2 A1 A0 TA2 TA1 TA00 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

1 1 1

Dr. Panos Nasiopoulos

Sequential Logic 22

DesignofCounters–Logicdiagram

hkjh

Dr. Panos Nasiopoulos

Sequential Logic 23

StateReduction

•  Objective:–  toreducethenumberofflip-flops–  Effect:thisprocessmayincreasethenumberofgatesrequiredtoimplementthecircuit

•  EXAMPLE

•  Notethatonlyinput-outputsequencesareimportant(internalstatesareusedjusttoprovidetherequiredsequences)

•  Forthisreason,statesaremarkedwithletters•  Thereareaninfinitenumberofinputsequences.Eachresultsinauniqueoutput

Dr. Panos Nasiopoulos

Sequential Logic 24

StateReduction

•  Considerthefollowinginput:

Startingwiththestatea,let’sdeterminethestatetransitionsandoutput

•  Toreducethestatesweneedtocompletethestatetable

Input 0 1 0 1 0 1 1 0 1 0 0

state a a b c d e f f g f g a

Input 0 1 0 1 0 1 1 0 1 0 0

Output 0 0 0 0 0 1 1 0 1 0 0

PresentState

NextState Output

x=0 x=1 x=0 x=1

a a b 0 0

b c d 0 0

c a d 0 0

d c f 0 1

e a f 0 1

f g f 0 1

g a f 0 1

Dr. Panos Nasiopoulos

Sequential Logic 25

StateReduction

•  Equivalentstates:forallinputcombinationstheygivethesameoutputandsendthecircuittothesamestate

•  Statesgandeareequivalent–  Sogisreplacedbye

PresentState

NextState Output

x=0 x=1 x=0 x=1

a a b 0 0

b c d 0 0

c a d 0 0

d c f 0 1

e a f 0 1

f g f 0 1

g a f 0 1

PresentState

NextState Output

x=0 x=1 x=0 x=1

a a b 0 0

b c d 0 0

c a d 0 0

d c f 0 1

e a f 0 1

f e f 0 1

Dr. Panos Nasiopoulos

Sequential Logic 26

StateReduction

•  Weobservethatdisequivalenttof;fisremoved

•  Statediagramfornewstatetable:

•  Let’sapplythesameinputsequence:

state a

Input 0 1 0 1 0 1 1 0 1 0 0

Output 0

PresentState

NextState Output

x=0 x=1 x=0 x=1

a a b 0 0

b c d 0 0

c a d 0 0

d c d 0 1

e a d 0 1


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