116

CHAPTER 6

IMPLEMENTATION OF RANDOM CARRIER PWM FOR

THREE-PHASE VSI DRIVE

6.1 INTRODUCTION

Many PWM schemes have been developed and implemented

successfully for various power electronic applications. However, for the high

frequency applications, the harmonic power is highly produced due to the

high switching frequency of the power converter. These high switching

frequency harmonics can have adverse effects, such as acoustic noise,

mechanical vibration and electromagnetic interference. In recent years, PWM-

inverter fed induction motor has been widely applied as motor drives in

industries. The main problem associated with inverter-fed ac drives is the

acoustic noise. The two major causes of the acoustic noise problems are the

motor structure design and the pulse-width modulation (PWM) schemes

employed by the inverters. Standard PWM schemes cause the power inverter

to switch in a “deterministic” manner, which results in a PWM waveform

with a large fundamental voltage component with low-order harmonics

suppressed. However, the harmonic power is usually concentrated at a few

predictable frequencies. Depending on their frequencies, these switching

harmonics of significant magnitude can cause acoustic noise, radio

interference, and mechanical vibration. The PWM scheme based on the use

of “nondeterministic” random number generation has been developed to

generate Random PWM (RPWM) waveforms for dc–ac power conversion

117

applications. This RPWM approach is suitable for many applications such as

industrial motor drives and electric vehicles in which interference with

neighboring equipment and environment should be minimized.

6.2 THREE PHASE VSI

Single-phase VSIs cover low-range power applications; meanwhile

the three-phase VSIs cover the medium- to high-power applications. The

main purpose of the topology is to provide a three-phase voltage source,

where the amplitude, phase, and frequency of the voltages should always be

controllable. Although most of the applications (e.g., ASD, UPS, FACTS,

VAR compensators) require sinusoidal voltage waveforms, arbitrary voltages

are also required in some emerging applications (e.g., active filters, voltage

compensators).

The standard three-phase VSI topology is shown in Fig. 6.1 and the

eight valid switch states are given in Table 6.1. As in single-phase VSIs, the

switches of any leg of the inverter (S1 and S4, S3 and S6, or S5 and S2)

cannot be switched on simultaneously because this would result in a short

circuit across the dc link voltage supply. Similarly, in order to avoid

undefined states in the VSI, and thus undefined ac output line voltages, the

switches of any leg of the inverter cannot be switched off simultaneously as

this will result in voltages that will depend upon the respective line current

polarity. Of the eight valid states, two of them (7 and 8 in Table 6.1) produce

zero ac line voltages. In this case, the ac line currents freewheel through either

the upper or lower components. The remaining states (1 to 6 in Table 6.1)

produce non-zero ac output voltages. In order to generate a given voltage

waveform, the inverter moves from one state to another. Thus the resulting ac

output line voltages consist of discrete values of voltages that are Vi, 0, and

-Vi. The selection of the states in order to generate the given waveform is

118

done by the modulating technique that should ensure the use of only the valid

states.

Figure 6.1Three Phase Full Bridge Voltage Source Inverter

Table 6.1 Switching nature of three phase Full Bridge VSI

State Switch Status Output Voltage (Vab)

1 S1, S2, S6 are ON and S4, S5, S3 are OFF v

2 S2, S3, S1 are ON and S5, S6, S4 are OFF 0

3 S3, S4, S2 are ON and S6, S1, S5 are OFF -v

4 S4, S5, S3 are ON and S1, S2, S6 are OFF -v

5 S5, S6, S4 are ON and S2, S3, S1 are OFF 0

6 S6, S1, S5 are ON and S3, S4, S2 are OFF v

7 S1, S3, S5 are ON and S4, S6, S2 are OFF 0

8 S4, S6, S2 are ON and S1, S3, S5 are OFF 0

+-

Vi +Vab

-

C+Vi / 2

C-Vi / 2

N

S3

S6

b

S1

S4

a

c

S5

S2

119

6.3 RANDOM PWM (RPWM) TECHNIQUE

Random PWM (RPWM) technique has been introduced by A.M

Trzynadlowski, R.L kirlin and S.Legoski in the year 1987. The standard

RPWM signal generation is shown in Fig. 6.2. The fundamental difference

between classic PWM and RPWM method is, that the power carried by the

PWM signal is no longer limited to a few leading frequency that are normally

controlled by the switching frequency and the modulated signal. As pointed

out by Andrzej (1994), Random pulse width modulation (RPWM) techniques

for voltage-controlled power electronic converters have been attracting an

increasing interest due to the unique effects of these techniques on the

converter-supplied drive systems.

Figure 6.2 Standard Random PWM signal generation

Kirlin (1994) developed a randomized pulse position method in

which, the discrete harmonics are significantly reduced and the harmonic

power is spread over as continuous spectrum. Michael (2000) proposed a new

family of random modulation techniques for three-phase power converters

Comparator

Random PWM

Signal

Random

Number

Generator

Reference

Waveform

120

which operate with a fixed switching frequency. The techniques are based on

adjusting the duration of the zero-vectors or adjusting the three pulse

positions in a switching period. Due to the reduction of discrete harmonics,

the dc/ac randomized switching methods have been shown to have obvious

advantages of acoustic noise reduction and mechanical vibration reduction in

electrical drive systems as pointed out by Zhou (2008).

The acoustic noise creates unpleasant atmosphere to work and the

mechanical vibration causes gap separation between the stator and rotor. The

best way to reduce the audible switching noise radiated from the induction

motor is to increase the PWM switching frequency up to 18 kHz. Such a

method can solve the noise problem but increases the switching loss of the

inverter. Blasko (2000) presented a new hybrid random pulse width

modulator which reduces the noise in industrial drives. The discrete harmonic

spectra occur at switching frequency and its multiples. Generally for human

listeners, the 1-10 KHz range is the region of the greatest annoyance.

Unfortunately, this range may coincide with the switching frequency of the

power electronics converters. Hence the acoustic noise below 10 KHz

frequency radiated from the induction motor should be reduced.

6.3.1 Basic RPWM Strategies

The following are the three basic concepts utilized in the existing

RPWM strategies:

(i) Randomized Switching Frequency

Randomization of the switching frequency has been, thus far, the

most common means of RPWM. It can be performed in either the

regular or natural sampling mode. The regular sampling mode is

characterized by an integer number, N, of switching intervals per

121

cycle of the output frequency and an integer number, Ns, of

switching intervals used for each 60° sub-cycle. Either N or Ns, can

be randomly changed from cycle to cycle or from sub-cycle to sub-

cycle, respectively. The natural sampling mode is obtained by using

either the classic triangulation method or the space vector PWM.

Habetler (1991) developed a randomly modulated carrier where a

triangular carrier signal is generated with a randomly varying slope,

which is compared with a reference voltage signal. Hui and

Sathiakumar (1997) have been developed a new RPWM scheme,

which includes a weighted decision switching process. This

switching strategy has been applied to the entire range of

modulation index.

(ii) Randomized Pulse Position

In this method, the pulses of switching signals are randomly placed

in individual switching intervals. The simplest approach consists in

a random selection of only two possible positions, namely at the

beginning or at the end of the interval (lead-lag RPWM).

(iii) Random Switching

In this technique, the randomly generated fractional numbers

having uniform probability distribution are compared with the

desired duty ratios. Lynn (2002) pointed out that, the random-

switching PWM technique is very simple since no precise timing of

the switching signals is required. Therefore, it is particularly

suitable for converters in which high quality of the output current is

obtained by means of high switching frequency, such as low-power

inverters based on power MOSFETs.

122

An ideal RPWM technique would results in power spectra of the

inverter voltage containing a fixed frequency harmonic and a continuous

noise spectral which is totally free of higher harmonics over the entire

frequency range. In practical such ideal spectrum is not possible because of

the technical limitations imposed on the feasible switching patterns. Hence, a

new Random Carrier PWM technique has been developed.

6.4 RANDOM CARRIER PWM TECHNIQUE

The Random Carrier PWM technique is basically similar to

conventional SPWM, while it uses two different triangular carriers. One is of

require frequency and the other is 180 degree phase shifted of it. The selection

of the carrier among these carriers is done by a random bit generated. That is,

if ‘1’ is the output carrier 1 (basic) is selected else carrier 2 (1800 shifted). The

selection is done for ever carrier cycle and the selected carrier is compared

with the reference sinusoidal waveform. The Pseudo random carrier

modulation scheme is most commonly used for the random triangular

frequency generation. Here, the random triangular frequency is achieved in

the range of 3 KHz. A simple concept of randomly modulated carrier PWM

is illustrated in the Figure 6.3.

Figure 6.3 Random Carrier PWM Signal Generation

Comparator

Random

PWM Signal

Reference

Waveform

Pseudo Random

Triangular

Carrier

123

Young-Cheol (2010) presented a pseudorandom carrier modulation

scheme and its harmonic spectra spread effect. The pseudo random carrier of

this scheme are generated through the random mixture of the two triangular

carriers, each of the same fixed frequency, but of opposite phase. The random

choice of the two triangular carriers is decided by “0” or “1” states of the

Pseudo Random Binary Sequence (PRBS) random bits. The PRBS random

bits are selected using the Multiplexer and produced the resultant

pseudorandom frequency carrier waveform.

6.5 DIGITAL IMPLEMENTATION OF RPWM SCHEMES:

REVIEW

Most of the RPWM schemes for DC-AC power converters usually

work well with high-sampling frequency. The digital implementation of this

scheme has a significant effect on sampling frequencies and it is limited by

the speed of processors used. Various RPWM schemes have been

implemented digitally using microcontrollers, DSPs and FPGAs. Shrivastava

et al (1999) analyzed the noise spectrum of various DSP-implemented RPWM

techniques using a statistical approach. The relationship of the noise

components and the sampling frequency for both the standard RPWM and the

weighted RPWM methods has been generalized. The dependency of the noise

characteristics on various factors is calculated theoretically and verified

experimentally. Hoe-Geun et al (2002) developed a triangular carrier

frequency modulated RPWM inverter for industrial drives. The real-time

RPWM along with the speed control has been achieved by high speed DSP

TMS320C31. Minh-Khai et al (2009) implemented a new random switching

strategy using DSP TMS320F2812 to decrease the harmonics spectra of

single phase switched reluctance motor which combines the random turn-on,

turn-off angle technique and random pulse width modulation technique. Here,

the Harmonic Spread Factor (HSF) has been used to evaluate the random

124

modulation scheme. Massimiliano et al (2010) have been proposed a RPWM

scheme for the control of output voltage of buck DC-DC converter. The

designed controller has been implemented in a Altera Cyclone III FPGA

board.

6.6 PERFORMANCE EVALUATION OF RANDOM CARRIER

PWM

The three-phase VSI with random carrier PWM has been simulated

using MATLAB 7.10 software with the input dc voltage (Vdc) of 400V. The

carrier is generated from a triangular wave of 3 kHz and it is 180° phase

shifted (3 kHz). The load is 3 kW three-phase Squirrel Cage Induction Motor.

The Simulink model for this set-up is shown in Fig. 6.4. The representative

line voltages, line currents and output voltage harmonic spectrum are depicted

in Fig. 6.5, Fig. 6.6 and Fig. 6.7 respectively for the modulation index of 0.8.

Table 6.2 shows the simulation results of Fundamental Voltage, THD and

Harmonic Spread Factor (HSF) for various modulation indexes.

Figure 6.4 Simulink Model for Random carrier PWM

125

Figure 6.5 Simulated line-line voltage waveform for Ma=0.8

Figure 6.6 Simulated line-line current waveform for Ma=0.8

126

Figure 6.7 Harmonic Spectrum

Table 6.2 Simulation Result for Various Modulation Indexes

Modulation index

Fundamental

(V)

Total Harmonic Distortion

(THD) (%)

Harmonic Spread Factor

(HSF)

0.2 38.86 249.57 2.96049

0.3 57.39 195.39 3.511212

0.4 75.87 163.22 3.989407

0.5 94.17 140.26 4.273567

0.6 111 123.49 4.404382

0.7 133.2 104.4 4.391472

0.8 150.4 92.5 4.358245

0.9 169.4 80.13 4.198221

1 190.2 68.43 4.015655

1.1 200.7 62.88 3.993345

127

6.7 PROPOSED RANDOM CARRIER PWM ARCHITECTURE

A digital architecture has been developed for implementing the

proposed Random Carrier PWM technique as illustrated in Fig. 6.8. An 8-bit

Linear Feedback Shift Registers (LFSR) based Pseudo Random Binary

Sequence (PRBS) generator is used as a select input. Choice of triangle called

winning triangle depends up on the output of the random bit generator. The

pulse generation block compares the references with the randomized carrier

and generates pulses for the six switches of VSI. The algorithmic steps

involved in generating the random bit are explained in the Figure 6.9.

Figure 6.8 Architecture of Random Carrier PWM Generator

128

Figure 6.9 Parallel Computational Flow for the Generation of Random bit

129

6.8 SIMULATION AND SYNTHESIS

The proposed Random Carrier PWM architecture has been

designed using the VHDL language as in appendix A2.4 The functional

simulation of the architecture has been carried out using the tool Modelsim

6.3. The Register Transfer Level (RTL) level verification and implementation

are done using the synthesize tool Xilinx ISE 13.2. Then the designed

architecture has been configured to the SPARTAN-6 FPGA (XC6SLX45)

device.

6.8.1 Functional Simulation

The functionality of each block in the architecture has been

simulated thoroughly using the Modelsim software. The corresponding

simulation outputs are shown in Figure 6.10, Figure 6.11 and Figure 6.12.

Figure 6.10 Simulation output for Random bit generation and Triangle selection based on random output

130

Figure 6.11 Reference Sine wave generation

Figure 6.12 Random Carrier PWM Outputs

131

6.8.2 Synthesis and Implementation

The simulated VHDL Design of the RCPWM architecture has been

synthesized using Xilinx ISE software. The RTL verification and logic

implementation of the design are carried out here. The corresponding

synthesis results are shown in Figure 6.13 and Figure 6.14.

Figure 6.13 RTL Schematic View of the RCPWM Design

Figure 6.14 Device Utilization for the RCPWM Design

132

6.8.3 Power Analysis

The power estimation for the designed architecture has been done

using the Xilinx power estimator tool (Xpower Estimator (XPE)-14.1). The

power estimation report for the RCPWM design has been generated as shown

in Figure 6.15 and the temperature dependency of the On-Chip power also

analysed as illustrated in Figure 6.16.

Figure 6.15 Power estimation report

Figure 6.16 Dependency of power on Temperature

133

6.9 HARWARE IMPLEMENTATION AND RESULTS

The synthesized design of RCPWM architecture has been

downloaded to the FPGA Spartan 6 device (XC6SLX45). The configured

FPGA device with proposed architecture has been tested with a prototype of

three phase VSI with an input dc voltage (Vdc) of 400V and a load of 0.75

kW three-phase Squirrel Cage Induction Motor. The experimental setup is

shown in Figure 6.17. The FPGA generated RCPWM pulses are shown in

Figure 6.18. The output line to line voltage and current is shown in Figure

6.19 and the harmonic spectrum is shown in Figure 6.20

Figure 6.17 Experimental Set up

134

.

Figure 6.18 FPGA Generated pulses at Ma=0.8 for Upper devices of VSI

Figure 6.19 Output line voltage and current waveform at Ma=0.8

135

Figure 6.20 Output Harmonic spectrum

6.10 SUMMARY

Pulse width modulation has nowadays become an integral part of

every adjustable speed drives (ASDs). Random PWM is widely used to

spread the harmonic power and hence reduce the acoustic noises of the ASDs.

The proposed architecture of RCPWM will be the effective solution for the

acoustic noise in the Adjustable Speed Drives. The results such as device

utilization summary, power estimation and temperature dependency are very

useful for the handling of digital device used for the control purpose. The

harmonic power spreading ability of the RPWM is validated by the simulation

study while the accurate imitation of the RPWM in FPGA platform has been

confirmed by the hardware results.