Coping w Poor Dynamic Performance of Super-Junction MOSFET Body Diodes.pdf

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IEEJ Journal of Industry ApplicationsVol.2 No.4 pp.183–188 DOI: 10.1541 / ieejjia.2.183

Paper

Coping with Poor Dynamic Performance of Super-Junction MOSFET

Body Diodes

Martin Pavlovsky∗a)

Non-member, Giuseppe Guidi∗

Non-member

Atsuo Kawamura∗

Senior Member

(Manuscript received Dec. 18, 2012, revised March 23, 2013)

Poor dynamic performance of body diodes in Super Junction MOSFETs may cause difficulties when utilised in high

frequency conversion circuits. Excessive reverse recovery as well as forward recovery may in the best case result in

high conversion losses and EMI pollution where as in the worst case they may completely disrupt the converter oper-

ation. In this paper, using an auxiliary snubber circuit to control the reverse recovery and connecting a fast diode in

parallel to a super junction switch to reduce the forward recovery is proposed. As documented by numerous experi-

mental results, both proposed concepts work well and both recoveries may be largely avoided. Implementation of the

proposed concepts in a forward boost, reverse buck circuit resulted in efficiencies close to 98.5% in 3–12.5 kW load

range while operating at 62.5 kHz.

Keywords: superjunction MOSFET, body diode, reverse recovery, forward recovery, soft switching

1. Introduction

Design of power converters strives for the best possible ef-

ficiency through minimisation of conduction and switching

losses. Since their invention, conventional MOSFETs off er

unbeatable switching speeds as well as low on-state resis-

tance ( R DS on) and therefore they became the primary choice

in low voltage applications. Introduction of so-called Super-

Junction (SJ) MOSFET extended the use of MOSFET tech-

nology to voltage levels up to hundreds of volts where previ-

ously IGBTs were used almost exclusively (1). In many such

applications, superior dynamic performance of SJ-MOSFETs

and low R DS on are much appreciated and SJ-MOSFETs al-

most completely pushed out IGBTs.

In spite of numerous advantages of SJ-MOSFETs com-

pared to IGBTs, they have also a drawback in form of an

inherent body diode. This diode is present in the internal

MOSFET structure and therefore it can not be explicitly re-

moved. Due to their primary application, SJ-MOSFETs areoften optimised for the lowest possible R DS on. This leads to

a poor dynamic performance of the body diode (2). Excessive

reverse and forward recovery limit the use of SJ-MOSFETs

to applications where the diode is not an active part of a cir-

cuit. In applications where the diode must perform current

switching functions, special measures must be taken. Exam-

ples of such measures and their consequences are:

- optimisation of SJ-MOSFET structure for better body

diode performance (3) ⇒ increase of R DS on and hence

higher conduction losses.

- slowing down the MOSFET switching process through

a) Correspondence to: Martin Pavlovsky. E-mail: [email protected]

∗ Yokohama National University79-5, Tokiwadai, Hodogaya-ku, Yokohama 240-8501, Japan

suitable gate control (4) ⇒ increase of switching losses

due to slowing down the switching speed.

- using a faster discrete diode instead of the body diode (5)

⇒ increase of conduction losses due to the necessity of

additional series blocking diode.

This paper discusses an approach which deals with the

poor dynamic performance of SJ-MOSFET body diode with-

out increasing or even reducing the losses in the main power

circuit. The reverse recovery is dealt with by using syn-

chronous rectification as proposed in (6) for hard switched

converters and by using an auxiliary switching circuit that re-

duces the di / dt during the recovery of the main body diode (7).

In order to deal with the poor forward recovery, a fast discrete

diodes are connected directly in parallel to SJ-MOSFETs.

2. Dc-Dc Converter with Controlled Reverse Re-covery

The dc-dc converter with controlled reverse recovery is

based on a conventional capacitive turn-off snubber. The op-eration of the snubber is similar to Auxiliary Resonant Com-

mutated Pole (ARCP) introduced in (8) to soft switched in-

verters. The advantage of this snubber is that it off ers soft

switching without a significant increase of stress on main

power devices unlike some other topologies, for example (9).

In this snubber, a capacitor is connected in parallel to the

active switch in order to slow down the voltage rise across

the main switch during turn-off hence reducing the turn-off

losses. The energy stored in the snubber capacitor during the

turn-off process is recuperated in a resonant fashion before

the turn-on of the main switch in order to prevent excessive

losses.

Circuit diagram of the buck / boost dc-dc converter with

controlled reverse recovery is shown in Fig. 1 as proposed

in (7). The circuit consists of main switches S m1 and

c 2013 The Institute of Electrical Engineers of Japan. 183



Coping with Poor Performance of SJ MOSFET Body DiodesMartin Pavlovsky et al.

Fig. 1. Circuit diagram of forward boost reverse buck dc-dc circuit used to explore the reverse recovery controlprinciple

S m2, snubber capacitors C s1 and C s2, bi-directional auxiliary

switch comprised of S a1 and S a2 and the auxiliary inductor

La, main inductor Lm and filter capacitors C f 1 and C f 2. Fol-

lowing discussions concern only intervals relevant to the re-

verse recovery control. Please, refer to reference (7) for de-

tailed explanation of the circuit operation.

2.1 Reverse Recovery Control Through di / dt Reduc-

tion The reverse recovery control through di / dt is dis-

cussed below. Implementations in forward boost respectively

reverse buck mode are very similar and therefore they are dis-

cussed together. Relevant current flow through the circuit and

relevant waveforms are shown for both modes in Fig. 2 and

Fig. 3 respectively.

The reverse recovery mode is initiated by turn-on of the

relevant auxiliary switch (S a2 in case of forward boost opera-

tion respectively S a1 in case of reverse buck operation). The

action of turning on the auxiliary switch results in the main

inductor current commutation from the rectifying diode (S m2

in case of forward boost mode respectively S m1 in case of re-verse buck operation) to the auxiliary circuit (S a1 and S a2)

during the time interval t 0 to t 1. In case if synchronous recti-

fication is used, the synchronous rectifier switch (S m2 in case

of forward boost mode respectively S m1 in case of reverse

buck operation) may be turned-off in the relevant instant af-

ter the turn-on of the auxiliary switch as indicated in Fig. 3.

At the end of this commutation interval in the instant t 1, the

reverse recovery occurs. The di / dt of the current commuta-

tion which forces the reverse recovery can be calculated as

follows:

- Forward boost operation

di / dt = (V 2 − V 1) / La · · · · · · · · · · · · · · · · · · · · · · · · (1)

- Reverse buck operation

di / dt = V 1/ La · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · (2)

The same di / dt in a hard switched circuit without the recov-

ery control in the forward boost as well as in the reverse buck

mode would be equal to:

di / dt = V 2/ Lstray · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · · (3)

where L stray is the stray inductance of the commutation loop

consisting of S m1, S m2 and C f 2. Comparing the hard switched

and soft switched case, it can be seen that the inductance La

which is primarily used to control the charge / discharge of the

snubber capacitors C s1 and C s2 as discussed in (7) can be ef-

fectively used to control the di / dt prior to the reverse recov-

ery. In the same time, the voltage which forces the di / dt is

a) fo rwa rd b oo st mo de b ) reve rse buc k mo de

Fig. 2. Current flow prior to reverse recovery

a) forward boost mode b) reverse buck mode

Fig. 3. Waveforms relevant to reverse recoveryexplanation

considerably reduced in case of the soft switched approach

(V 2 − V

1 respectively V

1 in case of soft switching versus V

2in case of hard switching). The conclusion drawn from this

simple analysis is that the snubber as shown in Fig. 1. is very

eff ective in controlling the di / dt leading to reverse recovery.

Since the di / dt leading to the reverse recovery is very impor-

tant to the severity of the reverse recovery itself, reducing the

di / dt may be considered the first step towards reducing the

reverse recovery problem.

2.2 Reverse Recovery Control Through Synchronous

Rectification Synchronous rectification (SR) is a com-

mon practice in converters based on low voltage MOSFETs.

The principle is based on turning on the MOSFET while the

body diode conducts. Very low R DS on in low voltage MOS-

FETs leads to current shifting from the MOSFET body diodeinto the MOSFET channel. The consequence of such oper-

ation is reduction of conduction as well as reverse recovery

losses.

The SR operation was until recently restricted to low volt-

age MOSFETs. In case of high voltage MOSFETs, the R DS on

was not low enough to support SR in a usable current range.

Introduction of SJ-MOSFETs and their subsequent improve-

ment yielded in R DS on which makes the SR viable in applica-

tions up to several hundreds of volts.

Using SR in hard switched circuits is explored in (6). The

study shows 60% loss reduction in each SJ-MOSFET where

SR was implemented. The limitation of SR in hard switched

circuits is a requirement of precise timing of gate pulses. The

dead-time between the top and bottom switch of a phase arm

must be as low as 30 ns. In case of longer dead times, the

184 IEEJ Journal IA, Vol.2, No.4, 2013




Fig. 4. Illustration of variable SR timing in case of for-ward boost operation

current shifts back to the body diode and reverse recovery

occurs. On the other hand, using a dead time which is tooshort may result in a shoot through current which may con-

siderably increase the losses in the best case and damage the

phase arm in the worst case.

SR may also be applied to soft switched circuits as shown

in (10). The presented soft switched inverter employs an aux-

iliary snubber for Zero-Voltage-Switching (ZVS) at the main

switch turn-off . In addition to that, the snubber is very ef-

fective in controlling the reverse recovery of the body diode.

Both these eff ects resulted in 97.5% efficiency of the experi-

mental inverter.

Snubber based on the same principle as the one discussed

in (10) was also implemented in a dc-dc chopper discussed

in (11). In this case, the SR was not implemented because the

diode reverse recovery was used to enlarge the soft switching

region. However, the consequence of this approach is loss in-

crease in the auxiliary circuit and the rectifying diode which

results in reduced maximum efficiency.

The dc-dc converter circuit shown in Fig. 1. uses the same

snubber as discussed in (11). In this case, SR is implemented

in order to minimise the reverse recovery and hence reach the

maximum possible efficiency.

As concluded in (6) and (10), timing of SR switch is very

critical for active suppression of reverse recovery. The timing

of SR may vary as indicated in Fig. 4. As shown, the timing

can be adjusted with respect to the auxiliary switch turn-on(t d 1) or with respect to the main switch turn-on (t d 2). The

calculation of the SR delay time t d 1 is rather easy since the

current di / dt remains constant. The relevant equation can be

easily derived from (1) and the result is:

t d 1 = I o ff La/(V 2 − V 1)· · · · · · · · · · · · · · · · · · · · · · · · · · · · (4)

where I o f f is the current of SR switch S m2 in the moment of

turn-on of the auxiliary switch S a1. It should be noted that

the sensitivity of the circuit to stray inductance is very lim-

ited since the auxiliary inductance La dominates the auxiliary

path.

pSpice simulation employing real device models was per-

formed to assess the test circuit sensitivity to SR timing. The

simulated waveforms for various timings are shown in Fig. 5.

The timings are indicated with respect to the SR zero current

(a) turn-off 200ns bef or e ZCC ( b) turn-off 100 ns before ZCC

(c) turn-off at ZCC (d) turn-off 100ns after ZCC

Fig. 5. Simulated waveforms for various timings of synchronous rectifier turn-off ; orange— current throughsynchronous rectifier, purple— current through auxiliaryswitch, red current of main switch, current scale 10 A / div,time scale 20 ns / div

Fig. 6. Reverse recovery waveforms for V 1 = 200 V,V 2 = 400 V, Po = 3 − 12.5 kW; CH1 — voltagedrain source of S m1 100V / div, CH3 — 1 / 2 currentS m2 10 A / div, CH4— current S a2 20 A / div, time scale0.2 µs / div

crossing (ZCC). Fig. 5 part (a) depicts the case where the re-

verse recovery suppression is “disabled” by a premature turn-

off of the SR switch; the current has enough time to commu-

tate from the channel to the diode and recovery occurs as de-

picted by the waveforms. Turning the SR off closer to ZCC

(Fig. 5 part (b)) reduces the reverse recovery current to a nearzero value. Further shift of the turn-off has only a marginal

impact on the reverse recovery until the point where ZCC oc-

curs (Fig. 5 part (c)). Keeping the SR switch on past the ZCC

introduces a so-called extended reverse conduction shown in

Fig. 5 part (d). Conclusion made from the simulation is that

from the reverse recovery point of view, it is better to turn

the SR off slightly before the ZCC than after. Turning it off

100 ns before the ZCC increases the peak of auxiliary current

by less than 5% (increase from 115 A to 120 A) as shown in

Fig. 5 part (c). However, turning it off 100 ns after the ZCC

increases the peak current by more than 20% (increase from

115 A to 140A).

2.3 Experimental Results of Reverse Recovery Con-trol A set of experimental measurements was performed

to verify the reverse recovery approach discussed above. The





measured waveforms of the auxiliary and SR switch current

as well as the main switch voltage are shown in Fig. 6. The

waveforms were measured on a test converter identical to

the circuit shown in Fig. 1. Main switches S m1 and S m2 are

made of parallel connected SJ-MOSFETs STY112N65M5 (12)

where as the auxiliary switches S a1 and S a2 are single

IRG4PSC71UD IGBTs(13)

. The experiments were performedat turn-off current increasing from 2 A to 26 A. The peak re-

verse recovery current as well as the reverse recovery time

remain almost constant. It can be also seen that the di / dt lead-

ing to the reverse recovery is 62.5 A / µs which is very low

compared to a conventional hard switched circuit. Reverse

recovery charge Qrr estimated from the measured waveforms

equals to approximately 1.3 µC which is very low for the SJ

MOSFET with ultra low R DS on. The conclusion based on the

experimental results is that the proposed method of reverse

recovery control works very well and the reverse recovery is

considerably reduced with constant t d 2 of 200 ns which made

t d 1 varying with load current exactly as expected.

3. Forward Recovery

In recent time, forward recovery in diodes with blocking

voltage of several hundred volts did not pose major prob-

lems. However in case of body diodes of SJ-MOSFETs, in

addition to poor reverse recovery, they also exhibit a rather

poor forward recovery. This may cause excessive ringing

at diode turn-on and hence possible EMI issues. Such be-

haviour was observed while conducting experiments using

the STY112N65M5 SJ-MOSFETs (12) in the circuit shown in

Fig. 1. The forward recovery of S m2 diode without SR be-

ing active is shown in Fig. 8 part (a). As shown, the current

commutation from the snubber capacitors to the body diode

results in a considerable ringing of diode current at the fre-

quency of 16.66 MHz with the current peak of 180% of the

steady state value.

3.1 Forward Recovery Control by Synchronous Rec-

tifier As discussed above, circuit shown in Fig. 1. can

control body diode reverse recovery by Synchronous rectifi-

cation. The turn-on timing of SR switch has no impact on

the diode reverse recovery as long as the switch is turned on

considerably before the reverse recovery event. However, the

timing of SR switch turn-on may have an impact on the for-

ward recovery if the MOSFET is turned on in the moment

when the current starts its commutation from the snubber ca-

pacitors to the diode. This case is presented in Fig. 8 part (b)where the SR switch turns on when the voltage of S m1 switch

reaches the level of the output voltage V o. The impact of

such operation is clear when compared to Fig. 8 part (a). As

shown, the current peak is reduced to approximately 120%.

The disadvantage of this operation is that variable and rather

precise timing is required for yet another control signal. This

may in some cases considerably increase the complexity of

the converter controller.

3.2 Forward Recovery Mitigation by Fast Parallel

Diodes There is zero current flowing in the SJ diode prior

to the forward recovery. This off ers yet another solution to

forward recovery by connecting a faster diode directly in par-

allel to SJ MOSFET as illustrated in Fig. 7. Diodes D1 and

D2 are the fast diodes connected directly in parallel to S m1

and S m2. These diodes should be fast enough to take over the

Fig. 7. Circuit diagram with fast parallel diodes con-nected

(a ) S R sw itch ina ctive (b) SR switc h turne d on as

soon as V S m1 reaches V o

Fig.8. SJ diode forward recovery; Ch1 — voltage of main switch S m1 100V / div, Ch3—1 / 2 current of S m2

5 A / div, time scale 0.2 µs / div

current as fast as possible and hence prevent the forward re-

covery of the SJ diode. Conduction properties of these diodes

are not important since they should conduct for only a limited

time.

This approach was tested by using a SiC diode(IDT16S60C (14)) at first. The experimental waveforms are

shown in Fig. 9 part (a). As expected, the SiC diode handles

the fast current commutation very well. The current peak is

approximately 125% and the ringing is very small. Subse-

quently, the current slowly commutates from the SiC diode

to the SJ diode in approximately 0.6 µs and after that the SiC

diode current is equal to zero.

The same approach as with SiC diode was also tested with

a conventional Si diode (DSEE29-12CC (15). The resulting ex-

perimental waveforms are shown in Fig. 9 part (b). As can be

seen, the used Si diode handles the current commutation very

well with current peak of only 105%. The ringing is slightly

increased compared to the case with SiC diode but it remainsvery small. The subsequent commutation from the parallel

diode to SJ diode is slower due to a lower on-state voltage

compared to SiC diode. The current fully commutates to SJ

MOSFET only once the SR switch is turned on (see Fig. 9

part (b)).

As discussed above, connecting a fast diode in parallel with

SJ MOSFET has direct impact on the forward diode recov-

ery. Fig. 10 shows additional results for Si diode combined

with modified SR turn-on timing. As shown, shortening the

SR delay time has no impact on the fast current commutation

(from snubber capacitor to parallel diode). This action of SR

switch only hastens the slow current commutation (from par-

allel diode to SJ switch) and hence the average current in the

parallel diode is reduced. However, this has no significant

impact on the overall conversion efficiency and therefore it is





(a) SiC parallel diode (IDT16S60C) (b) Si parallel diode (DSEE29-12CC)

Fig. 9. SJ diode forward recovery with a diode in par-allel to SJ MOSFET; Ch1 — voltage of main switch S m1

100V / div, time scale 0.2 µs / div; a) Ch3 — 1 / 2 current of S m2 5 A / div, Ch2— current of parallel diode 5 A / div, b)C hA—1 / 2 current of S m2 5 A / div, Ch3 — current of par-allel diode 5 A / div

Fig. 10. SJ diode forward recovery with a fast Si diode(DSEE29-12CC) in parallel to SJ MOSFET and SR ac-tive; Ch1 — voltage main switch S m1 100V / div, Ch3, A,B, C — current of parallel diode with modified timing of SR switch 5 A / div, time scale 0.2 µs / div

not required for a proper converter function.The experimental waveforms discussed above were mea-

sured on a 12.5 kW, 62.5 kHz converter prototype with basic

circuit configuration identical to Fig. 7. In 200 V to 400 V

forward boost mode and output power of 5 kW, the measured

efficiencies without the parallel diodes, with SiC diodes and

with Si diodes were 98.6%, 98.8% and 98.7%. This testifies

that the use of parallel diodes as proposed in this paper is

very good in suppressing the ringing while it has a negligible

impact on the conversion efficiency.

4. Conclusions

Slow body diodes of Super Junction MOSFETs may

lead to poor reverse recovery as well as forward recoveryperformance. As discussed, the reverse recovery can be con-

trolled in a circuit as shown in Fig. 1. through a proper circuit

design and critical timing of synchronous rectifier switch.

Connecting a fast diode in parallel to SJ MOSFET is pro-

posed to deal with the forward recovery issue. As shown this

solves the recovery problem without the need for a critical

turn-on timing of the synchronous rectifier switch.

The proposed concepts were implemented in a converter

prototype based on the circuit shown in Fig. 7. The circuit

handled poor SJ diode performance very well and it reached

efficiencies in 98.5% region in the output power range from

3 kW to 12.5 kW while operating at 62.5 kHz.

References

( 1 ) L. Lorenz, G. Deboy, A. Knapp, and M. Marz: “COOLMOSTM—a new mile-

stone in high voltage power MOS”, Proc. of International Symposium on

Power Semiconductor Devices and ICs, ISPSD, pp.3–10 (1999)

( 2 ) R. Ng, F. Udrea, K. Sheng, and G.A.J.A. Amaratunga: “Study of CoolMOS

integral diode: analysis and optimisation”, Proc. InternationalSemiconductor

Conference, CAS, Vol.2, pp.461–464 (2001)

( 3 ) M.-A. Kutchak, W. Jantscher, D. Zipprick, and A. Ludsteck-Pechloff : A

new 650 V Super Junction Device with rugged body diode for hard and soft

switching applications”, Proc. PCIM Europe, p.68 (2010)

( 4 ) “Mastering the Art of Slowness”, Application Notes of Infineon,

www.infieon.com

( 5 ) http: // www.microsemi.com / datasheets / APTC60HM45SCTG-Rev2.pdf

( 6 ) K. Hongrae, T.M. Jahns, and G. Venkataramanan: “Minimization of reverse

recovery eff ects in hard-switched inverters using CoolMOS power switches”,

Proc. Industry Applications Conference, IAS2001, Vol.1, pp.641–647 (2001)

( 7 ) M. Pavlovsky, G. Guidi, Y. Tsuruta, and A. Kawamura: “Buck / Boost Dc-Dc

Converter with Simple Auxiliary Snubber and Complete Soft Switching in

Whole Operating Region”, submitted for IEEE Energy Conversion Congress

and Exposition, ECCE America (2012)

( 8 ) R.W. De Doncker and J.P. Lyons: “The auxiliary resonant commutated pole

converter”, Proc. Industry Applications Society Annual Meeting 1990, IAS

1990, Vol.2, pp.1228–1235 (1990)

( 9 ) A. Mousavi, M. Pahlevaninezhad, P. Das, and P. Jain: “ZCS PWM bidi-

rectional converter with one auxiliary switch”, Proc. Energy Conversion

Congress and Exposition, ECCE 2011, pp.1175–1180 (2011)

(10 ) J. Zhang and J.-S. Lai: “A synchronous rectification featured soft-switching

inverter using CoolMOS”, Proc. Applied Power Electronics Conference and

Exposition, APEC (2006)

(11 ) H. Yu, X. Huang, and J.-S. Lai, “A novel load adaptive ZVS utilizing diode

reverse recovery current for soft-switching choppers”, Proc. of Industry Ap-

plications Conference, IAS2001. Vol.3, pp.1845–1850 (2001)

(12) http: // www.st.com / internet / com / technical resources / technical literature / data

sheet / CD00222838.pdf

(13) http: // www.irf.com / product-info / datasheets / data / irg4psc71ud.pdf

(14) http: // www.infineon.com

(15) http: // ixdev.ixys.com / DataSheet / DSEE29-12CC.pdf

Martin Pavlovsky (Non-member) received his Ing. degree in Electri-

cal Engineering from Technical University of Kosice,

Slovakia in 2000. In 2006, he received his PhD

degree from Delft University of Technology, The

Netherlands with his PhD work entitled “Electronic

Dc Transformer with High Power Density”. From

2006 till 2008 as well as from 2011 till 2012, he was

a postdoctoral fellow at Yokohama National Univer-

sity, Japan doing research in the field of highly effi-

cient, high power density converters for electric vehi-

cles. In the year 2009 he was a researcher at Kanagawa Academy of Science

and Technology, Kawasaki, Japan working on Advanced Power Electronics

Project concerning advance drive trains for electric vehicles. He received the

IEEE PELS Transactions Prize Paper Award in 2009.

Giuseppe Guidi (Non-member) graduated from the University of

L’Aquila, Italy, in 1995, and received his PhD from

the Norwegian University of Science and Technology

(NTNU) in 2009. He has worked for industry in the

field of Power Electronics from 1997 to 2004, join-

ing first Fuji Electric R&D, Japan, as R&D engineer

and then SIEI SpA, Italy as senior engineer. In 2009,

he joined Yokohama National University as Research

Associate. Since 2011, he is also part-time research

associate with NTNU, Norway. His research inter-

ests include power electronics, traction control and drive systems for electric

propulsion, as well as application of power electronics to renewable energy.





Atsuo Kawamura (Senior Member) (S’77-M’81-SM’96-F’02) was

born in Yamaguchi, Japan, in December 1953. He re-

ceived the B.S.E.E., M.S.E.E., and Ph.D. degrees in

electrical engineering from the University of Tokyo,

Tokyo, Japan, in 1976, 1978, and 1981, respectively.

In 1981, he was with the Department of Electrical

and Computer Engineering, University of Missouri,

Columbia as a Postdoctoral Fellow and later as an As-sistant Professor from 1983 to 1986. Since 1986, he

is with the Division of Electrical and Computer En-

gineering, Yokohama National University, Yokohama, Japan, where he was

an Associate Professor at first and in 1996 he became a Professor. His re-

search interests include power electronics, digital control, electric vehicles,

robotics, train traction control, etc. Dr. Kawamura is a member of the Insti-

tute of Electrical Engineers of Japan (IEEJ), Robotics Society of Japan, and

several other organizations. He was the conference Chairperson of IPEC-

Sapporo-ECCE-Asia in 2010. He received the IEEE IAS Transactions Prize

Paper Award in 1988, the Prize Paper Award of IEE of Japan in 1996, IEEE

IES Transactions Best Paper Awards in 2001 and 2002, and EPE-PEMC

Award in 2008.


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