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Chapter 3
MEMORY SYSTEMS
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Memory Unit Essential component in any computer
Needed for storing programs and data Small computers no need of additional storage.
In general purpose computers its not possible to
accommodate all programs in a single memory unit
Not all information is needed by the CPU at the same time
Economical to use low-cost storage devices for backup of
storing the information that is not currently used by CPU
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Memory Unit Memory unit that communicates directly with CPU - main
memory
Devices that provide backup storage - Auxiliary memory Magnetic disks and tapes
Datas currently used by Processor resides in mainmemory
Transferred from auxiliary memory to main memorywhen needed
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Memory Hierarchy Consists of all storage devices employed in a system
From the slow but high-capacity auxiliary memoryto a relatively faster main memory and a smaller,
faster cache memory
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Memory Hierarchy Very high speed special memory - Cache
Used to increase the speed of processing By making current programs and data available to
the CPU at a rapid rate
To compensate the speed difference between mainmemory and processor
Datas used frequently and datas used in present
calculations will be stored in cache By this, it is possible to increase the performance of
processor
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Memory Hierarchy Why 3 levels of memory ?
Economics
Storage capacity increases, cost per bit decreases andaccess time is longer
Auxiliary memory
Large storage, inexpensive, low access speed
Cache memory
Small, expensive and high access speed.
Speed increases cost also increases
Highest possible average access speed at low cost
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Multiprogramming Number of independent programs concurrently.
Possible to keep all parts of the computer as working A program is executed in CPU, but an I/O transfer is
required, then CPU initiates I/O processor to do that
work
Then CPU can execute other programs
All programs cannot reside in main memory at all time
Resides in auxiliary memory, when the program is
executed, transferred to main memory
Memory management system flow of data between main
and auxiliary memory
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Main Memory Central storage unit
Made up of RAM, but a portion may be of ROM chips also
RAM Random Access memory
Two possible operating modes,
Static
Flip flops to store binary information.
Retains value indefinitely, as long as it is kept powered.
Faster and more expensive than DRAM.
Dynamic
Form of electric charge through capacitors
Value must be refreshed every 10-100 ms
Reduced power consumption and large storage capacity.
Slower and cheaper than SRAM.
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ROM Read Only memory
Storing programs that are permanent (constants)
ROM portion of main memory is needed to storeinitial program bootstrap loader
To start the computer software
RAM is volatile its not possible So ROM is used
When power is ON hardware sets PC to first address of
bootstrap loader
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RAM and ROM chips RAM is better suited for communication with the CPU if it
has one or more control inputs that select the chip whenneeded
Bidirectional data bus
Tristate buffer
Logic 1
Logic 0
High impedance
The capacity of the memory is 128 words 8 bits (one byte) per word
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RAM
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ROM
Since it is read only, data bus will be in output mode
only No need of R/W
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Memory Address Map Pictorial representation of assigned address space for each
chip in the system
An example, assume that a system needs 512 bytes of RAMand 512 bytes of ROM
The RAM have 128 byte and need seven address lines,where the ROM have 512 bytes and need 9 address lines
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Memory Address Map
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Memory Address Map The hexadecimal address assigns a range of hexadecimal
equivalent address for each chip
Line 8 and 9 represent four distinct binary combination
to specify which RAM we chose
When line 10 is 0, CPU selects a RAM. And when its 1, it
selects the ROM
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Memory connection to CPU Lower order lines in the address bus select the
bytes within the chips, others selects a particularchip.
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Auxiliary Memory Common auxiliary memory devices
Magnetic disks and tapes
Magnetic drums, Magnetic bubble memory and optical disks
Properties
Access mode
Access time
Transfer rate
Capacity and
Cost
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Average time required to reach a storage location in
memory and obtain its contents - Access time
Access time = seek time + transfer time
Seek time: required to position the read-write head to a location
Transfer time: required to transfer data to or from the device
Number of characters or words that device can transfer
per second transfer rate
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M i Di k
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Magnetic Disk Circular plate constructed of metal or plastic coated
with magnetized material.
Both sides are used and several disks are stacked on
one another.
Rotate at high speed (5400 to 7200 RPM) and notstopped for accessing.
Bits are stored in magnetized surface in spots along
circles tracks.
Tracks are divided into sections - sectors.
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k
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Magnetic Disk
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Single R/W head for each disk.
To track address bits, mechanical assembly is used
to move the head into a specified position Separate R/W heads for each disk in each
surface
Electronically
decoder circuit More expensive
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Fi di
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Finding sector Addressed by address bits
Disk number, Disk surface
Sector number and
Track within the sector.
R/W heads are positioned in a track
It has to wait until the rotating disk reaches the
specified sector under the R/W head Information is transferred when the beginning of
the sector is reached
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I f i di ib i
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Information distribution Tracks near the circumference is longer than
center of the disk.
Bits are recorded at equal density, some tracks
will have more bits.
For equal length
variable recording density isused
Higher density near the centre of the tracks
Number of bits on all tracks is equal. Two types of disks
Hard disk
Floppy disk 26
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Magnetic tapes Strip of plastic coated with magnetic medium
Bits are recorded as magnetic spots alongseveral tracks
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Associative memory
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Associative memory Memory unit accessed by its contents.
Also called as CAM (Content Addressable Memory)
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L lit f f
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Locality of reference Analysis shows that the references to a memory at a
given time tends to be enclosed within a fewlocalized areas in memory.
Computer programs flows through loops and
subroutines.
When a loop is executed CPU refers to a set of
instructions in memory repeatedly.
Sometimes data also tend to be localized
tables Thus in short time, programs refers to a few areas in
the memory, while the remaining portion is
accessed infrequently31
Cache memory
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Cache memory If the active portions of program and data are
placed in a fast small memory, the average memory
access time can be reduced.
Thus total execution time is reduced
Such a fast small memory - cache memory Cache is the fastest component in the memory
hierarchy and approaches the speed of CPU.
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Operation
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Operation When CPU needs to access memory, the cache is
examined
If the word is found in the cache, it is read from it.
If the word is not found in the cache, the main
memory is accessed to read the word. Block of word containing the one accessed is
transferred from main memory to Cache.
Block size
one word or 16 words adjacent to theone just accessed.
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Performance
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Performance measured in terms hit ratio
When the CPU refers to memory and finds theword in cache, it is said to produce a hit
Otherwise, it is a miss
Hit ratio = hit / (hit+miss)
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C h
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Cache memory The transformation of data from main memory to
cache memory
mapping Three types of mapping
Associative mapping
Direct mapping
Set-associative mapping
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M i
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Mapping
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A i ti i
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Associative mapping Fastest and most flexible cache organization uses
an associative memory
Associative memory stores both the address anddata of the memory word
The address value of 15 bits is shown as a 5-digit
octalnumber and its corresponding 12-bitword isshown as a 4-digit octal number.
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Associative mapping
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Associative mapping
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A i ti i
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Associative mapping 15 bit address is placed in the argument register
and the associative memory will search for a
matching address If the address is found, the corresponding 12-bits
data is read and sent to the CPU
If not, the main memory is accessed for the word
Address, data pair is also transferred to cachememory
If the cache is full, an address-data pair must be
displaced Based on the displacement algorithm.
FIFO policy.
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Direct Mapping
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Direct Mapping Associative memory is expensive compared to RAM
RAM as cache memory
CPU address of 15 bits is divided into two fields.
9 LSB bits - index
6 bits tag
In general, there are 2K words in cache and 2Nwordsin main memory
N bit memory address is divided into two fields:
Kbits for the index
N-K bits for the tag field
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Direct Mapping
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Direct Mapping
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Disadvantage of Direct Mapping
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Disadvantage of Direct Mapping
Two words with the same index but with different
tag values cannot reside in cache memory at thesame time.
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Set Associative Mapping
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Set-Associative Mapping An improvement over the direct mapping.
Each word of cache can store two or more words ofmemory under the same index address.
Set size is 2 and it can be increased
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Set Associative Mapping
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Set-Associative Mapping
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Replacement
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Replacement
Random replacement
FIFO LRU (Least recently used)
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Writing into Cache
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Writing into Cache Reading main memory is not involved
Writing 2 ways
Write through
Update the main memory with every write operation
While the cache memory is updated parallely if the word is
present. Adv: main memory and cache same data.
Write back
Cache is updated and the location is marked by a flag
When the word is removed from cache it is copied in main
memory
Many times value will be updated
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Cache initialization
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Cache initialization Initialized when the power is applied or when the
main memory is loaded with programs fromauxiliary memory.
After initialization it contains some invalid data.
Valid bit To indicate whether or not the word contains valid data
or not.
Set to 0 when the data is invalid
Set to 1 - when a word is loaded from main memory.
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Virtual memory
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Virtual memory Is used to give programmers an illusion that they
have large memory.
Provides a mechanism to translate program
generated address into correct main memory
location.
Mapping or translation done by hardware (mapping
table)
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Virtual Memory
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Virtual Memory Address used by a programmer - virtual address.
Set of such addresses
address space. Address in main memory - physical address.
Set of such locations memory space
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CPU will reference instructions with 20 bit address.
But main memory can able to address only 15 bits
A table is needed to map a virtual address of 20bits to a physical address of 15 bits.
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M i t bl b t d i
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Mapping table can be stored in a
separate memory
Main memory Associative memory
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Address mapping using pages
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Address mapping using pages Table implementation simplified if address space and
memory space divided into groups of fixed size
Main memory broken down into groups of equal size
- Blocks.
Range from 64 to 4096 words
Auxiliary memory or address space divided into
groups - Page
Ex: Auxiliary memory -1024K and main memory - 32K and
page size - 1K, then auxiliary memory has 1024 pages andmain memory has 32blocks.
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Address space 8K and Memory space 4K. If divided into 1k words
8 pages and 4 blocks.
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Mapping
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Mapping Virtual address has 13 bits.
Higher order 3 bits
one of the 8 pages and remaining10 bits line address within the page.
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Associative memory page table
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Associative memory page table RAM page table is inefficient
Eight words are required but main memory canhold only 4 words .
More efficient way construct a page table with
number of words equal to number of blocks in main
memory
Implemented by Associative memory
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Page Replacement
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Page Replacement Virtual memory system combination of H/W &
S/W Software
Which page has to be removed when new page is
arrived
When a new page is to be transferred
Where the page has to be placed
Common replacement algorithms
FIFO
LRU
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Memory Management Hardware
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Memory Management Hardware Collection of H/W and S/W procedures for
managing various programs in memory S/W part of an operating system
Basic components of memory management
Facility for dynamic storage relocation that maps logicalmemory reference to physical memory
Provision for sharing common programs between
different users.
Protection of memory access among different users
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S
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Segment
Set of logically related instructions or data associated
with a given name. Logical address
Address generated by segmented program.
Same as virtual address but this has variable length
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Segmented page mapping
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Segmented page mapping Length of each segment is allowed to increase
or decrease based on the program.
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Translation Look-aside Buffer(TLB)
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Translation Look aside Buffer(TLB) Two mapping tables can be stored in separate small
memories or in main memory
Both case number of memory reference is increased
Slow down the system
Fast associative memory (TLB) First time a block is referenced then its values
(segment, page and block) are entered in the
associative memory If match occurs then delay is less or the previous
mechanism has to be used
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Example
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Example
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Consider a program loaded into memory that
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requires 5 pages
OS assigns program segment 6 and pages 0 to 4
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TLB
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TLB
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Memory protection
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y p Can be assigned to physical address or logical
address
Better for logical address.
Content of each entry in the segment table
descriptor Contains base address field and one or two additional
fields for protection
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Base address base of the page table address
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Used in mapping from logical to physical address
Length segment size with maximum number of
pages assigned to segment
Compared with page number and if page number falls
outside the length then the memory cannot be accessed
Protection Specifies the access rights
Full read and write
Read only Execute only
System only (OS protection)
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P R l t
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Page Replacement What if there is no free frame?
Page replacement find some page in memory, butnot really in use, swap it out
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Basic Page Replacement
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Basic Page Replacement
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Page Replacement
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Page Replacement
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FIFO
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FIFO When a page is to be replaced, oldest page is chosen
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Optimal Page-Replacement Algorithm
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p g p g
Replace page that will not be used for longest
period of time
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Disadvantage of Optimal Page-Replacement Algorithm
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Optimal page-replacement is difficult to implement,
because it requires future knowledge of the reference
string Least-recently-used (LRU)
LRU chooses the page that has not been used for the
longest period of time
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Least-recently-used (LRU)
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Least-recently-used (LRU)
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