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Outline
• Assignment 2 Solution
• Direct mapping implementation
CSCI2510 Tut08: Direct Mapping in MASM 2
Assignment 2 SolutionQuestion:
List the common flags in Condition Code Register, and describe the situation when they are set to
1 and give an example for each flag.
Answer:
Given two 4-bit registers R1 and R2 storing signed integers in
2’s-complement format. Take add R1, R2 as example.
(1)N (negative) Set to 1 if the result is negative
𝑅1 =2, 𝑅2 = – 5
(2)Z (zero) Set to 1 if the result is 0
𝑅1 =2, 𝑅2 = – 2
(3)V (overflow) Set to 1 if arithmetic overflow occurs
𝑅1 =7, 𝑅2 = 1
(4)C (carry) Set to 1 if a carry-out occurs
𝑅1 =5, 𝑅2 = – 2
CSCI2510 Tut08: Direct Mapping in MASM 3
Assignment 2 Solution
CSCI2510 Tut08: Direct Mapping in MASM 4
Assignment 2 SolutionQuestion:
Determine the effective address (EA) of the last operand, given R1 = 1024, R2 = 512, R3 =
256, and the memory location LOC = 1024
(a) ADD R1, R2, R3
(b) LOAD R1, (R3)
(c) LOAD R1, (R2, R3)
(d) LOAD R1, LOC
(e) LOAD R1, -128(R1)
Answer:
(a) R3
(b) 256
(c) 768
(d) 1024/LOC
(e) 896
CSCI2510 Tut08: Direct Mapping in MASM 5
Assignment 2 Solution
• If inputnumber is equel to 0,do the pop action
• If inputnumber is not equel to 0, push that
inputnumebr
• Print errror
CSCI2510 Tut08: Direct Mapping in MASM 6
Assignment 2 Solution
CSCI2510 Tut08: Direct Mapping in MASM 7
EBP-9*4
1011
101
4
3
2
1
Top=4
EBP
1024
1011
101
4
3
2
1
Top=3
EBP-9*4
EBP
push
Assignment 2 Solution
CSCI2510 Tut08: Direct Mapping in MASM 8
EBP-9*4
1011
101
4
3
2
1
Top=4
EBP
101
4
3
2
1
Top=5
EBP-9*4
EBP
pop
Direct mapping implementation
CSCI2510 Tut08: Direct Mapping in MASM 9
Direct mapping implementation
procedure• Check the cache
• Replace the block
10CSCI2510 Tut08: Direct Mapping in MASM
0 0 0 0 4 0 0
1 1 1 1 1 1
2 2 2 2 2
7 7 7 7 3 3 3 7
Status of cache
Direct mapping implementation
11CSCI2510 Tut08: Direct Mapping in MASM
Input the command or address
The input number is equel to -1
Check the cache
Cache hit?
Print the cache status
Replacement occurs
Exityes
yes no
no
Direct mapping implementation
CSCI2510 Tut08: Direct Mapping in MASM 12
• Data definition:• Cache size=4
• CPUAccess type:dd(32 bit)
• Check the cache and replace
Summary
• Assignment 2 Solution
• Direct mapping implementation
13CSCI2510 Tut08: Direct Mapping in MASM
