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Contents
Foreword ........................................................................................................... xi
Acknowledgments ............................................................................................. xiii ... About the Authors .............................................................................................. xv What’s on the CD-ROM? .................................................................................. XVII
Chapter 1: IC Fabrication Overview ....................................................................... 1 Section 1 : Introduction ........................................................................................... 3
1.1 Integrated Circuits .............................................................. ............................... 3 1.2 The Semiconductor Industry ...................... ............................... 6
Section 2: Support Technologies ............................................................................. 7 2.1 Crystal Growth and Wafer Preparation ......................................... 2.2 Contamination Control ...................................................... ............................... 8 2.3 Circuit Design and Mask Making .............. ............................. 10 2.4 Process Diagnostics and Metrology ...................................................................... 12
Section 3: Integrated Circuit Fabrication ............................................................... 13 3.1 Layering ................................................................................................................ 13 3.2 Patterning .............................................................................................................. 18 3.3 Doping .................................................................................................................. 21
Section 4: Test and Assembly ................................................................................ 25
4.2 Die Separation ....................................................................................................... 25
4.4 Encapsulation ........................................................................................................ 26 4.5 Final Test ............................................................................................................... 26
Section 5: Summary .............................................................................................. 27
.. . .
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3.4 Process Control and In-line Monitoring ............................................................... 22
4.1 Electrical Tests ..................................................................................................... 25
4.3 Die Attach and Wire Bonding ............................................................................... 25
Chapter 2: Support Technologies ......................................................................... 29 Section 1 : Introduction ......................................................................................... 31 Section 2: Contamination Control ......................................................................... 33
............................. 33 ........................................... 35
. . 2.1 Why Control Contamination? ............................................ 2.2 Contamination Sources ..............................
V
Con tents
2.3 The Cleanroom .................. ....................................................... Preparation ............................. Section 3: Crystal Growth and
...................................................... ......................................... 41 ......................................... 42 ion ....................................
3.3 Czochralski Silicon Growth ...................................................... 3.4 Shaping, Grinding. Cutting 3.5 Final Inspection and Shipping ...............................
Section 4: Circuit Design ............................................. 4.1 Introduction ........................ ....................................................... 4.2 Product Definition and Ne 4.3 The Design Team ................................................... ......................................... 53 4.4 The Design Process ................................................ ......................................... 55 4.5 Design Verification and Tapeout ........................................................................... 57
5.1 Introduction ........................................................................................................... 59 5.2 Reticle Substrate Preparation ................................................................................ 59 5.3 Pattern Transfer ..................................................................................................... 60
Chapter 3: Forming Wells ................................................................................... 63 Section 1 : Introduction ......................................................................................... 65 Section 2: Initial Oxidation .................................................................................... 71 Section 3: Photolithography .................................................................................. 79
3.1 Introduction ........................ ....................................................... 3.2 Coat (Spin) ............. ...................................................... ............................. 3.3 Exposure (Step) ...................................................... ......................................... a3 3.4 Develop ..................................................... ..................................................... a4 3.5 After Develop Inspect (ADI) ..........................................................
Section 4: Ion Implantation ................................................................................... 87
Chapter 4: Isolate Active Areas (Shallow Trench Isolation) ..................................... 93 Section 1 : Introduction to Shallow Trench Isolation ............................................... 95 Section 2: Pad Oxide Growth ................................................................................ 99
Section 4: Photolithography for Photo/Etch ........................................................ 105 Section 5: Hard Mask Formation Using Plasma Etch ........................................... 107
Polishing ......................... ......................................... 47 ..................................... 49
duct Plan .........................
Section 5: Photomask and Reticle Preparation ...................................................... 59
5.4 Inspection and Defect Repair ................................................................................ 61
Section 3: Silicon Nitride Deposition ................................................................... 101
5.1 Hard Mask Overview .......................................................................................... 107 5.2 Plasma Etch Overview ........................................................................................ 109
Section 6: Form Trenches in Silicon with Plasma Etch .......................................... 119 Section 7: Fill Trenches with Silicon Dioxide ........................................................ 121 Section 8: Chemical Mechanical Polishing (CMP) to Remove Excess Dioxide ....... 123
5.3 Etch Chemistry: Silicon Dioxide and Silicon Nitride ......................................... 114
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Section 9: W e t Etch Removal of Silicon Ni t r ide and Pad Oxide ............................ 127
Chapter 5: Building the Transistors .................................................................... 129 Section 1 : Introduction ....................................................................................... 131 Section 2: Thin Film Formation ........................................................................... 137
......................................... 137 2.1 Gate Dielectric Oxidation .. 2.2 Polycrystalline Silicon (Poly) Deposition .................................................. 2.3 Nitride Cap Deposition ......................................................
Section 3: Poly Gate Formation ........................................................................... 143 3.1 Photoresist Patterning ........ ......................................... 143 3.2 Plasma Etch ......................................................................................................... 144
Section 4: Source/Drain Formation ..................................................................... 147 4.1 Introduction ......................................................................................................... 147 4.2 Shallow Implant .................................................................................................. 149 4.3 Spacer Formation ................................................................................................ 149 4.4 High-Dose Implant ............................................................................................. 151 4.5 Anneal ................................................................................................................. 151
Section 5: Salicide Formation .............................................................................. 153 5.1 Sputter Cobalt .................................................................................................... 155 5.2 RTP Reaction Forming Silicide .......................................................................... 155
5.4 Anneal the Silicide .............................................................................................. 156
Chapter 6: First Level Metallization .................................................................. 157 Section 1 : Introduction ....................................................................................... 159 Section 2: Nit r ide and Oxide Depositions ............................................................ 163
2.1 Nitride Deposition .............................................................. 2.2 Oxide Deposition ........................... ......................................... 164
Section 3: C M P Planarization ................ ........................................................ 167 Section 4: Photo/Etch for Contact Holes ............................................................ 169
4.1 Contact Hole Photolithography ......................................... 4.2 Contact Etch ................................... ......................................... 170
Section 5: Tungsten Plug Process .......... ........................................................ 173 5.1 Deposit Ti/TiN Barrier/Glue Layers .......................................................... 5.2 Tungsten CVD .................................................................................................... 174 5.3 Tungsten CMP .................................................................................................... 176
Section 6: Low-lc Dielectric Process ..................................................................... 177 6.1 Deposit Low-k Dielectric Film ........................................................................... 177 6.2 Trench Photolithography and Etch ..................................................................... 180
Section 7: Copper First Level Interconnection Process ......................................... 183 7.1 TdTaN Barrier Layer Deposition ....................................................................... 183 7.2 Sputter Copper (Cu) ............................................................................................ 185
. .
5.3 Strip Residual Cobalt .......................................................................................... 156
. . . .
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7.3 Electroplate Copper (Cu) ......................................... ........................... 185 7.4 Copper CMP ....................................................................................................... 186
Chapter 8: Multilevel Metal Interconnects and Dual Damascene ........................... i89 Section 1 : Introduction ....................................................................................... 191 Section 2: Deposit Barrier Layer and lntermetal Dielectric ................................... 195 Section 3: Dual Damascene Process .................................................................... 197
3.1 Introduction ......................................................................................................... 197 3.2 Via Photo/Etch .................................................................................................... 198 3.3 Trench Photo/Etch ............................................................................................... 199 3.4 Deposit Barrier Layers ........................................................................................ 200 3.5 Sputter Copper .................................................................................................... 200 3.6 Electroplate Copper ............................................................................................ 200 3.7 CMP to Remove Excess Copper ......................................................................... 201 3.8 Deposit S i c Barrier Layer .................................................................................. 202 3.9 Build Additional Layers ...................................................................................... 202
Section 4: Form Bonding Pads ............................................................................ 203 Section 5: Final Passivation Process .................................................................... 205
5.1 Deposit Final Passivation .................................................................................... 205 5.2 Photo/Etch for Bonding Pads .............................................................................. 205
Chapter 8: Test and Assemb ly ........................................................................... 207 Section 1 : Introduction ....................................................................................... 209 Section 2: Wafer and Chip Testing ...................................................................... 211
2.1 In-line Parametric Test ........................................................................................ 211 2.2 Wafer Sort (Probe) .............................................................................................. 212 2.3 Final Functional Test ........................................................................................... 213
Section 3: Assembly and Packaging ..................................................................... 215 3.1 Die Separation ..................................................................................................... 215 3.2 Die Attach and Bond Pad Connection ................................................................ 216 3.3 Encapsulation ...................................................................................................... 218
Introduction ....................................................................................................... 221
Section 1 : Atoms and Molecules ......................................................................... 223 1.1 The Atom ............................................................................................................ 223 1.2 Molecules ............................................................................................................ 226
Section 2: Gases ................................................................................................. 229 2.1 Facts about Gases ................................................................................................ 229 2.2 Ions ...................................................................................................................... 230 2.3 Plasma ................................................................................................................. 230 2.4 Free Radicals ....................................................................................................... 231
Appendix A: Science Overview ........................................................................... 219
1.3 Organic Molecules .............................................................................................. 227
... Vll l
Contents
2.5 Excited States ...................................................................................................... 231 Section 3: Chemistry ........................................................................................... 233
............................................................... 233 3.3 Plasma Etch Chemistry ....................................................................................... 235
Section 4: Solids ................................................................................................. 237 4.1 Conductors and Insulators . 4.2 Semiconductors .................. ........................................................................... 238 4.3 pn Junctions ........................................................................................................ 239
Section 5: Electricity, Electric and Magnetic Fields ............................................... 241 5.1 Electric Charges and Fields 5.2 Electric Current ................................................................................................... 242 5.3 Magnetic Field .................................................................................................... 243
Appendix B: Plasma Etch Supplement to Chapter 4 ............................................. 245 Section 1 : Plasma Etcher Theory ......................................................................... 247 Section 2: Plasma Etch Process Requirements ..................................................... 249
Bibliography .................................................................................................... 2 5 1
Index .............................................................................................................. 253
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