+ All Categories
Home > Documents > DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING - odu. · PDF filedepartment of electrical &...

DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING - odu. · PDF filedepartment of electrical &...

Date post: 09-Mar-2018
Category:
Upload: buithu
View: 214 times
Download: 1 times
Share this document with a friend
27
DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING OLD DOMINION UNIVERSITY PH.D. DIAGNOSTIC EXAM Fall 2017 ODU HONOR PLEDGE I pledge to support the Honor system of Old Dominion University. I will refrain from any form of academic dishonesty or deception, such as cheating or plagiarism. I am aware that as a member of the academic community, it is my responsibility to turn in all suspected violators of the Honor Code. I will report to a hearing if summoned. Student Signature: ___________________________________________________ Student Name (BLOCK CAPITALS): ___________________________________ UIN Number: _________________________________________________ Please turn in this examination document with the pledge above signed and with one answer book for each solved problem. 1. This examination contains 25 problems from the following six areas: A. MATH (At most 3 problems can be A1 A2 A3 A4 answered from the Math area) B. CIRCUITS & ELECTRONICS B1 B2 B3 C. SYSTEMS, SIGNAL AND IMAGE PROCESSING C1 C2 C3 C4 C5 C6 D. PHYSICAL ELECTRONICS I D1 D2 D3 E. PHYSICAL ELECTRONICS II E1 E2 E3 F. COMPUTER SYSTEMS F1 F2 F3 F4 F5 F6 2. You must answer eight problems (no more than three from the MATH group). 3. Answer in the blue books provided. Use a separate book for each problem. Put the title and problem number on the front of each book (eg., MATH A-1) 4. Return all the 25 problems. 5. You will be graded on your answers to eight problems only. 6. The examination is “closed-book;” only blue books, exam problems and a scientific calculator are allowed. No formula sheet is allowed. Some problems include reference formulas. No material shall be shared without prior permission of the proctor(s). 7. You have four hours to complete this examination.
Transcript

DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING OLD DOMINION UNIVERSITY

PH.D. DIAGNOSTIC EXAM Fall 2017

ODU HONOR PLEDGE

I pledge to support the Honor system of Old Dominion University. I will refrain from any form of academic dishonesty or deception, such as cheating or plagiarism. I am aware that as a member of the academic community, it is my responsibility to turn in all suspected violators of the Honor Code. I will report to a hearing if summoned. Student Signature: ___________________________________________________ Student Name (BLOCK CAPITALS): ___________________________________ UIN Number: _________________________________________________ Please turn in this examination document with the pledge above signed and with one answer book for each solved problem. 1. This examination contains 25 problems from the following six areas:

A. MATH (At most 3 problems can be A1 A2 A3 A4 answered from the Math area) B. CIRCUITS & ELECTRONICS B1 B2 B3 C. SYSTEMS, SIGNAL AND IMAGE PROCESSING C1 C2 C3 C4 C5 C6 D. PHYSICAL ELECTRONICS I D1 D2 D3 E. PHYSICAL ELECTRONICS II E1 E2 E3 F. COMPUTER SYSTEMS F1 F2 F3 F4 F5 F6

2. You must answer eight problems (no more than three from the MATH group).

3. Answer in the blue books provided. Use a separate book for each problem. Put the title and problem number on the front of each book (eg., MATH A-1)

4. Return all the 25 problems.

5. You will be graded on your answers to eight problems only. 6. The examination is “closed-book;” only blue books, exam problems and a scientific calculator are

allowed. No formula sheet is allowed. Some problems include reference formulas. No material shall be shared without prior permission of the proctor(s).

7. You have four hours to complete this examination.

PROBLEM A1 – MATH

A resistor and inductance circuit is shown in the figure. When the switch is closed, the voltage equation satisfies KVL, i.e., E=iR+Ldi/dt Where: E is the source voltage, i is the current flowing in the circuit. Solve the current in the circuit from time t=0. Assume at time t=0, i=0, so that iR=0, di/dt (t=0+)=E/L Where t=0+ signifies the time immediately after the switch is closed.

PROBLEM A2 – MATH

Vector Analysis

Consider the function 𝑓𝑓(𝑥𝑥,𝑦𝑦) = 𝑥𝑥2 + 𝑦𝑦2. a) Make a sketch of 𝑓𝑓. You do not need to be numerically accurate, but you need to capture the

qualitative shape of 𝑓𝑓. b) Compute the vector field 𝐴𝐴 = 𝑔𝑔𝑔𝑔𝑔𝑔𝑔𝑔(𝑓𝑓). c) Make a sketch of A. Again, you do not need to be numerically accurate, but capture A qualitatively. d) What is, in general, the geometric meaning of the gradient of a scalar function? e) Show that for all scalar functions 𝑓𝑓, 𝑐𝑐𝑐𝑐𝑔𝑔𝑐𝑐�𝑔𝑔𝑔𝑔𝑔𝑔𝑔𝑔(𝑓𝑓)� = 0 .

PROBLEM A3 – MATH

Linear Algebra Let njiijaA ≤≤= ,1][ be a square matrix of dimension nn × with real elements, distinct eigenvalues nλλ ,,1 and corresponding eigenvectors nxx ,,1 .

1. Find the eigenvalues and eigenvectors of matrix mA . A formal proof should be given.

2. Prove that, for any eigenvalue kλ of A with eigenvector kx and for any scalar constant c , the number ck −λ is an eigenvalue of matrix cIA− where I is the identity matrix of order n , with corresponding eigenvector kx .

3. Prove that the iteration ,,,, 11201 −=== pp AyyAyyAyy

with 0y arbitrarily chosen, converges to the dominant eigenvector of matrix A. Note: The dominant eigenvector corresponds to the maximum eigenvalue Let

1λ be the dominant eigenvalue of matrix A , that is 1,1 ≠∀> kkλλ , and let 1x be its corresponding eigenvector.

PROBLEM A4 – MATH

PROBABILITY A businessman has two umbrellas for commuting between his home and his office. When it rains, and an umbrella is available in his location, he takes it. If it is not raining, he never takes an umbrella. Suppose that it rains with probability p each time he commutes from one location to the other, independently of other times. What is the probability he gets wet on a given trip after many days of commuting?

PROBLEM B1 – CIRCUITS AND ELECTRONICS

Sinusoidal Steady State Analysis

A. Find the Thevenin impedance seen looking into the terminals a,b of the circuit in the figure if the frequency of operation is (25/π)kHz.

B. Three loads are connected in parallel across a Vo=310∠0∘V (rms) line and fed from a

line having a series impedance 0.2+j0.05 Ω, as shown in figure. Load 1 absorbs 3 kW at unity power factor; Load 2 absorbs 5 kVA at 0.8 leading; Load 3 absorbs 5 kWand delivers 6 kVAR

a) Calculate the rms value of the voltage (Vs) at the sending end of the line. b) Calculate the average power associated with the line impedance. Use positive value if

the power is absorbed and negative value if the power is delivered. c) Calculate the reactive power associated with the line impedance. Use positive value if

the reactive power is absorbed and negative value if the reactive power is delivered. d) Calculate the average power at the sending end of the line associated with the line and

the load. Use positive value if the power is absorbed and negative value if the power is delivered.

e) Calculate the reactive power at the sending end of the line associated with the line and the load. Use positive value if the reactive power is absorbed and negative value if the reactive power is delivered.

f) Calculate the efficiency (η) of the line if the efficiency is defined as η=(Pload/Psendingend)×100%.

PROBLEM B2 – CIRCUITS AND ELECTRONICS Laplace Application to Circuit Analysis

A. Given that ( ) { ( )}F s f t= L , show that

B. There is no energy stored in the circuit in the figure at the time the current source is energized. Draw the circuit in s-domain and solve.

a) Find Ia(s) and Ib(s) b) Find ia(t) and ib(t) c) Find Va(s), Vb(s) and Vc(s) d) Find va(t), vb(t) and vc(t).

PROBLEM B3 – CIRCUITS AND ELECTRONICS

Answer below questions for a BJT circuit and vi=2V when the BJTs have β=100.

a) Which BJT will be cut-off? b) Calculate VB, VE, IB, IC, and IE?

3.0V

-3.0V

2.0V

PROBLEM C1 – SYSTEMS, SIGNALS AND IMAGE PROCESSING

Consider the linear convolution of a digital image of size N1xN1 with a spatial filter of size N2xN2, resulting in a filtered image of size N3xN3.

1) Determine a formula for N3 with respect to N1 and N2, such that computing the convolution in the frequency domain via the FFT will be equivalent to a linear convolution in the spatial domain. (2pts)

2) Determine the number of multiplications needed to perform the convolution in the spatial domain. Express the answer in terms of N1 and N2, and do not make any assumptions about the symmetry of the filter. (3pts)

3) Determine the number of multiplications required to compute the same convolution in the frequency domain using the FFT. Assume the forward and inverse FFT each require 2N2log2N multiplications for a square image with dimensions NxN. Express the answer in terms of N3, which is related to N1 and N2 from part (1). (5pts)

PROBLEM C2 – SYSTEMS, SIGNALS AND IMAGE PROCESSING

A causal LTID system is characterized by the following difference equation:

y[n+2] -43 y[n+1] +

81 y[n] = x[n]

(a). Determine the system function H(z) for the system (3 points) (b). Determine the impulse response h[n] for the LTID system (3 points) (c). If x[n] = (1/2)nu[n], what is y[n] (4 points)?

PROBLEM C3 – SYSTEMS, SIGNALS AND IMAGE PROCESSING

(a). If the discrete-time signal x[n] is down-sampled by 3, what is the cutoff frequency for the ideal low pass filter to avoid aliasing? (3 points)

(b). If the discrete-time signal x[n] is up-sampled by 2, what is the cutoff frequency for the ideal low pass interpolation filter? (3 points)

(c). Let X(ejω) denote the Fourier transform of the signal

x[n] = u[n] – u[n-51]

What are the values of X(ejω)|ω=0 and X(ejω)|ω=π ? (4 points)

PROBLEM C4 – SYSTEMS, SIGNALS AND IMAGE PROCESSING

CONTROL SYSTEMS Consider the unity feedback system in Figure 1, where the plant that needs to be controlled is

( ) ( )( )10 .

10 1pG ss s

=+ −

R(s) C(s)Gp(s)Gc(s)+

+

-

U(s)

Figure 1. Block diagram of a closed-loop system.

Consider the proportional controller ( )cG s K= .

i. (2 points) Find the range of values of the proportional controller that results in a stable closed-loop system.

ii. (2 points) Design the proportional controller to yield a closed-loop system with no overshoot and rise time as small as possible.

iii. (2 points) Determine the steady-state error if ( ) 1R ss

= and the approximate settling time.

iv. (2 points) Determine the Gain and Phase Margins for the closed-loop system designed in (ii). Explain the significance of these margins for this closed-loop system.

v. (2 points) Design a controller that will improve one of the specifications in (iii).

Review: The settling time of the step response of a standard second order transfer function is approximately

4 .n

sTζω

PROBLEM C5 – SYSTEMS, SIGNALS AND IMAGE PROCESSING Communications Problem

Explain the concept of signal mixing by which a real-valued analog bandpass signal with center frequency f1 and bandwidth B is converted to a bandpass signal that has the same bandwidth but is centered around a different frequency f2. For full credit you must answer the following specific questions, making sure to include all relevant details:

1. Sketch the diagram of a signal mixer with clear notations for all signals and blocks featured.

2. Use Fourier analysis to explain how the spectrum of the bandpass signal at the input

of the mixer is changed to produce the desired characteristic in the signal at the mixer output.

3. Explain the difference between up-conversion and down-conversion of a bandpass

signal.

PROBLEM C6 – SYSTEMS, SIGNALS AND IMAGE PROCESSING

1. (5 pts) The data link layer retransmits a frame if it is not acknowledged by the receiver. If the probability of a frame being damaged is p, and the probability of an ACK being damaged is q, what is the mean number of transmissions required to send a frame? 2. (5 pts) We have a character frame FLAG A B ESC FLAG C. Assume the byte stuffing framing method is used, what will be the actual frame to be transmitted? Note the special characters are FLAG and ESC.

PROBLEM D1 – PHYSICAL ELECTRONICS I

A time-harmonic uniform plane wave (of angular frequency 𝜔𝜔) propagates in air and onto a

perfect conductor, as shown below in Fig. D1. The electric field in its complex form is given

by 𝐸𝐸�⃗ = −�̂�𝑧𝐸𝐸0𝑒𝑒𝑗𝑗𝑗𝑗𝑗𝑗, where k is the wave number. Find the surface current density 𝐽𝐽𝑠𝑠 (in its

complex form) on the surface of the perfect conductor in terms of E0, μ0, and ε0, and as a

function of space (x,y,z). Consider air as a dielectric with μ0 and ε0.

Fig. D1

PROBLEM D2 – PHYSICAL ELECTRONICS I

A metallic sphere of radius a is situated in air and charged with a charge Q. Answer below questions.

(a) Calculate the charge distribution of the sphere? (b) Calculate the electric field intensity vector in air? (c) Calculate the potential of the sphere?

PROBLEM D3 – PHYSICAL ELECTRONICS I

Optical Fiber Communications Problem: An optical signal at a specific wavelength lost 40 % of its power after traversing 2 km of fiber. What is the attenuation in dB/km of the fiber?

PROBLEM E1 - PHYSICAL ELECTRONICS II

Consider a p-n junction similar to the one depicted in the schematic p-n junction below but with NA = 1018 cm-3 and ND = 1016 cm-3. At room temperature:

a) calculate the built-in potential Φbi of this junction in [V]. b) calculate the extend of the depletion region xp on the p side in [nm] c) calculate the extend of the depletion region xn on the n side in [µm] d) calculate the magnitude of the electric field at the metallurgical junction in [V/cm]. The metallurgical

junction depth xj is the location where the semiconductor changes from n-type to p-type. e) Calculate the potential difference Φ in [V] between the n-side and the p-side with an applied

forward bias of V = 0.6 V. f) With the same forward bias as above calculate the excess minority carrier concentration at

the edges of the depletion region. g) For the case of a junction area of 10 µm2 calculate the junction capacitance in [fF] for this

diode at room temperature with an applied forward bias of V = 0.6 V.

h) Calculate the current density J in [A/cm2 ] flowing through this diode under an applied forward bias of V = 0.6 V.

PROBLEM E2 – PHYSICAL ELECTRONICS II

Physical Electronics

1. Draw a (100) plane and a (111) plane for crystalline silicon

2. Assume that you have an intrinsic silicon wafer a. Calculate the location of the intrinsic Fermi level, Ei, in silicon at liquid

nitrogen temperature (77K), above room temperature (310K), and at 150°C. Assume that mp = 1.0 m0 and that mn = 0.15 m0.

b. Is it reasonable to assume that Ei is in the center of the forbidden gap? Equations:

( ) ( )CVVC NNkTEEEi ln22)( ++=

NV = 2(2πmp kT / h2)3/2

NC = 2(2πmn kT / h2)3/2

Eg(T)= Eg(0) –αT2/(T+β) with Eg(0) = 1.17 eV; α = 4.73 10-4 eV/K ; β = 636 K k=1.38 10-23 J/K h=6.62 10-34 J.s

PROBLEM E3 – PHYSICAL ELECTRONICS II

The electron speed v distribution in a plasma with no external fields can be approximately assumed as a Maxwellian. The example below shows a calculation of the average square speed <v2> for a three-dimensional Maxwellian distribution where m is electron mass, k is Boltzmann’s constant, and T is electron temperature. For a three-dimensional Maxwellian distribution, calculate the most probable speed. In the case below h(v) is v2. Show steps.

2

2

2

32

2 2 2 20

32

4 20

3 222 4

0

38

2

2

( ) ( ) ( )

42

42

2

2 242

3

1 32 2

mkT

mkT

x

h h f d

m e dkT

m e dkT

mxkT

m kT kT x e dxkT m m

kTm

m kT

υ

υ

π

υ υ υ υ

υ υ πυ υπ

π υ υπ

υ

υ ππ

υ

υ

−∞

−∞

∞ −

=

=

=

=

=

=

=

PROBLEM F1 – COMPUTER SYSTEMS

Problem Description:

1. (1 point) Give the definition for memory-mapped I/O.

2. (2 points) Give the hardware design for a memory-mapped I/O device with the following specifications assuming the Nios2 CPU is the core. Assume all registers are one byte. Furthermore, assume the bit ordering is big endian. Note that a data read is input to the CPU and a data write is output from the CPU.

Register Name Mode Register fields Control C Write only C0 Set device enabled (’1’ to enable, ’0’ to disable)

C1 Reset device (set to ’1’ to reset I/O device) C2 Write data (set to ’1’ when writing data) C3 Enable interrupts (’1’ to use interrupts, ’0’ to poll) C4 Clear pending interrupt (’1’ to clear pending interrupt) C7 Send error acknowledgment to I/O device (’1’ to acknowledge)

Status S Read only C0 Device enabled flag (’1’ if enabled) C1 Device busy (’1’ if the device is busy) C2 Read data available (’1’ if input data ready to read) C3 Write data acknowledgment (’1’ when I/O accepts write data) C4 Interrupt pending (’1’ when interrupt is pending) C7 Error flag (’1’ if error)

Data in Di Read only Di7..0 is input data byte Data out Do Write only Do7..0 is output data byte

3. (7 points) Using the registers and your design from the previous part, provide one or more assembly routines to handle polled input and output. As part of your design of the assembly routine, give a flow chart that summarizes the processing. Clearly state any assumptions you have to make.

Additional notes/clarifications:

• When the device is busy, it cannot accept data. You have to wait until the device is no longer busy before sending more data. • When the device has an error, you need to acknowledge the error before any further I/O can be processed. • You must acknowledge input data before the I/O device will provide subsequent input. • Any control bits not mentioned are ignored and any status bits not mentioned are always ’0’.

• After reading data, the read data available flag (C2) is cleared.

Continued on next page

PROBLEM F2 – COMPUTER SYSTEMS

Part 1 (4 points)

Give a VHDL behavioral model that computes ex in a manner consistent with the power series. Note any assumptions you make in composing your model. Furthermore, include the entity for your behavioral model. Part 2 (3 points) Give a datapath that is consistent with the behavioral model that provides all of the capabilities to compute ex. Assume that the permitted datapath functional units are multipliers, adders, and dividers and each can be completed in one clock period. Note any and all control signals necessary to support the computation. Part 3 (3 points) Devise a state machine chart that describes the computation consistent with the datapath from the previous section. In each state, clearly identify the signals that must be turned on in that state.

PROBLEM F3 – COMPUTER SYSTEMS

Computer Architecture 1. Suppose the current program counter (PC) is set to 2000 0000hex. Is it possible to use the jump

(j) MIPS instruction to set the PC to the address as 3200 0000hex? Why? (need to elaborate on how you get your answer).

2. If we have hit the power wall (i.e., unable to reduce supply voltage much further or the capacitive load; No new coooling technologies to remove more heat), we have to reduce the power consupmption, but still want to increase the performance of the computer in terms of CPU exeecution time for a program. How can we achive this? Why?

PROBLEM F4 – COMPUTER SYSTEMS

Computer Algorithms

The recurrence for the time complexity of an algorithm of interest is

T (n) = 3T (n/3) + n Part 1 (3 points)

Based on the structure of the recurrence, what can you infer about the structure of the underlying algorithm? Part 2 (5 points)

Find the asymptotic time complexity for this algorithm. Show all of your work. Part 3 (2 points)

(True or False) With computer performance increasing every year, developing efficient algorithms to solve problems becomes less important. Justify your answer.

PROBLEM F5 – COMPUTER SYSTEMS

Data Structure

1.

2. Please provide pseudo code or diagram (explanations) for following questions Given the input A (2, 8, 7, 2 0, 1, 1, 6),

2.1 Construct a binary search tree according to the input A sequence.

2.2 Add a node, 5, into this binary search tree?

2.3 Delete a node, 0, from this binary search tree?

PROBLEM F6 – COMPUTER SYSTEMS

Logic Design 1. Given the following truth table,

A B C Y (output)

0 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1 0 0 0 1 0 1 1 1 1 0 1 1 1 1 0

(a) (3 pts) write the Boolean equation in sum-of-products form. (b) (4 pts) Simplify the Boolean equation using Karnaugh map. (c) (3 pts) Draw a logic diagram using ‘and’, ‘not’ and ‘or’ gates, to represent this function


Recommended