DEPARTMENT OF ELECTRONICS AND TELECOMMUNICATION ENGINEERING SVMIT… EngineeringTilak... ·...

DEPARTMENT OF ELECTRONICS AND

TELECOMMUNICATION ENGINEERING

SVMIT, BHARUCH

MICROPROCESSOR AND INTERFACING

Subject Code: 140701

B.E. II (………… Sem.) (………………………)

CERTIFICATE

This is to certify that Mr./Ms………………….

………………………………………………….Of B.E.…

Semester……Enrollment No …………….……………. Branch

……………………….has been found satisfactory in the continuous

internal evaluation of the laboratory, practical and term work in the

subject …………………… for the academic year 20… – 20…

Date: Sign. of teacher:

INDEX

Sr. No. Title Date Sign Marks/ Grade

EXPERIMENT- 1 DATE: _____________ Aim: Introduction to DYNA-85L microprocessor hardware and software development system (kit) and enter following simple programs starting at location C000H and execute them. A. Add two 8 bit numbers using immediate addressing. Store answer in accumulator. The sum is of 8 bits. B. Add the same two numbers using register indirect addressing mode. The numbers are located at C100 H and C101 H. The sum (8 bits) should be stored at C102 H. C. Repeat the same program in part (B) with one number of C100 H and other number at C110 H. The answer should beat C200 H.

Apparatus: Dyna-85L kit, keyboard, power cord Introduction to DYNA-85L microprocessor hardware and software development system (kit):

MICROFRIEND DYNA -85 (LCD) is based on the Intel 8085A high performance CPU operating at 3 MHZ clock frequency.

The required power supplies are in-built.

Monitor program (operating system) has been provided in 16KB EPROM 27128 (system memory). The monitor program includes all standard command, functions, subroutines, utility programs, serial interface routines and line assembler/dis-assembler.

A 6264(8KB) battery back- up RAM (user memory) has been provided for inputting and executing programs.

An IBM compatible ASCII keyboard with 101 keys and 40 x 2 LCD display is interfaced using dedicated interfacing circuits.

Parallel I/O lines are provided 8255 (As J3 connector).

Serial I/O interface is available through RS232C Compatible port. It can be interfaced with PC serial (COM) port.

Three channels of 8253 chip, a 16 bit TIMER/COUNTER (As J7 connector).

To start the system connect keyboard, power cord and switch on mains power.

After power on, the system does a power on self test (POST) and after initialization the sign on message on LCD is Dyna-85> which means the system is ready to accept any command from user.

Press “ESC” key any time to get sign on message.

Memory mapping : o MONITOR EPROM (16KB) – 0000H—3FFFH. o USER RAM (8KB duplicated) – C000H—DFFFh and E000H—FFFFH. o EXPANSION EPROM/RAM (32KB) – 4000H—BFFFH.

Terminate all programs with RST1 instruction.

Important Commands for program entry, execution and debugging: Each command must be terminated by carriage return (CR/ENTER) key. Use back space key for deleting any command before ENTER pressed. The wrong entry displays “Bad Command” message. 1) A—Assemble program in memory

To write a program in the assembly language (mnemonic) and using line-assembler to assemble

it and store it in the given memory location.

e.g. A (start)

A C000

2) U—Un assemble memory block

To unassemble given memory block and display it.

e.g. U (start),(end)

U C000,C0FF

3) E—Edit memory command

Allows you to examine and optionally modify memory locations individually. This can also be

used to enter data for program and also to write a program in machine language (enter hex

codes) directly. The hex code must be generated by hand assembly.

e.g. E (start)

E C000

Use space bar key for viewing next memory locations.

4) Go—Program execute command

This command is used to execute program from a desired location onwards.

e.g. Go (start),(break point)

For direct execution without breakpoint write 00 in break point field.

e.g. Go C000,00

5) R—Examine/Modify Register command

Allows you to examine and optionally modify the content of all 8085 internal Registers.

e.g. R (reg. Identifier)

R A

Or if we use without identifier, all register contents will be displayed.

e.g. R

6) D—Display memory command Selected area of addressable memory may be accessed and displayed by D Command. e.g. D (start),(end) D C000,C0FF Use space bar key for viewing next memory locations.

7) T—Trace /single step command

To check the execution of program step by step and see the results. Here single instruction will

be executed at a time and the register contents are displayed to check the result.

e.g. T (start),00

T C000,00

Press ENTER to go to next instruction.

Enter following programs and check the results. A. Add the two 8-bit numbers using immediate addressing mode. Store answer in

accumulator .the sum is of 8-bits. MVI A, 90H MVI B, 13H ADD B RST 1

Program entry:

Memory Location

Instruction Hex code Comment

Results:

Inputs Outputs

B. Add the same two number using register indirect addressing mode. The numbers are located at C100 H and C101 H. The sum (8 bits) should be stored at C102 H. LXI H, C100H MOV A, M INX H ADD M STA C102H RST 1

Program entry:

Memory Location


Results:

Inputs Outputs

C. Repeat the same program in part (B) with one number of C100 H and other number at

C110 H. The answer should beat C200 H. LXI H, C100H MOV A, M LXI H, C110H ADD M STA C200H RST 1

Program entry:

Memory Location


Results:

Inputs Outputs

Teacher’s Sign: _____________ Marks/Grade: __________

EXPERIMENT- 2 DATE: _____________ Aim: A. Add two 8 bit numbers with sum greater than 8 bits. Use memory locations C100H onwards for storing two numbers, sum and carry. B. Ten data bytes are stored at location starting from C100 H. Add them and store the 16 bit result at C700 H and C701 H. Apparatus: Dyna-85L kit, keyboard, power cord A.

LXI H, C100H MVI C, 00H MOV A, M INX H ADD M JNC AHEAD INR C AHEAD: STA C102H MOV A, C STA C103H RST 1 Program entry:

Memory Location


Results:

Inputs Outputs

B. MVI A, 00H OR XRA A MOV B, A LXI H, C100H MOV A, M MVI C, 0A H LOOP: ADD M JNC NEXT INR B NEXT: INX H DCR C STA C700H MOV A, C STA C701H RST 1 Program entry:

Memory Location

Instruction Hex code

Results:

Inputs Outputs


EXPERIMENT- 3 DATE: _____________ Aim: A. Write a program to find the largest number from the array of ten unsigned data bytes stored at

location C100 H onwards. Store answer at C200 H.

B. Write a program to determine number of +ve, -ve and zeros from ten signed data bytes stored at

C100 H onwards. Store the answer at location C200 H onwards.

Apparatus: Dyna-85L kit, keyboard, power cord A. LXI H, C100H MVI C, 09H MOV A, M LOOP: INX H CMP M JNC AHEAD MOV A, M AHEAD: DCR C JNZ LOOP STA C200H RST 1 Program entry:

Memory Location

Instruction Hex code

Results:

Inputs Outputs

B. LXI H, C100H MVI C, 0A H MVI B, 00H MVI D, 00H MVI E, 00H LOOP: MOV A, M CPI 00H JNZ PON INR B JMP OVER PON: RAL JC NEG INR D JMP OVER NEG: INR E OVER: INX H DCR C JNZ LOOP LXI H, C200H MOV M, B INX H MOV M, D INX H MOV M, E RST 1 Program entry:

Memory Location


Results:

Inputs Outputs


EXPERIMENT- 4 DATE: _____________ Aim: A. Write a program to multiply two 8 bit numbers using successive addition. Two data bytes are at

locations C100H and C101H. The answer is to be stored at C200H and C201H.

B. Write a program to divide two 8 bit numbers using successive subtraction. Two data bytes are at

locations C100H (dividend) and C101H (divisor). The answer is to be stored at C200H (quotient) and

C201H (remainder).

Apparatus: Dyna-85L kit, keyboard, power cord

A. LXI H, C100H MOV C, M MVI A, 00H INX H MOV B, M MVI D, 00H LOOP: ADD C JNC SKIP INR D SKIP: DCR B JNZ LOOP STA C200H MOV A, D STA C201H RST 1 Program entry:

Memory Location


Results:

Inputs Outputs

B. LXI H, C100H MOV A, M INX H MOV B, M MVI C, 00H LOOP: SUB B JC SKIP INR C JMP LOOP SKIP: ADD B STA C200H MOV A, C STA C201H RST 1 Program entry:

Memory Location


Results:

Inputs Outputs


EXPERIMENT- 5 DATE: _____________ Aim: A. Write a program to arrange (sort) ten data bytes stored at C100 H onwards into ascending order. Suggest modifications for descending order arrangement. B. Write a program to add two BCD numbers stored at C100 H and C101 H. store the answer at C200 H. and C201 H. Apparatus: Dyna-85L kit, keyboard, power cord

A. LXI H, C100H

MVI C, 09H LOOP2: MOV D, C LOOP1: MOV A, M

INX H CMP M JC SKIP MOV B, M MOV M, A DCX H MOV M, B INX H

SKIP: DCR D JNZ LOOP1 LXI H C100H DCR C JNZ LOOP2 RST 1

This method is called bubble sorting. Here for e.g. five nos. are given (1) First (1) & (2) are compared. (2) And larger no stored at higher location. (3) Then it will again compare with 3rd no. (4) And process repeats 4 times. (5) After one internal loop we get largest no. at highest memory location. Then again remaining

four nos. are sorted and found largest no. and stored at second highest location and so on. Program entry:

Memory Location


Results:

Inputs Outputs

B. MVI C, 00H LXI H, C100H MOV A, M INX H ADD M DAA

JNC AHEAD INR C

AHEAD: STA C200H MOV A, C STA C201H RST 1

Program entry:

Memory Location


Results:

Inputs Outputs


EXPERIMENT- 6 DATE: _____________ Aim: A. Write a program to convert a number from hexadecimal to BCD stored at C100 H. Store answer at C200 H onwards. B. Repeat the above program using subroutine for division process. Write main program at C000H onwards and subroutine at C050H onwards. Apparatus: Dyna-85L kit, keyboard, power cord A. LXI H, C100H MOV A, M MVI B, 64H MVI C, 00H LOOP: SUB B JC OVER INR C JMP LOOP OVER: ADD B MVI D, 00H MVI B, 0AH LOOP1: SUB B JC OVER1 INR D JMP LOOP1 OVER1: ADDB LXI H, C200H MOV M, C INX H MOV M, D INX H MOV M, A RST 1 Description: Let the 8-bit hex. no. is FFH. FFH = 25510 So, three BCD digits result and required to store. If we divide any 3 digit decimal no. by 100 then MSD will come as dividend now 10010 = 64H So, divide first hex no by 64H. Store its dividend now its remainder is again divided by 1010 = 0AH. This gives the middle digit in dividend and remainder gives the LSD. Ex. FFH = 25510 FFH ÷ 64H ------------- Dividend – 2 (C) Reg. Remainder –37H Then 37H ÷ 0AH ------------ Dividend – 5 (D) Reg. Remainder – 5 (A) Reg. The answer is stored as Reg. C Reg. D Reg. A MSD Middle digit LSD

Program entry:

Memory Location


Results:

Inputs Outputs

B. MAIN: LXI SP, EEEEH LXI H, C100H MOV A, M MVI B, 64H CALL DIV MOV E, C MVI B, 0AH

CALL DIV LXI H, C200H MOV M, E INX H MOV M, C INX H MOV M, A RST 1

DIV: MVI C, 00H LOOP: SUB B JC SKIP INR C JMP LOOP SKIP: ADD B RET

Here E --- MS Digit C --- Middle Digit A --- LS Digit Program entry:

Memory Location


Results:

Inputs Outputs


EXPERIMENT- 7 DATE: _____________ Aim: A. Interface an LED display card to 8085 through 8255 and write a program to turn ‘ON’ LEDs LA0 -

LA7 for some time and turn ‘OFF’ LEDs LB0 - LB7, after some delay reverse the process and repeat it

continuously.

B. For this interface write a program to turn ‘ON’ LEDs LA0, 2,4,6 and LB1,3,5,7, turn ‘OFF’ other LEDs and

after some time make the ‘ON’ LEDs ‘OFF’ and ‘OFF’ LEDs ‘ON’. Repeat it continuously.

C. For this interface read the input switches at Port C and transfer its status to Port A and its

complement to Port B.

Apparatus: Dyna-85L kit, keyboard, power cord, LED display PIO card, 26 pin FRC connector A. Interfacing of LED display card with 8255:

PORT A: LEDs [LA0 – 7]: O/P port, PORT B: LEDs [LB0 – 7]: O/P port, PORT C: Input switches: I/P Port

Connect the LED display card to 8255 on kit (J3 connector) through 26 pin FRC cable.

Take care about proper connection. Pin 1 of card connector must be connected to pin 1 of kit connector. Use red line marked on FRC cable as reference. It should be at pin 1 on both sides.

8255 Port addresses: PORT A 10H PORT B 11H PORT C 12H CR 13H

CONTROL WORD REG.: 1 00 0 1 0 0 1 = 89H I/O mode Mode 0 Port A Port CU Mode 0 Port B Port CL port A o/p i/p port B o/p i/p

MAIN: LXI SP, EEEEH MVI A, 89H OUT 13H XRA A CONT: OUT 11H CMA OUT 10H CALL DELAY JMP CONT

DELAY: PUSH PSW PUSH D LXI D, 16 bit count LOOP: DCX D MOV A,D ORA E JNZ LOOP POP D POP PSW RET

Program entry:

Memory Location


B. LED 0 1 2 3 4 5 6 7

LED A = 1 0 1 0 1 0 1 0 = AAH

LED B = 0 1 0 1 0 1 0 1 = 55H

MAIN: LXI SP, EEEEH

MVI A, 89H

OUT 13H

MVI A, AAH

CONT: OUT 10H

CMA

OUT 11H

CALL DELAY

JMP CONT

Program entry:

Memory Location


C. MAIN: LXI SP, EEEEH

MVI A, 89H

OUT 13H

CONT: IN 12H

OUT 10H

CMA

OUT 11H

CALL DELAY

JMP CONT

Program entry:

Memory Location



EXPERIMENT- 8 DATE: _____________ Aim: Write a program to interface ADC 809 to 8085 μp through 8255. The program will display the digital data corresponding to analog signal varies from 0 mV to 5120 mV (5.12V) in step of 512 mV (0.512V). Apparatus: Dyna-85L kit, keyboard, power cord, ADC PIO card, 26 pin FRC connector Interfacing 8 bit ADC 0809 (successive approximation, µp compatible) to 8085 µp through 8255:

Power supply: +12V,-12V (external), +5V (available by connecting FRC cable), ground

Define: 8255 in mode 0 Port A: read digital data (input port) D0-D7 Port B: apply the control signals (output port): Clock enable, OE (output latch enable), STC (start of conversion) Port C: reads the status (input port): EOC (End of conversion)

CONTROL WORD : 1001 1001 = 99H

When analog voltage ac\dc is applied at the input, it will be converted into digital data by 0809ADC. To program this IC following procedure should be followed. 1. Enable the oscillator (clock gen.) by setting PB2 high 2. Apply a low to high pulse of short duration to PB0 (STC) 3. Poll the status of EOC (PC0) pin by polling PC0 pin 4. After EOC pin (PC0)=1; read data at port A by enabling OE (output latch enable PB1=1)

Port A 8255 Digital Data

D0

D7

D7

CH O Precision Rectifier

Analog i/p

(DC 0 to + 5.12V)

AC 3.5 V rms (60Hz) CH1

CH7

4

5

6

7

ADC

0809

PB 1

Port B PC 0

Port C

PB 0

Port

B

OE EOC STC

A2 A1 A0

Channel Select

Buffer and Voltage divider

5.12V 5.6V

Zener diode

Clock generator,

Schmitt trigger

≈100 KHZ

Clock enable

from PB2

+Vref

-Vref

CLK

ALE

The maximum full scale input voltage=5.12V =5120mV

With 256 steps (00 to FFH), Step size =5120/256=20mV (1LSB)

Note digital data for different inputs in step and prepare table.

LXI SP, EEEEH

MVI A, 99H; initialize ports

OUT 13H

CONT: MVI A, 05H; Enable oscillator and make STC=1

OUT 11H

NOP; Small delay for STC pulse

NOP

NOP

NOP

MVI A, 04H; make STC=0

OUT 11 H

POLL: IN 12H; POLL EOC (PC0 status)

ANI 01H; Mask other bits except PC0

CPI 01H

JNZ POLL

MVI A, 06H; Output latch enable (OE) = 1

OUT 11H

IN 10H; read data from port A

CALL DELAY

JMP CONT

Program entry:

Memory Location


Results:

Analog Input Voltage Digital Output (Hex)


EXPERIMENT- 9 DATE: _____________ Aim: Write a program to interface 8-bit DAC 0809 to 8085 μp through 8255 and generate following waveforms. (1) square wave with 50% duty cycle (2) triangular wave with 50% duty cycle (3) saw- tooth waveform and (4) exponential (charging - discharging) waveform. Apparatus: Dyna-85L kit, keyboard, power cord, DAC PIO card, 26 pin FRC connector Interfacing of 8 bit DAC 0809(R-2R ladder network type) to 8085 through 8255:

Power supply: +12V,-12V(external),+5V(available by connecting cable), ground

Define: 8255 in mode0 Port A: output port to output digital data

Port B: output port for applying control signal (enable latch) connected with DAC Port C: input port

CONTROL WORD : 1000 1001 = 89H

(1) Square Waveform:

LXI SP, EEEEH MVI A, 89H OUT 13H MVI A, 01H; latch enable OUT 11H MVI A, FFH

X : OUT 10H CALL DELAY; controls frequency CMA JMP X

Enable

latch

DAC 0809

Vref

I out

Current to voltage

converter using

OPAMP

Data latch 74373

Analog o/p Vout

BUFFER 0 to VCC ADJ

PB0

D0

D7

Port A 8255 Digital i\p

Vref

Vref

(2) Saw-tooth Waveform: LXI SP, EEEEH MVI A, 89H OUT 13H

MVI A, 01H; latch enable OUT 11H

MVI A, 00H X: OUT 10H CALL DELAY; controls frequency INR A JMP X

(3) Triangular Waveform: LXI SP, EEEEH MVI A, 89H OUT 13H MVI A, 01H OUT 11H MVI A, 00H X: OUT 10H

CALL DELAY INR A CP I FFH JNZ X CONT: OUT 10H DCR A

CALL DELAY JNZ CONT

JMP X (4) Exponential Waveform:

LXI SP, EEEEH MVI A, 89H OUT 13H MVI A, 01H OUT 11H MVI A, 00H

STC CHRG: RAL

OUT 10H CALL DELAY

CPI 40H JNZ CHRG DSCHR: RAR

OUT 10H CALL DELAY

CPI 01H JNZ DSCHR JMP CHRG

Program entry:

Memory Location


Result: Observe and draw waveforms displayed on CRO.


EXPERIMENT- 10 DATE: _____________ Aim: Write a program to generate sin wave, half wave and full wave rectified waveform using DAC 0809 interfaced to 8085 μp. Use look up table method. Apparatus: Dyna-85L kit, keyboard, power cord, DAC PIO card, 26 pin FRC connector Theory: To generate a sine wave we use look up table method. The following paragraph explains the method of calculating entries of the lookup table. Let V θ = Vp. sin θ +Vo. If we select average value of the sine wave (i.e. θ = 0°) at the middle of the available range, the waveform can be of maximum possible amplitude. The full swing is limited to FFH in an 8-bit system. If average level (Vo) is selected to be 80H, the Vp(peak excursion) can be FFH-80 H=7FH. Thus, the wave form will take FFH value at its positive peak (at 90°) and 01H (80H-7FH) at its negative peak (at 270°). Putting these values in above equation; V θ =7FH.sin θ +80H If we calculate the samples with 5° intervals, θ will take values from 5°, 10° … 350°, 360°. Following table lists values of V θ for these angles. Note that these values are truncated to make them fit in 8-bits.

θ (deg) V θ θ (deg) V θ θ (deg) V θ θ (deg) V θ

5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90

8BH 96H A1H ABH B6H C0H C9H D2H DAH E1H E8H EEH F3H F7H FAH FDH FFH FFH

95 100 105 110 115 120 125 130 135 140 145 150 155 160 165 170 175 180

FFH FDH FAH F7H F3H EEH E8H E1H DAH D2H C9H C0H B6H ABH A1H 96H 8BH 80H

185 190 195 200 205 210 215 220 225 230 235 240 245 250 255 260 265 270

75H 6AH 5FH 55H 1AH 41H 37H 2EH 26H 1FH 18H 12H 0DH 09H 05H 03H 01H 01H

275 280 285 290 295 300 305 310 315 320 325 330 335 340 345 350 355 360

01H 03H 05H 09H 0DH 12H 18H 1FH 26H 2EH 37H 41H 4AH 55H 5FH 6AH 75H 80H

(1) Sine Waveform:

LXI SP, EEEEH MVI A, 89H OUT 13H MVI A, 01H; latch enable OUT 11H

X: LXI H, C100H; look-up table pointer MVI C, 40H; 72 entries in the table

CYCLE: MOV A, M

OUT 10H CALL DELAY; controls frequency INX H DCR C JNZ CYCLE JMP X

(2) Full wave rectified Sine Waveform: LXI SP, EEEEH MVI A, 89H OUT 13H

MVI A, 01H; latch enable OUT 11H X: LXI H, C100H; look-up table pointer

MVI C, 24H; take 36 entries in the table (+Ve half cycle only). CYCLE: MOV A, M OUT 10H

CALL DELAY; controls frequency INX H DCR C JNZ CYCLE JMP X

(3) Half wave rectified Sine Waveform: LXI SP, EEEEH MVI A, 89H OUT 13H MVI A, 01H OUT 11H X: LXI H, C100H; look-up table pointer

MVI C, 40H; 72 entries in the table PHCYC: MOV A, M OUT 10H

CALL DELAY; controls frequency INX H DCR C JNZ PHCYC MVI C, 40H; -ve half cycle

NHCYC: MVI A, 80H; output corresponds to average value OUT 10H

CALL DELAY; controls frequency DCR C JNZ NHCYC JMP X

Program entry:

Memory Location


Result: Observe and draw waveforms displayed on CRO.


EXPERIMENT- 11 DATE: _____________ Aim: Interfacing 8255 with 8085 and Interrupt driven data transfer Apparatus: Dyna-85L kit, keyboard, power cord, 8255 study card, 50 pin FRC connector, tags


EXPERIMENT- 12 DATE: _____________ Aim: Interfacing 8253 Apparatus: Dyna-85L kit, keyboard, power cord, 8253 study card, 50 pin FRC connector, tags






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