FloydFloydDigital Fundamentals, 9/eDigital Fundamentals, 9/e
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Slide 1
Digital FundamentalsDigital Fundamentals
CHAPTER 3 CHAPTER 3 Logic GatesLogic Gates
FloydFloydDigital Fundamentals, 9/eDigital Fundamentals, 9/e
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Slide 2
Logic Gates Logic Gates
• InverterInverter
• AND GateAND Gate
• OR GateOR Gate
• Exclusive-OR GateExclusive-OR Gate
• NAND GateNAND Gate
• NOR GateNOR Gate
• Exclusive-NOR GateExclusive-NOR Gate
FloydFloydDigital Fundamentals, 9/eDigital Fundamentals, 9/e
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Slide 3
The InverterThe Inverter
FloydFloydDigital Fundamentals, 9/eDigital Fundamentals, 9/e
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Slide 4
The Inverter The Inverter
Boolean expressionTruth table
0 = LOW1 = HIGH
Pulsed waveforms
The output of an inverter is always the The output of an inverter is always the complement (opposite) of the input.complement (opposite) of the input.
FloydFloydDigital Fundamentals, 9/eDigital Fundamentals, 9/e
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Slide 5
The AND GateThe AND Gate
FloydFloydDigital Fundamentals, 9/eDigital Fundamentals, 9/e
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Slide 6
The AND Gate The AND Gate
Boolean expression
Truth table
0 = LOW1 = HIGH Pulsed waveforms
The output of an AND gate is HIGH only The output of an AND gate is HIGH only when all inputs are HIGH.when all inputs are HIGH.
FloydFloydDigital Fundamentals, 9/eDigital Fundamentals, 9/e
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Slide 7
The AND Gate The AND Gate
3-Input AND Gate3-Input AND Gate
4-Input AND Gate4-Input AND Gate
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Slide 8
The OR GateThe OR Gate
FloydFloydDigital Fundamentals, 9/eDigital Fundamentals, 9/e
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Slide 9
The OR Gate The OR Gate
Boolean expression
Truth table
0 = LOW1 = HIGH
The output of an OR gate is HIGH The output of an OR gate is HIGH whenever one or more inputs are HIGHwhenever one or more inputs are HIGH
Pulsed waveforms
FloydFloydDigital Fundamentals, 9/eDigital Fundamentals, 9/e
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Slide 10
The OR Gate The OR Gate
3-Input OR Gate3-Input OR Gate
4-Input OR Gate4-Input OR Gate
FloydFloydDigital Fundamentals, 9/eDigital Fundamentals, 9/e
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Slide 11
The NAND GateThe NAND Gate
FloydFloydDigital Fundamentals, 9/eDigital Fundamentals, 9/e
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Slide 12
The NAND GateThe NAND Gate
Boolean expression
Truth table
0 = LOW1 = HIGH
The output of a NAND gate is HIGH The output of a NAND gate is HIGH whenever one or more inputs are LOW.whenever one or more inputs are LOW.
Pulsed waveforms
FloydFloydDigital Fundamentals, 9/eDigital Fundamentals, 9/e
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Slide 13
The NAND Gate The NAND Gate
3-Input NAND Gate3-Input NAND Gate 4-Input NAND Gate4-Input NAND Gate
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Slide 14
The NOR GateThe NOR Gate
FloydFloydDigital Fundamentals, 9/eDigital Fundamentals, 9/e
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Slide 15
The NOR Gate The NOR Gate
Boolean expression
Truth table
0 = LOW1 = HIGH
The output of a NOR gate is LOW The output of a NOR gate is LOW whenever one or more inputs are HIGH.whenever one or more inputs are HIGH.
Pulsed waveforms
FloydFloydDigital Fundamentals, 9/eDigital Fundamentals, 9/e
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Slide 16
The NOR Gate The NOR Gate
3-Input NOR Gate3-Input NOR Gate 4-Input NOR Gate4-Input NOR Gate
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Slide 17
Exclusive-OR and Exclusive-NOR GatesExclusive-OR and Exclusive-NOR Gates
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Slide 18
Exclusive-OR Gate Exclusive-OR Gate
Boolean expression
Truth table
0 = LOW1 = HIGH
The output of an XOR gate is HIGH The output of an XOR gate is HIGH whenever the two inputs are different.whenever the two inputs are different.
Pulsed waveforms
FloydFloydDigital Fundamentals, 9/eDigital Fundamentals, 9/e
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Slide 19
Exclusive-NOR Gate Exclusive-NOR Gate
Boolean expression
Truth table
0 = LOW1 = HIGH
The output of an XNOR gate is HIGH The output of an XNOR gate is HIGH whenever the two inputs are identical.whenever the two inputs are identical.
Pulsed waveforms
FloydFloydDigital Fundamentals, 9/eDigital Fundamentals, 9/e
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Slide 20
Programmable LogicProgrammable Logic
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Slide 21
Programmable LogicProgrammable Logic
• Programmable AND arrayProgrammable AND array
• Programmable link technologyProgrammable link technology
• Device programmingDevice programming
• In-system programming (ISP)In-system programming (ISP)
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Slide 22
Programmable LogicProgrammable Logic
• Programmable AND arrayProgrammable AND array
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Slide 23
Programmable LogicProgrammable Logic
Programmable link technologyProgrammable link technology
• Fuse technologyFuse technology
• Anti-fuse technologyAnti-fuse technology
• EPROM technologyEPROM technology
• EEPROM technologyEEPROM technology
• SRAM technologySRAM technology
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Slide 24
Programmable LogicProgrammable Logic
Device programmingDevice programming
• Design entryDesign entry– Text entryText entry– Graphic (schematic) entryGraphic (schematic) entry
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Slide 25
Programmable LogicProgrammable Logic
• In-system programming (ISP)In-system programming (ISP)– Joint Test Action Group (JTAG)Joint Test Action Group (JTAG)– Imbedded processor Imbedded processor
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Slide 26
Fixed-Function LogicFixed-Function Logic
FloydFloydDigital Fundamentals, 9/eDigital Fundamentals, 9/e
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Slide 27
Fixed-Function Logic Fixed-Function Logic
• CMOSCMOS
• TTLTTL